Age | Commit message (Collapse) | Author |
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The ia64_rse_is_rnat_slot func expects an unsigned pointer, but we're
passing in a signed pointer. The signness doesn't matter here, so
convert it to unsigned.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The recent change to clean up these defines missed the ia64 logic.
Update it accordingly.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The strcpy and strchr (and related) functions are four times faster
than the byte-by-byte default versions.
The strlen function is twice as fast for long strings and 50% faster
for short strings over the armv4 version.
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* sysdeps/unix/sysv/linux/aarch64/bits/mman.h: Remove all
defines provided by bits/mman-linux.h and include <bits/mman-linux.h>.
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* sysdeps/unix/sysv/linux/bits/mman-linux.h (MAP_ANONYMOUS):
Allow definition via __MAP_ANONYMOUS.
* sysdeps/unix/sysv/linux/mips/bits/mman.h: Remove all defines
provided by bits/mman-linux.h and include <bits/mman-linux.h>.
(__MAP_ANONYMOUS): Define.
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Written from scratch rather than copied from GMP, due to LGPL 2.1 vs
GPL 3, but tested with the GMP testsuite.
This is 250% faster than the generic code as measured on Cortex-A15,
and the same speed as GMP on the same core, and probably everywhere.
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Written from scratch rather than copied from GMP, due to LGPL 2.1 vs
GPL 3, but tested with the GMP testsuite.
This is 50% faster than the generic code as measured on Cortex-A15.
It is 25% slower than the current GMP routine on the same core.
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Written from scratch rather than copied from GMP, due to LGPL 2.1 vs
GPL 3, but tested with the GMP testsuite.
This is 25% faster than the generic code as measured on Cortex-A15,
and the same speed as GMP on the same core. It's probably slower
than GMP on the A8 and A9 cores though.
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Add BLX macro in addition and use it where appropriate.
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There was only one user. It's "condition" argument was used
for "ia" rather than an actual condition. The apcs26 syntax
is almost certainly not needed, given current binutils requirements.
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For arm this makes no difference--the result is bit-for-bit identical;
for thumb this results in smaller encodings. Perhaps it ought not and
this is in fact an assembler bug, but I also think it's clearer.
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The preceeding patches have allowed for the few incompatibilities
between arm and thumb2 mode, or have marked the file as not wanting
to use thumb2 mode.
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Factor out the sequence needed to call kuser_get_tls, as we can't
play subtract into pc games in thumb mode. Prepare for hard-tp,
pulling the save of LR into the macro.
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There are several places in which we access negative offsets from
the thread-pointer, but thumb2 only supports positive offsets in
memory references.
Avoid duplicating the rather large macros in which these references
are embedded by abstracting out the operation.
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Macro-ising the few instances where we need to distinguish between
arm and thumb pc-relative memory operations.
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* sysdeps/unix/sysv/linux/tile/bits/mman.h: Remove all defines
provided by bits/mman-linux.h and include <bits/mman-linux.h>.
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Some routines are written with complex LDM/STM insns that cannot be
used in thumb mode, or are highly conditional requiring excessive
IT insns.
When a future patch goes in to enable thumb2 by default, this marker
will be used to override that default.
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These are ignored by the assembler in ARM mode, so by
default this has no effect on generated code.
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Scour the source for raw "-8" adjustments that are related to the
offset created by reading the pc.
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When compiling with -mthumb, ld.so itself also needs __libc_do_syscall.
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New defines from gcc 4.8:
#define __ARM_ARCH_ISA_ARM 1
#define __ARM_ARCH_PROFILE 65
#define __ARM_ARCH_ISA_THUMB 2
#define __ARM_ARCH 7
all of which got in the way of the one we wanted:
#define __ARM_ARCH_7A__ 1
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Recent changes in malloc-sysdep.h exposed this error, the
symptom being __set_errno was not defined early enough.
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Fixup for commit c7b275d6b3bceb6b400fa3044d13d1001bc605ca.
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Inconsistency introduced in commit 84b3fd8407cc9a2e7f487b6247681bd8a78a4560.
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Generic IEEE 754 file has been changed in commit
b575c52b86fe0c00adec925e356eb72cf95b23a7.
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