| Age | Commit message (Collapse) | Author |
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Without -fno-math-errno, the builtins just do a call instead of
inlining a single instruction.
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This patch converts asm statements into builtins for AArch64. As an
example for the file sysdeps/aarch64/fpu/s_ceil.c, we convert the
function from
double
__ceil (double x)
{
double result;
asm ("frintp\t%d0, %d1" :
"=w" (result) : "w" (x) );
return result;
}
into
double
__ceil (double x)
{
return __builtin_ceil (x);
}
Tested on aarch64-linux-gnu with gcc-4.9.4 and gcc-6.
* sysdeps/aarch64/fpu/e_sqrt.c (ieee754_sqrt): Replace asm statements
with __builtin_sqrt.
* sysdeps/aarch64/fpu/e_sqrtf.c (ieee754_sqrtf): Replace asm statements
with __builtin_sqrtf.
* sysdeps/aarch64/fpu/s_ceil.c (__ceil): Replace asm statements
with __builtin_ceil.
* sysdeps/aarch64/fpu/s_ceilf.c (__ceilf): Replace asm statements
with __builtin_ceilf.
* sysdeps/aarch64/fpu/s_floor.c (__floor): Replace asm statements
with __builtin_floor.
* sysdeps/aarch64/fpu/s_floorf.c (__floorf): Replace asm statements
with __builtin_floorf.
* sysdeps/aarch64/fpu/s_fma.c (__fma): Replace asm statements
with __builtin_fma.
* sysdeps/aarch64/fpu/s_fmaf.c (__fmaf): Replace asm statements
with __builtin_fmaf.
* sysdeps/aarch64/fpu/s_fmax.c (__fmax): Replace asm statements
with __builtin_fmax.
* sysdeps/aarch64/fpu/s_fmaxf.c (__fmaxf): Replace asm statements
with __builtin_fmaxf.
* sysdeps/aarch64/fpu/s_fmin.c (__fmin): Replace asm statements
with __builtin_fmin.
* sysdeps/aarch64/fpu/s_fminf.c (__fminf): Replace asm statements
with __builtin_fminf.
* sysdeps/aarch64/fpu/s_frint.c: Delete file.
* sysdeps/aarch64/fpu/s_frintf.c: Delete file.
* sysdeps/aarch64/fpu/s_llrint.c (__llrint): Replace asm statements
with builtin_rint and conversion to int.
* sysdeps/aarch64/fpu/s_llrintf.c (__llrintf): Likewise.
* sysdeps/aarch64/fpu/s_llround.c (__llround): Replace asm statements
with builtin_llround.
* sysdeps/aarch64/fpu/s_llroundf.c (__llroundf): Likewise.
* sysdeps/aarch64/fpu/s_lrint.c (__lrint): Replace asm statements
with builtin_rint and conversion to long int.
* sysdeps/aarch64/fpu/s_lrintf.c (__lrintf): Likewise.
* sysdeps/aarch64/fpu/s_lround.c (__lround): Replace asm statements
with builtin_lround.
* sysdeps/aarch64/fpu/s_lroundf.c (__lroundf): Replace asm statements
with builtin_lroundf.
* sysdeps/aarch64/fpu/s_nearbyint.c (__nearbyint): Replace asm
statements with __builtin_nearbyint.
* sysdeps/aarch64/fpu/s_nearbyintf.c (__nearbyintf): Replace asm
statements with __builtin_nearbyintf.
* sysdeps/aarch64/fpu/s_rint.c (__rint): Replace asm statements
with __builtin_rint.
* sysdeps/aarch64/fpu/s_rintf.c (__rintf): Replace asm statements
with __builtin_rintf.
* sysdeps/aarch64/fpu/s_round.c (__round): Replace asm statements
with __builtin_round.
* sysdeps/aarch64/fpu/s_roundf.c (__roundf): Replace asm statements
with __builtin_roundf.
* sysdeps/aarch64/fpu/s_trunc.c (__trunc): Replace asm statements
with __builtin_trunc.
* sysdeps/aarch64/fpu/s_truncf.c (__truncf): Replace asm statements
with __builtin_truncf.
* sysdeps/aarch64/fpu/Makefile: Build e_sqrt[f].c with -fno-math-errno.
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cfi info for stack adjust needs to be on the insn doing the adjust.
cfi describing register saves can be anywhere after the save insn but
before the reg is altered. Fewer locations with cfi result in smaller
cfi programs and possibly slightly faster exception handling. Thus
the LR cfi_offset move.
The idea behind ajusting sp after restoring regs is to break a
register dependency chain, in this case not be using r1 immediately
after it is modified.
The missing LR cfi_restore meant that code after the blr,
unaligned_lt_16 and other labels, would have cfi that said LR was at
cfa+16, but that code is reached without LR being saved.
* sysdeps/powerpc/powerpc64/power8/strncpy.S: Move LR cfi.
Adjust stack after restoring regs. Add missing LR cfi_restore.
Reviewed-by: Tulio Magno Quites Machado Filho <tuliom@linux.vnet.ibm.com>
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This patch moves the frame setup and teardown to immediately around
the single memset call, as has been done for power8. I've also
decreased FRAMESIZE to that needed to save the two callee-saved
registers used. Plus added cfi.
* sysdeps/powerpc/powerpc64/power7/strncpy.S: Decrease FRAMESIZE.
Move LR save and frame setup/teardown and LR restore to
immediately around memset call. Provide cfi.
Reviewed-by: Tulio Magno Quites Machado Filho <tuliom@linux.vnet.ibm.com>
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This patch replaces i386 assembly versions of e_powf with generic
e_powf.c. For workload-spec2017.wrf, on Nehalem, it improves
performance by:
Before After Improvement
reciprocal-throughput 230.855 78.3358 194%
latency 231.685 94.1259 146%
On Skylake, it improves performance by:
Before After Improvement
reciprocal-throughput 239.858 47.4713 405%
latency 247.57 93.8798 163%
On IvyBridge with --disable-multi-arch, it improves performance by:
Before After Improvement
reciprocal-throughput 269.078 63.3758 324%
latency 271.473 102.091 165%
* sysdeps/i386/fpu/e_powf.S: Removed.
* sysdeps/i386/fpu/e_powf_log2_data.c: Likewise.
* sysdeps/i386/fpu/w_powf.c: Likewise.
* sysdeps/i386/fpu/libm-test-ulps: Updated for generic e_powf.c.
* sysdeps/i386/i686/fpu/multiarch/libm-test-ulps: Likewise.
* sysdeps/i386/i686/fpu/multiarch/Makefile (libm-sysdep_routines):
Add e_powf-sse2.
(CFLAGS-e_powf-sse2.c): New.
* sysdeps/i386/i686/fpu/multiarch/e_powf-sse2.c: New file.
* sysdeps/i386/i686/fpu/multiarch/e_powf.c: Likewise.
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This patch replaces i386 assembly versions of e_log2f with generic
e_log2f.c. For workload-spec2017.wrf, on Nehalem, it improves
performance by:
Before After Improvement
reciprocal-throughput 92.3845 30.8752 199%
latency 112.855 54.8645 105%
On Skylake, it improves performance by:
Before After Improvement
reciprocal-throughput 98.7488 22.7507 334%
latency 118.01 51.6083 128%
On IvyBridge with --disable-multi-arch, it improves performance by:
Before After Improvement
reciprocal-throughput 106.635 28.8596 269%
latency 129.888 56.9187 128%
* sysdeps/i386/fpu/e_log2f.S: Removed.
* sysdeps/i386/fpu/e_log2f_data.c: Likewise.
* sysdeps/i386/fpu/w_log2f.c: Likewise.
* sysdeps/i386/fpu/libm-test-ulps: Updated for generic e_log2f.c.
* sysdeps/i386/i686/fpu/multiarch/libm-test-ulps: Likewise.
* sysdeps/i386/i686/fpu/multiarch/Makefile (libm-sysdep_routines):
Add e_log2f-sse2.
(CFLAGS-e_log2f-sse2.c): New.
* sysdeps/i386/i686/fpu/multiarch/e_log2f-sse2.c: New file.
* sysdeps/i386/i686/fpu/multiarch/e_log2f.c: Likewise.
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For workload-spec2017.wrf, on Skylake, it improves performance by:
Before After Improvement
reciprocal-throughput 35.4713 27.3842 29%
latency 82.4537 66.3175 24%
* sysdeps/x86_64/fpu/multiarch/Makefile (libm-sysdep_routines):
Add e_powf-fma.
(CFLAGS-e_powf-fma.c): New.
* sysdeps/x86_64/fpu/multiarch/e_powf-fma.c: New file.
* sysdeps/x86_64/fpu/multiarch/e_powf.c: Likewise.
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For workload-spec2017.wrf, on Skylake, it improves performance by:
Before After Improvement
reciprocal-throughput 16.5937 14.0789 17%
latency 41.7755 35.3586 18%
* sysdeps/x86_64/fpu/multiarch/Makefile (libm-sysdep_routines):
Add e_log2f-fma.
(CFLAGS-e_log2f-fma.c): New.
* sysdeps/x86_64/fpu/multiarch/e_log2f-fma.c: New file.
* sysdeps/x86_64/fpu/multiarch/e_log2f.c: Likewise.
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For workload-spec2017.wrf, on Skylake, it improves performance by:
Before After Improvement
reciprocal-throughput 16.1534 13.8874 16%
latency 41.9642 34.3072 22%
* sysdeps/x86_64/fpu/multiarch/Makefile (libm-sysdep_routines):
Add e_logf-fma.
(CFLAGS-e_logf-fma.c): New.
* sysdeps/x86_64/fpu/multiarch/e_logf-fma.c: New file.
* sysdeps/x86_64/fpu/multiarch/e_logf.c: Likewise.
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This patch replaces i386 assembly versions of e_logf with generic
e_logf.c. For workload-spec2017.wrf, on Nehalem, it improves
performance by:
Before After Improvement
reciprocal-throughput 73.3865 40.0454 83%
latency 90.0985 54.4479 65%
On Skylake, it improves performance by:
Before After Improvement
reciprocal-throughput 75.1384 22.1452 239%
latency 91.9441 50.7925 81%
On IvyBridge with --disable-multi-arch, it improves performance by:
Before After Improvement
reciprocal-throughput 84.5575 28.7879 193%
latency 103.971 57.5231 80%
* sysdeps/i386/fpu/e_logf.S: Removed.
* sysdeps/i386/fpu/e_logf_data.c: Likewise.
* sysdeps/i386/fpu/w_logf.c: Likewise.
* sysdeps/i386/i686/fpu/e_logf.S: Likewise.
* sysdeps/i386/fpu/libm-test-ulps: Updated for generic e_logf.c.
* sysdeps/i386/i686/fpu/multiarch/libm-test-ulps: Likewise.
* sysdeps/i386/i686/fpu/multiarch/Makefile (libm-sysdep_routines):
Add e_logf-sse2.
(CFLAGS-e_logf-sse2.c): New.
* sysdeps/i386/i686/fpu/multiarch/e_logf-sse2.c: New file.
* sysdeps/i386/i686/fpu/multiarch/e_logf.c: Likewise.
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This patch replaces i386 assembly versions of e_exp2f with generic
e_exp2f.c. For workload-spec2017.wrf, on Nehalem, it improves
performance by:
Before After Improvement
reciprocal-throughput 112.996 40.0454 182%
latency 126.581 54.4479 132%
On Skylake, it improves performance by:
Before After Improvement
reciprocal-throughput 113.14 39.447 186%
latency 136.068 55.684 144%
On IvyBridge with --disable-multi-arch, it improves performance by:
Before After Improvement
reciprocal-throughput 132.521 40.3759 228%
latency 145.791 58.4587 149%
* sysdeps/i386/fpu/e_exp2f.S: Removed.
* sysdeps/i386/fpu/w_exp2f.c: Likewise.
* sysdeps/i386/fpu/libm-test-ulps: Updated for generic e_exp2f.c.
* sysdeps/i386/i686/fpu/multiarch/libm-test-ulps: Likewise.
* sysdeps/i386/i686/fpu/multiarch/Makefile (libm-sysdep_routines):
Add e_exp2f-sse2.
(CFLAGS-e_exp2f-sse2.c): New.
* sysdeps/i386/i686/fpu/multiarch/e_exp2f-sse2.c: New file.
* sysdeps/i386/i686/fpu/multiarch/e_exp2f.c: Likewise.
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For workload-spec2017.wrf, on Skylake, it improves performance by:
Before After Improvement
reciprocal-throughput 13.0291 11.2225 16%
latency 44.5154 37.5766 18%
* sysdeps/x86_64/fpu/multiarch/Makefile (libm-sysdep_routines):
Add e_exp2f-fma.
(CFLAGS-e_exp2f-fma.c): New.
* sysdeps/x86_64/fpu/multiarch/e_exp2f-fma.c: New file.
* sysdeps/x86_64/fpu/multiarch/e_exp2f.c: Likewise.
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This patch replaces i386 assembly versions of e_expf with generic
e_expf.c. For workload-spec2017.wrf, on Nehalem, it improves
performance by:
Before After Improvement
reciprocal-throughput 55.5724 40.2664 38%
latency 80.0687 60.8517 31%
On Skylake, it improves performance by:
Before After Improvement
reciprocal-throughput 62.4056 39.4188 58%
latency 85.5496 59.6377 43%
On IvyBridge with --disable-multi-arch, it improves performance by:
Before After Improvement
reciprocal-throughput 133.707 40.3778 231%
latency 149.191 63.2515 135%
* sysdeps/i386/fpu/e_exp2f_data.c: Removed.
* sysdeps/i386/fpu/e_expf.S: Likewise.
* sysdeps/i386/fpu/math_errf.c: Likewise.
* sysdeps/i386/fpu/w_expf.c: Likewise.
* sysdeps/i386/i686/fpu/multiarch/e_expf-ia32.S: Likewise.
* sysdeps/i386/i686/fpu/multiarch/e_expf-sse2.S: Likewise.
* sysdeps/i386/i686/fpu/multiarch/w_expf.c: Likewise.
* sysdeps/i386/fpu/libm-test-ulps: Updated for generic e_expf.c.
* sysdeps/i386/i686/fpu/multiarch/libm-test-ulps: Likewise.
* sysdeps/i386/i686/fpu/multiarch/Makefile (libm-sysdep_routines):
Remove e_expf-ia32.
(CFLAGS-e_expf-sse2.c): New.
* sysdeps/i386/i686/fpu/multiarch/e_expf-sse2.c: New file.
* sysdeps/i386/i686/fpu/multiarch/e_expf.c: Rewritten.
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This patch replaces x86-64 assembly versions of e_expf with generic
e_expf.c. For workload-spec2017.wrf, on Nehalem, it improves
performance by:
Before After Improvement
reciprocal-throughput 36.039 20.7749 73%
latency 58.8096 40.8715 43%
On Skylake, it improves
Before After Improvement
reciprocal-throughput 18.4436 11.1693 65%
latency 47.5162 37.5411 26%
* sysdeps/x86_64/fpu/e_expf.S: Removed.
* sysdeps/x86_64/fpu/multiarch/e_expf-fma.S: Likewise.
* sysdeps/x86_64/fpu/w_expf.c: Likewise.
* sysdeps/x86_64/fpu/libm-test-ulps: Updated for generic
e_expf.c.
* sysdeps/x86_64/fpu/multiarch/Makefile (CFLAGS-e_expf-fma.c):
New.
* sysdeps/x86_64/fpu/multiarch/e_expf-fma.c: New file.
* sysdeps/x86_64/fpu/multiarch/e_expf.c (__redirect_ieee754_expf):
Renamed to ...
(__redirect_expf): This.
(SYMBOL_NAME): Changed to expf.
(__ieee754_expf): Renamed to ...
(__expf): This.
(__GI___expf): This.
(__ieee754_expf): Add strong_alias.
(__expf_finite): Likewise.
(__expf): New.
Include <sysdeps/ieee754/flt-32/e_expf.c>.
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The new test checks for memory leaks (see bug 22325) and attempts
to trigger the buffer overflow in bug 22320.
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The bits/floatn.h header currently only has defines relating to
_Float128. This patch adds defines relating to other _FloatN /
_FloatNx types.
The approach taken is to add defines for all _FloatN / _FloatNx types
known to GCC, and to put them in a common bits/floatn-common.h header
included at the end of all the individual bits/floatn.h headers. If
in future some defines become different for different glibc
configurations, they will move out into the separate bits/floatn.h
headers.
Some defines are expected always to be the same across glibc ports.
Corresponding defines are nevertheless put in this header. The intent
is that where there are conditionals (in headers or in non-installed
files) that can just repeat the same or nearly the same logic for each
floating-point type, they should do so, even if in fact the cases for
some types could be unconditionally present or absent because the same
conditionals are true or false for all glibc configurations. This
should make the glibc code with such conditionals easier to read,
because the reader can just see that the same conditionals are
repeated for each type, rather than seeing different conditionals for
different types and needing to reason, at each location with such
differences, why those differences are indeed correct there. (Cases
involving per-format rather than per-type logic are more likely still
to need differences in how they handle different types.)
Having such defines and conditionals also helps in incremental
preparation for adding _Float32 / _Float64 / _Float32x / _Float64x
function aliases. I intend subsequent patches to add such
conditionals corresponding to those already present for _Float128, as
well as making more architecture-specific function implementations use
common macros to define aliases in preparation for adding such _FloatN
/ _FloatNx aliases.
Tested for x86_64.
* bits/floatn-common.h: New file.
* math/Makefile (headers): Add bits/floatn-common.h.
* bits/floatn.h: Include <bits/floatn-common.h>.
* sysdeps/ia64/bits/floatn.h: Likewise.
* sysdeps/ieee754/ldbl-128/bits/floatn.h: Likewise.
* sysdeps/mips/ieee754/bits/floatn.h: Likewise.
* sysdeps/powerpc/bits/floatn.h: Likewise.
* sysdeps/x86/bits/floatn.h: Likewise.
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GCC 8 emits an warning for alias for functions with incompatible types
and it is used extensivelly for ifunc resolvers implementations in C
(for instance on weak_alias with the internal symbol name to the
external one or with the libc_hidden_def to set ifunc for internal
usage).
This breaks the build when the ifunc resolver is not defined using
gcc attribute extensions (HAVE_GCC_IFUNC being 0). Although for
all currently architectures that have multiarch support this compiler
options is enabled for default, there is still the option where the
user might try build glibc with a compiler without support for such
extension. In this case this patch just disable the multiarch folder
in sysdeps selections.
GCC 7 and before still builds IFUNCs regardless of compiler support
(although for the lack of attribute support debug information would
be optimal).
Checked with a build on multiarch support architectures (aarch64,
arm, sparc, s390, powerpc, x86_64, i386) with multiarch enable
and disable and with GCC 7 and GCC 8.
* configure.ac (libc_cv_gcc_incompatbile_alias): New define:
indicates whether compiler emits an warning for alias for
functions with incompatible types.
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As noted by Florian Weimer, current Linux posix_spawn implementation
can trigger an assert if the auxiliary process is terminated before
actually setting the err member:
340 /* Child must set args.err to something non-negative - we rely on
341 the parent and child sharing VM. */
342 args.err = -1;
[...]
362 new_pid = CLONE (__spawni_child, STACK (stack, stack_size), stack_size,
363 CLONE_VM | CLONE_VFORK | SIGCHLD, &args);
364
365 if (new_pid > 0)
366 {
367 ec = args.err;
368 assert (ec >= 0);
Another possible issue is killing the child between setting the err and
actually calling execve. In this case the process will not ran, but
posix_spawn also will not report any error:
269
270 args->err = 0;
271 args->exec (args->file, args->argv, args->envp);
As suggested by Andreas Schwab, this patch removes the faulty assert
and also handles any signal that happens before fork and execve as the
spawn was successful (and thus relaying the handling to the caller to
figure this out). Different than Florian, I can not see why using
atomics to set err would help here, essentially the code runs
sequentially (due CLONE_VFORK) and I think it would not be legal the
compiler evaluate ec without checking for new_pid result (thus there
is no need to compiler barrier).
Summarizing the possible scenarios on posix_spawn execution, we
have:
1. For default case with a success execution, args.err will be 0, pid
will not be collected and it will be reported to caller.
2. For default failure case, args.err will be positive and the it will
be collected by the waitpid. An error will be reported to the
caller.
3. For the unlikely case where the process was terminated and not
collected by a caller signal handler, it will be reported as succeful
execution and not be collected by posix_spawn (since args.err will
be 0). The caller will need to actually handle this case.
4. For the unlikely case where the process was terminated and collected
by caller we have 3 other possible scenarios:
4.1. The auxiliary process was terminated with args.err equal to 0:
it will handled as 1. (so it does not matter if we hit the pid
reuse race since we won't possible collect an unexpected
process).
4.2. The auxiliary process was terminated after execve (due a failure
in calling it) and before setting args.err to -1: it will also
be handle as 1. but with the issue of not be able to report the
caller a possible execve failures.
4.3. The auxiliary process was terminated after args.err is set to -1:
this is the case where it will be possible to hit the pid reuse
case where we will need to collected the auxiliary pid but we
can not be sure if it will be expected one. I think for this
case we need to actually change waitpid to use WNOHANG to avoid
hanging indefinitely on the call and report an error to caller
since we can't differentiate between a default failure as 2.
and a possible pid reuse race issue.
Checked on x86_64-linux-gnu.
* sysdeps/unix/sysv/linux/spawni.c (__spawnix): Handle the case where
the auxiliary process is terminated by a signal before calling _exit
or execve.
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In _dl_runtime_resolve, use fxsave/xsave/xsavec to preserve all vector,
mask and bound registers. It simplifies _dl_runtime_resolve and supports
different calling conventions. ld.so code size is reduced by more than
1 KB. However, use fxsave/xsave/xsavec takes a little bit more cycles
than saving and restoring vector and bound registers individually.
Latency for _dl_runtime_resolve to lookup the function, foo, from one
shared library plus libc.so:
Before After Change
Westmere (SSE)/fxsave 345 866 151%
IvyBridge (AVX)/xsave 420 643 53%
Haswell (AVX)/xsave 713 1252 75%
Skylake (AVX+MPX)/xsavec 559 719 28%
Skylake (AVX512+MPX)/xsavec 145 272 87%
Ryzen (AVX)/xsavec 280 553 97%
This is the worst case where portion of time spent for saving and
restoring registers is bigger than majority of cases. With smaller
_dl_runtime_resolve code size, overall performance impact is negligible.
On IvyBridge, differences in build and test time of binutils with lazy
binding GCC and binutils are noises. On Westmere, differences in
bootstrap and "makc check" time of GCC 7 with lazy binding GCC and
binutils are also noises.
[BZ #21265]
* sysdeps/x86/cpu-features-offsets.sym (XSAVE_STATE_SIZE_OFFSET):
New.
* sysdeps/x86/cpu-features.c: Include <libc-pointer-arith.h>.
(get_common_indeces): Set xsave_state_size, xsave_state_full_size
and bit_arch_XSAVEC_Usable if needed.
(init_cpu_features): Remove bit_arch_Use_dl_runtime_resolve_slow
and bit_arch_Use_dl_runtime_resolve_opt.
* sysdeps/x86/cpu-features.h (bit_arch_Use_dl_runtime_resolve_opt):
Removed.
(bit_arch_Use_dl_runtime_resolve_slow): Likewise.
(bit_arch_Prefer_No_AVX512): Updated.
(bit_arch_MathVec_Prefer_No_AVX512): Likewise.
(bit_arch_XSAVEC_Usable): New.
(STATE_SAVE_OFFSET): Likewise.
(STATE_SAVE_MASK): Likewise.
[__ASSEMBLER__]: Include <cpu-features-offsets.h>.
(cpu_features): Add xsave_state_size and xsave_state_full_size.
(index_arch_Use_dl_runtime_resolve_opt): Removed.
(index_arch_Use_dl_runtime_resolve_slow): Likewise.
(index_arch_XSAVEC_Usable): New.
* sysdeps/x86/cpu-tunables.c (TUNABLE_CALLBACK (set_hwcaps)):
Support XSAVEC_Usable. Remove Use_dl_runtime_resolve_slow.
* sysdeps/x86_64/Makefile (tst-x86_64-1-ENV): New if tunables
is enabled.
* sysdeps/x86_64/dl-machine.h (elf_machine_runtime_setup):
Replace _dl_runtime_resolve_sse, _dl_runtime_resolve_avx,
_dl_runtime_resolve_avx_slow, _dl_runtime_resolve_avx_opt,
_dl_runtime_resolve_avx512 and _dl_runtime_resolve_avx512_opt
with _dl_runtime_resolve_fxsave, _dl_runtime_resolve_xsave and
_dl_runtime_resolve_xsavec.
* sysdeps/x86_64/dl-trampoline.S (DL_RUNTIME_UNALIGNED_VEC_SIZE):
Removed.
(DL_RUNTIME_RESOLVE_REALIGN_STACK): Check STATE_SAVE_ALIGNMENT
instead of VEC_SIZE.
(REGISTER_SAVE_BND0): Removed.
(REGISTER_SAVE_BND1): Likewise.
(REGISTER_SAVE_BND3): Likewise.
(REGISTER_SAVE_RAX): Always defined to 0.
(VMOV): Removed.
(_dl_runtime_resolve_avx): Likewise.
(_dl_runtime_resolve_avx_slow): Likewise.
(_dl_runtime_resolve_avx_opt): Likewise.
(_dl_runtime_resolve_avx512): Likewise.
(_dl_runtime_resolve_avx512_opt): Likewise.
(_dl_runtime_resolve_sse): Likewise.
(_dl_runtime_resolve_sse_vex): Likewise.
(USE_FXSAVE): New.
(_dl_runtime_resolve_fxsave): Likewise.
(USE_XSAVE): Likewise.
(_dl_runtime_resolve_xsave): Likewise.
(USE_XSAVEC): Likewise.
(_dl_runtime_resolve_xsavec): Likewise.
* sysdeps/x86_64/dl-trampoline.h (_dl_runtime_resolve_avx512):
Removed.
(_dl_runtime_resolve_avx512_opt): Likewise.
(_dl_runtime_resolve_avx): Likewise.
(_dl_runtime_resolve_avx_opt): Likewise.
(_dl_runtime_resolve_sse): Likewise.
(_dl_runtime_resolve_sse_vex): Likewise.
(_dl_runtime_resolve_fxsave): New.
(_dl_runtime_resolve_xsave): Likewise.
(_dl_runtime_resolve_xsavec): Likewise.
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Add sysdep-cancel.h include.
* malloc/malloc.c (sysdep-cancel.h): Add include.
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This patch adds single-threaded fast paths to _int_free.
Bypass the explicit locking for larger allocations.
* malloc/malloc.c (_int_free): Add SINGLE_THREAD_P fast paths.
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Remove the bogus targets (and source) that supposedly build ga_test.
This code was added to resolv very early in the development process
but does not appear to be an actual test program. The target for
building this file is tests but because the glibc Make system is
built the way it is, the target is overriden by higher-level tests
targets and, therefore, the ga_test program is never built. Removing
the target and the source code makes the resolv/Makefile less confusing.
Tested by building and running 'make check' on 64 bit host running
Kernel 4.10.0-19 configured with
--prefix=/home/hawkinsw/code/glibc-build/install
--enable-hardcoded-path-in-tests
--disable-mathvec
Reviewed-by: Carlos O'Donell <carlos@redhat.com>
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[BZ #18812]
* localedata/SUPPORTED: Add kab_DZ/UTF-8.
* localedata/locales/kab_DZ: New file.
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When --enable-static-pie is used to configure glibc, we need to use
_dl_relocate_static_pie to compute load address in static PIE.
* sysdeps/m68k/dl-machine.h (elf_machine_load_address): Use
_dl_relocate_static_pie instead of _dl_start to compute load
address in static PIE.
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Since start.o may be compiled as PIC, we should check PIC instead of
SHARED.
* sysdeps/m68k/start.S (_start): Check PIC instead of SHARED.
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[BZ #13605]
* localedata/SUPPORTED: Add shn_MM/UTF-8.
* localedata/locales/shn_MM: New file.
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After commit 37f802f86400684c8d13403958b2c598721d6360 (Remove
__need_IOV_MAX and __need_FOPEN_MAX), UIO_MAXIOV is no longer supplied
(indirectly) through <bits/stdio_lim.h>, so sysdeps/posix/sysconf.c no
longer sees the definition.
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Regenerate libm-test-ulps for --disable-multi-arch.
* sysdeps/i386/fpu/libm-test-ulps: Regenerated.
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This patch adds a MIPS-specific bits/floatn.h header. This header is
identical to the ldbl-128 version except for the comment at the top;
the purpose is to ensure that a 32-bit MIPS build installs a header
that is the same as in a 64-bit MIPS build and so properly shows
_Float128 support to be available for 64-bit compilations, on the
general principle of an installation for one multilib providing
headers also suitable for other multilibs.
Tested with build-many-glibcs.py.
* sysdeps/mips/ieee754/bits/floatn.h: New file.
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Similar to bug 21987 for SPARC, MIPS64 wrongly installs the ldbl-128
version of bits/long-double.h, meaning incorrect results when using
headers installed from a 64-bit installation for a 32-bit build. (I
haven't actually seen this cause build failures before its interaction
with bits/floatn.h did so - installed headers wrongly expecting
_Float128 to be available in a 32-bit configuration.)
This patch fixes the bug by moving the MIPS header to
sysdeps/mips/ieee754, which comes before sysdeps/ieee754/ldbl-128 in
the sysdeps directory ordering. (bits/floatn.h will need a similar
fix - duplicating the ldbl-128 version for MIPS will suffice - for
headers from a 32-bit installation to be correct for 64-bit builds.)
Tested with build-many-glibcs.py (compilers build for
mips64-linux-gnu, where there was previously a libstdc++ build failure
as at
<https://sourceware.org/ml/libc-testresults/2017-q4/msg00130.html>).
[BZ #22322]
* sysdeps/mips/bits/long-double.h: Move to ....
* sysdeps/mips/ieee754/bits/long-double.h: ... here.
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This patch fixes a deadlock in the fastbin consistency check.
If we fail the fast check due to concurrent modifications to
the next chunk or system_mem, we should not lock if we already
have the arena lock. Simplify the check to make it obviously
correct.
* malloc/malloc.c (_int_free): Fix deadlock bug in consistency check.
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Since ld.so expands $PLATFORM with GLRO(dl_platform), don't set
GLRO(dl_platform) to NULL.
[BZ #22299]
* sysdeps/x86/cpu-features.c (init_cpu_features): Don't set
GLRO(dl_platform) to NULL.
* sysdeps/x86_64/Makefile (tests): Add tst-platform-1.
(modules-names): Add tst-platformmod-1 and
x86_64/tst-platformmod-2.
(CFLAGS-tst-platform-1.c): New.
(CFLAGS-tst-platformmod-1.c): Likewise.
(CFLAGS-tst-platformmod-2.c): Likewise.
(LDFLAGS-tst-platformmod-2.so): Likewise.
($(objpfx)tst-platform-1): Likewise.
($(objpfx)tst-platform-1.out): Likewise.
(tst-platform-1-ENV): Likewise.
($(objpfx)x86_64/tst-platformmod-2.os): Likewise.
* sysdeps/x86_64/tst-platform-1.c: New file.
* sysdeps/x86_64/tst-platformmod-1.c: Likewise.
* sysdeps/x86_64/tst-platformmod-2.c: Likewise.
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[BZ #13994]
* locale/iso-639.def: Add Karbi.
* localedata/SUPPORTED: Add mjw_IN/UTF-8.
* localedata/locales/mjw_IN: New file.
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This patch adds support for *f128 function aliases on platforms where
long double has the binary128 format (and thus GCC 7 provides the
_Float128 type with the same ABI as long double but as a distinct type
in terms of C type compatibility). This is the same API as provided
in glibc 2.26 for powerpc64le / x86_64 / x86 / ia64 where _Float128
has a different format from long double, with the bulk of the API
coming from TS 18661-3. All the functions alias the corresponding
long double functions, and __* function names are not provided since
those are only needed once for each floating-point format, not more
than once for different types with the same format (so for example,
-ffinite-math-only maps foof128 to __fool_finite, while type-generic
macros end up calling e.g. __issignalingl for _Float128 arguments on
such platforms).
The preparation for this feature was done in previous patches, so this
one just needs to add the relevant makefile and header definitions,
and update macro definitions of libm_alias_ldouble_other_r, to turn on
the feature, and update documentation and ABI baselines.
Tested (a) for x86_64, (b) for aarch64, (c) with build-many-glibcs.py
with both GCC 6 and GCC 7.
* sysdeps/ieee754/ldbl-128/Makeconfig: New file.
* sysdeps/ieee754/ldbl-128/bits/floatn.h: Likewise.
* sysdeps/ieee754/ldbl-128/float128-abi.h: Likewise.
* sysdeps/generic/libm-alias-ldouble.h: Include <bits/floatn.h>.
[__HAVE_FLOAT128 && !__HAVE_DISTINCT_FLOAT128]
(libm_alias_ldouble_other_r): Also create _Float128 alias.
* sysdeps/ieee754/ldbl-opt/libm-alias-ldouble.h: Include
<bits/floatn.h>.
[__HAVE_FLOAT128 && !__HAVE_DISTINCT_FLOAT128]
(libm_alias_ldouble_other_r): Also create _Float128 alias.
* manual/math.texi (Mathematics): Document additional architecture
support for _Float128.
* sysdeps/unix/sysv/linux/aarch64/libc.abilist: Update.
* sysdeps/unix/sysv/linux/aarch64/libm.abilist: Likewise.
* sysdeps/unix/sysv/linux/alpha/libc.abilist: Likewise.
* sysdeps/unix/sysv/linux/alpha/libm.abilist: Likewise.
* sysdeps/unix/sysv/linux/mips/mips64/libm.abilist: Likewise.
* sysdeps/unix/sysv/linux/mips/mips64/n32/libc.abilist: Likewise.
* sysdeps/unix/sysv/linux/mips/mips64/n64/libc.abilist: Likewise.
* sysdeps/unix/sysv/linux/s390/s390-32/libc.abilist: Likewise.
* sysdeps/unix/sysv/linux/s390/s390-32/libm.abilist: Likewise.
* sysdeps/unix/sysv/linux/s390/s390-64/libc.abilist: Likewise.
* sysdeps/unix/sysv/linux/s390/s390-64/libm.abilist: Likewise.
* sysdeps/unix/sysv/linux/sparc/sparc32/libc.abilist: Likewise.
* sysdeps/unix/sysv/linux/sparc/sparc32/libm.abilist: Likewise.
* sysdeps/unix/sysv/linux/sparc/sparc64/libc.abilist: Likewise.
* sysdeps/unix/sysv/linux/sparc/sparc64/libm.abilist: Likewise.
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This patch rewrites aarch64 elf_machine_load_address to use special _DYNAMIC
symbol instead of _dl_start.
The static address of _DYNAMIC symbol is stored in the first GOT entry.
Here is the change which makes this solution work (part of binutils 2.24):
https://sourceware.org/ml/binutils/2013-06/msg00248.html
i386, x86_64 targets use the same method to do this as well.
The original implementation relies on a trick that R_AARCH64_ABS32 relocation
being resolved at link time and the static address fits in the 32bits.
However, in LP64, normally, the address is defined to be 64 bit.
Here is the C version one which should be portable in all cases.
* sysdeps/aarch64/dl-machine.h (elf_machine_load_address): Use
_DYNAMIC symbol to calculate load address.
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A performance regression was introduced by commit
84d74e427a771906830800e574a72f8d25a954b8 "powerpc: Cleanup fenv_private.h".
In the powerpc implementation of SET_RESTORE_ROUND, there is the
following code in the "SET" function (slightly simplified):
--
old.fenv = fegetenv_register ();
new.l = (old.l & _FPU_MASK_TRAPS_RN) | r; (1)
if (new.l != old.l) (2)
{
if ((old.l & _FPU_ALL_TRAPS) != 0)
(void) __fe_mask_env ();
fesetenv_register (new.fenv); (3)
--
Line (1) sets the value of "new" to the current value of FPSCR,
but masks off summary bits, exceptions, non-IEEE mode, and
rounding mode, then ORs in the new rounding mode.
Line (2) compares this new value to the current value in order to
avoid setting a new value in the FPSCR (line (3)) unless something
significant has changed (exception enables or rounding mode).
The summary bits are not germane to the comparison, but are cleared
in "new" and preserved in "old", resulting in false negative
comparisons, and unnecessarily setting the FPSCR in those cases
with associated negative performance impacts.
The solution is to treat the summaries identically for "new" and "old":
- save them in SET
- leave them alone otherwise
- restore the saved values in RESTORE
Also minor changes:
- expand _FPU_MASK_RN to 64bit hex, to match other MASKs
- treat bit 52 (left-to-right) as reserved (since it is)
* sysdeps/powerpc/fpu/fenv_private.h (_FPU_MASK_TRAPS_RN):
(_FPU_MASK_FRAC_INEX_RET_CC): Fix masks to more properly handle
summary bits.
(_FPU_MASK_RN): Expand _FPU_MASK_RN to 64bit hex.
(_FPU_MASK_NOT_RN_NI): Treat bit 52 (left-to-right) as reserved.
Reviewed-by: Tulio Magno Quites Machado Filho <tuliom@linux.vnet.ibm.com>
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#16777]
[BZ #16777]
* localedata/locales/pl_PL (LC_MONETARY): Use U+202F as mon_thousands_sep
and improve readability by using more ASCII.
* localedata/locales/pl_PL (LC_NUMERIC): Use U+202F as thousands_sep
and improve readability by using more ASCII.
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* malloc/malloc.c (malloc_state): Use int for have_fastchunks since
not all targets support atomics on bool.
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When using compilers before GCC 7, include/float.h provides fallback
definitions of FLT128_* constants. These definitions use 'Q' constant
suffixes, which works for configurations with _Float128 ABI-distinct
from long double, but not where it has the same ABI as long double.
This patch changes the definitions to use the __f128 macro from
<bits/floatn.h>, so allowing them to work in the non-distinct
_Float128 case (where they are used in building glibc tests, not for
building glibc itself) as well.
Tested (a) with build-many-glibcs.py with GCC 6 (installed stripped
shared libraries unchanged by the patch); (b) with
build-many-glibcs.py with GCC 6 together with the main patch to enable
float128 aliases; (c) for x86_64 with both GCC 6 and GCC 7.
* include/float.h [!__GNUC_PREREQ (7, 0) && __HAVE_FLOAT128 &&
__GLIBC_USE (IEC_60559_TYPES_EXT)] (FLT128_MAX): Define using
__f128.
[!__GNUC_PREREQ (7, 0) && __HAVE_FLOAT128 && __GLIBC_USE
(IEC_60559_TYPES_EXT)] (FLT128_EPSILON): Likewise.
[!__GNUC_PREREQ (7, 0) && __HAVE_FLOAT128 && __GLIBC_USE
(IEC_60559_TYPES_EXT)] (FLT128_MIN): Likewise.
[!__GNUC_PREREQ (7, 0) && __HAVE_FLOAT128 && __GLIBC_USE
(IEC_60559_TYPES_EXT)] (FLT128_TRUE_MIN): Likewise.
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* bits/uio-ext.h (RWF_HIPRI, RWF_DSYNC, RWF_SYNC, RWF_NOWAIT): New
defines.
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The current malloc initialization is quite convoluted. Instead of
sometimes calling malloc_consolidate from ptmalloc_init, call
malloc_init_state early so that the main_arena is always initialized.
The special initialization can now be removed from malloc_consolidate.
This also fixes BZ #22159.
Check all calls to malloc_consolidate and remove calls that are
redundant initialization after ptmalloc_init, like in int_mallinfo
and __libc_mallopt (but keep the latter as consolidation is required for
set_max_fast). Update comments to improve clarity.
Remove impossible initialization check from _int_malloc, fix assert
in do_check_malloc_state to ensure arena->top != 0. Fix the obvious bugs
in do_check_free_chunk and do_check_remalloced_chunk to enable single
threaded malloc debugging (do_check_malloc_state is not thread safe!).
[BZ #22159]
* malloc/arena.c (ptmalloc_init): Call malloc_init_state.
* malloc/malloc.c (do_check_free_chunk): Fix build bug.
(do_check_remalloced_chunk): Fix build bug.
(do_check_malloc_state): Add assert that checks arena->top.
(malloc_consolidate): Remove initialization.
(int_mallinfo): Remove call to malloc_consolidate.
(__libc_mallopt): Clarify why malloc_consolidate is needed.
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Currently free typically uses 2 atomic operations per call. The have_fastchunks
flag indicates whether there are recently freed blocks in the fastbins. This
is purely an optimization to avoid calling malloc_consolidate too often and
avoiding the overhead of walking all fast bins even if all are empty during a
sequence of allocations. However using catomic_or to update the flag is
completely unnecessary since it can be changed into a simple boolean and
accessed using relaxed atomics. There is no change in multi-threaded behaviour
given the flag is already approximate (it may be set when there are no blocks in
any fast bins, or it may be clear when there are free blocks that could be
consolidated).
Performance of malloc/free improves by 27% on a simple benchmark on AArch64
(both single and multithreaded). The number of load/store exclusive instructions
is reduced by 33%. Bench-malloc-thread speeds up by ~3% in all cases.
* malloc/malloc.c (FASTCHUNKS_BIT): Remove.
(have_fastchunks): Remove.
(clear_fastchunks): Remove.
(set_fastchunks): Remove.
(malloc_state): Add have_fastchunks.
(malloc_init_state): Use have_fastchunks.
(do_check_malloc_state): Remove incorrect invariant checks.
(_int_malloc): Use have_fastchunks.
(_int_free): Likewise.
(malloc_consolidate): Likewise.
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The functions tcache_get and tcache_put show up in profiles as they
are a critical part of the tcache code. Inline them to give tcache
a 16% performance gain. Since this improves multi-threaded cases
as well, it helps offset any potential performance loss due to adding
single-threaded fast paths.
* malloc/malloc.c (tcache_put): Inline.
(tcache_get): Inline.
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This patch fixes the wrong -march name option used to define
the ARMv7-A glibc variant pushed on commit 3d26560.
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The Valencian (meridional Catalan) locale is basically a copy of the
Catalan locale. The point of having a separate locale is only for PO
translations. This locale is already provided by several distributions
and is already supported by various projects like LibreOffice, Mozilla,
Gnome, KDE.
Aurelien Jarno <aurelien@aurel32.net>
[BZ #2522]
* localedata/locales/ca_ES@valencia: New file.
* localedata/SUPPORTED: Add ca_ES@valencia/UTF-8.
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When using gcc < 6.x, signbit does not use the type-generic
__builtin_signbit builtin, instead it uses __MATH_TG.
However, when library support for float128 is available, __MATH_TG uses
__builtin_types_compatible_p, which is not available in C++ mode.
On the other hand, libstdc++ undefines (in cmath) many macros from
math.h, including signbit, so that it can provide its own functions.
However, during its configure tests, libstdc++ just tests for the
availability of the macros (it does not undefine them, nor does it
provide its own functions).
Finally, libstdc++ configure tests include math.h and get the definition
of signbit that uses __MATH_TG (and __builtin_types_compatible_p).
Since libstdc++ does not undefine the macros during its configure
tests, they fail.
This patch lets signbit use the builtin in C++ mode when gcc < 6.x is
used. This allows the configure test in libstdc++ to work.
Tested for x86_64.
[BZ #22296]
* math/math.h: Let signbit use the builtin in C++ mode with gcc
< 6.x
Cc: Gabriel F. T. Gomes <gftg@linux.vnet.ibm.com>
Cc: Joseph Myers <joseph@codesourcery.com>
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