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-rw-r--r--sysdeps/unix/sysv/linux/powerpc/powerpc32/setcontext-common.S4
-rw-r--r--sysdeps/unix/sysv/linux/powerpc/powerpc32/swapcontext-common.S4
-rw-r--r--sysdeps/unix/sysv/linux/powerpc/powerpc64/setcontext.S9
-rw-r--r--sysdeps/unix/sysv/linux/powerpc/powerpc64/swapcontext.S9
4 files changed, 22 insertions, 4 deletions
diff --git a/sysdeps/unix/sysv/linux/powerpc/powerpc32/setcontext-common.S b/sysdeps/unix/sysv/linux/powerpc/powerpc32/setcontext-common.S
index d83a0ef28d..127c9e4581 100644
--- a/sysdeps/unix/sysv/linux/powerpc/powerpc32/setcontext-common.S
+++ b/sysdeps/unix/sysv/linux/powerpc/powerpc32/setcontext-common.S
@@ -204,6 +204,8 @@ ENTRY(__CONTEXT_FUNC_NAME)
/* Use the extended four-operand version of the mtfsf insn. */
mtfsf 0xff,fp31,1,0
# else
+ .machine push
+ .machine "power6"
/* Availability of DFP indicates a 64-bit FPSCR. */
andi. r6,r7,PPC_FEATURE_HAS_DFP
beq 7f
@@ -212,7 +214,7 @@ ENTRY(__CONTEXT_FUNC_NAME)
b 8f
/* Continue to operate on the FPSCR as if it were 32-bits. */
7: mtfsf 0xff,fp31
-8:
+8: .machine pop
# endif /* _ARCH_PWR6 */
lfd fp1,_UC_FREGS+(1*8)(r31)
lfd fp2,_UC_FREGS+(2*8)(r31)
diff --git a/sysdeps/unix/sysv/linux/powerpc/powerpc32/swapcontext-common.S b/sysdeps/unix/sysv/linux/powerpc/powerpc32/swapcontext-common.S
index 243a66a0d4..89b1a61954 100644
--- a/sysdeps/unix/sysv/linux/powerpc/powerpc32/swapcontext-common.S
+++ b/sysdeps/unix/sysv/linux/powerpc/powerpc32/swapcontext-common.S
@@ -430,6 +430,8 @@ ENTRY(__CONTEXT_FUNC_NAME)
/* Use the extended four-operand version of the mtfsf insn. */
mtfsf 0xff,fp31,1,0
# else
+ .machine push
+ .machine "power6"
/* Availability of DFP indicates a 64-bit FPSCR. */
andi. r6,r7,PPC_FEATURE_HAS_DFP
beq 7f
@@ -438,7 +440,7 @@ ENTRY(__CONTEXT_FUNC_NAME)
b 8f
/* Continue to operate on the FPSCR as if it were 32-bits. */
7: mtfsf 0xff,fp31
-8:
+8: .machine pop
#endif /* _ARCH_PWR6 */
lfd fp1,_UC_FREGS+(1*8)(r31)
lfd fp2,_UC_FREGS+(2*8)(r31)
diff --git a/sysdeps/unix/sysv/linux/powerpc/powerpc64/setcontext.S b/sysdeps/unix/sysv/linux/powerpc/powerpc64/setcontext.S
index b4e28b4813..24413e00bc 100644
--- a/sysdeps/unix/sysv/linux/powerpc/powerpc64/setcontext.S
+++ b/sysdeps/unix/sysv/linux/powerpc/powerpc64/setcontext.S
@@ -1,5 +1,6 @@
/* Switch to context.
- Copyright (C) 2002, 2004, 2005, 2006, 2008 Free Software Foundation, Inc.
+ Copyright (C) 2002, 2004, 2005, 2006, 2008, 2009
+ Free Software Foundation, Inc.
This file is part of the GNU C Library.
The GNU C Library is free software; you can redistribute it and/or
@@ -86,6 +87,8 @@ ENTRY(__novec_setcontext)
/* Use the extended four-operand version of the mtfsf insn. */
mtfsf 0xff,fp0,1,0
# else
+ .machine push
+ .machine "power6"
/* Availability of DFP indicates a 64-bit FPSCR. */
andi. r6,r5,PPC_FEATURE_HAS_DFP
beq 5f
@@ -96,6 +99,7 @@ ENTRY(__novec_setcontext)
5:
mtfsf 0xff,fp0
6:
+ .machine pop
# endif /* _ARCH_PWR6 */
lfd fp29,(SIGCONTEXT_FP_REGS+(PT_R29*8))(r31)
lfd fp28,(SIGCONTEXT_FP_REGS+(PT_R28*8))(r31)
@@ -374,6 +378,8 @@ L(has_no_vec):
/* Use the extended four-operand version of the mtfsf insn. */
mtfsf 0xff,fp0,1,0
# else
+ .machine push
+ .machine "power6"
/* Availability of DFP indicates a 64-bit FPSCR. */
andi. r6,r5,PPC_FEATURE_HAS_DFP
beq 7f
@@ -384,6 +390,7 @@ L(has_no_vec):
7:
mtfsf 0xff,fp0
8:
+ .machine pop
# endif /* _ARCH_PWR6 */
lfd fp29,(SIGCONTEXT_FP_REGS+(PT_R29*8))(r31)
lfd fp28,(SIGCONTEXT_FP_REGS+(PT_R28*8))(r31)
diff --git a/sysdeps/unix/sysv/linux/powerpc/powerpc64/swapcontext.S b/sysdeps/unix/sysv/linux/powerpc/powerpc64/swapcontext.S
index c42ccfbe44..6c075a9a35 100644
--- a/sysdeps/unix/sysv/linux/powerpc/powerpc64/swapcontext.S
+++ b/sysdeps/unix/sysv/linux/powerpc/powerpc64/swapcontext.S
@@ -1,5 +1,6 @@
/* Save current context and install the given one.
- Copyright (C) 2002, 2004, 2005, 2006, 2008 Free Software Foundation, Inc.
+ Copyright (C) 2002, 2004, 2005, 2006, 2008, 2009
+ Free Software Foundation, Inc.
This file is part of the GNU C Library.
The GNU C Library is free software; you can redistribute it and/or
@@ -180,6 +181,8 @@ ENTRY(__novec_swapcontext)
/* Use the extended four-operand version of the mtfsf insn. */
mtfsf 0xff,fp0,1,0
# else
+ .machine push
+ .machine "power6"
/* Availability of DFP indicates a 64-bit FPSCR. */
andi. r6,r8,PPC_FEATURE_HAS_DFP
beq 5f
@@ -190,6 +193,7 @@ ENTRY(__novec_swapcontext)
5:
mtfsf 0xff,fp0
6:
+ .machine pop
#endif /* _ARCH_PWR6 */
lfd fp29,(SIGCONTEXT_FP_REGS+(PT_R29*8))(r31)
lfd fp28,(SIGCONTEXT_FP_REGS+(PT_R28*8))(r31)
@@ -672,6 +676,8 @@ L(has_no_vec2):
/* Use the extended four-operand version of the mtfsf insn. */
mtfsf 0xff,fp0,1,0
# else
+ .machine push
+ .machine "power6"
/* Availability of DFP indicates a 64-bit FPSCR. */
andi. r6,r8,PPC_FEATURE_HAS_DFP
beq 7f
@@ -682,6 +688,7 @@ L(has_no_vec2):
7:
mtfsf 0xff,fp0
8:
+ .machine pop
#endif /* _ARCH_PWR6 */
lfd fp29,(SIGCONTEXT_FP_REGS+(PT_R29*8))(r31)
lfd fp28,(SIGCONTEXT_FP_REGS+(PT_R28*8))(r31)