diff options
Diffstat (limited to 'sysdeps/powerpc')
| -rw-r--r-- | sysdeps/powerpc/bits/atomic.h | 54 | ||||
| -rw-r--r-- | sysdeps/powerpc/powerpc32/bits/atomic.h | 31 | ||||
| -rw-r--r-- | sysdeps/powerpc/powerpc64/bits/atomic.h | 26 |
3 files changed, 97 insertions, 14 deletions
diff --git a/sysdeps/powerpc/bits/atomic.h b/sysdeps/powerpc/bits/atomic.h index 4b6a761b72..31f27e9e10 100644 --- a/sysdeps/powerpc/bits/atomic.h +++ b/sysdeps/powerpc/bits/atomic.h @@ -147,6 +147,32 @@ typedef uintmax_t uatomic_max_t; __val; \ }) +#define __arch_atomic_increment_val_32(mem) \ + ({ \ + __typeof (*(mem)) __val; \ + __asm __volatile ("1: lwarx %0,0,%2\n" \ + " addi %0,%0,1\n" \ + " stwcx. %0,0,%2\n" \ + " bne- 1b" \ + : "=&b" (__val), "=m" (*mem) \ + : "b" (mem), "m" (*mem) \ + : "cr0", "memory"); \ + __val; \ + }) + +#define __arch_atomic_decrement_val_32(mem) \ + ({ \ + __typeof (*(mem)) __val; \ + __asm __volatile ("1: lwarx %0,0,%2\n" \ + " subi %0,%0,1\n" \ + " stwcx. %0,0,%2\n" \ + " bne- 1b" \ + : "=&b" (__val), "=m" (*mem) \ + : "b" (mem), "m" (*mem) \ + : "cr0", "memory"); \ + __val; \ + }) + #define __arch_atomic_decrement_if_positive_32(mem) \ ({ int __val, __tmp; \ __asm __volatile ("1: lwarx %0,0,%3\n" \ @@ -222,6 +248,34 @@ typedef uintmax_t uatomic_max_t; __result; \ }) +#define atomic_increment_val(mem) \ + ({ \ + __typeof (*(mem)) __result; \ + if (sizeof (*(mem)) == 4) \ + __result = __arch_atomic_increment_val_32 (mem); \ + else if (sizeof (*(mem)) == 8) \ + __result = __arch_atomic_increment_val_64 (mem); \ + else \ + abort (); \ + __result; \ + }) + +#define atomic_increment(mem) ({ atomic_increment_val (mem); (void) 0; }) + +#define atomic_decrement_val(mem) \ + ({ \ + __typeof (*(mem)) __result; \ + if (sizeof (*(mem)) == 4) \ + __result = __arch_atomic_decrement_val_32 (mem); \ + else if (sizeof (*(mem)) == 8) \ + __result = __arch_atomic_decrement_val_64 (mem); \ + else \ + abort (); \ + __result; \ + }) + +#define atomic_decrement(mem) ({ atomic_decrement_val (mem); (void) 0; }) + /* Decrement *MEM if it is > 0, and return the old value. */ #define atomic_decrement_if_positive(mem) \ diff --git a/sysdeps/powerpc/powerpc32/bits/atomic.h b/sysdeps/powerpc/powerpc32/bits/atomic.h index 4e2e24335d..0f1a72335f 100644 --- a/sysdeps/powerpc/powerpc32/bits/atomic.h +++ b/sysdeps/powerpc/powerpc32/bits/atomic.h @@ -1,5 +1,5 @@ /* Atomic operations. PowerPC32 version. - Copyright (C) 2003 Free Software Foundation, Inc. + Copyright (C) 2003, 2004 Free Software Foundation, Inc. This file is part of the GNU C Library. Contributed by Paul Mackerras <paulus@au.ibm.com>, 2003. @@ -56,17 +56,15 @@ __tmp != 0; \ }) -/* - * Powerpc32 processors don't implement the 64-bit (doubleword) forms of - * load and reserve (ldarx) and store conditional (stdcx.) instructions. - * So for powerpc32 we stub out the 64-bit forms. - */ +/* Powerpc32 processors don't implement the 64-bit (doubleword) forms of + load and reserve (ldarx) and store conditional (stdcx.) instructions. + So for powerpc32 we stub out the 64-bit forms. */ # define __arch_compare_and_exchange_bool_64_acq(mem, newval, oldval) \ (abort (), 0) # define __arch_compare_and_exchange_val_64_acq(mem, newval, oldval) \ (abort (), (__typeof (*mem)) 0) - + # define __arch_compare_and_exchange_bool_64_rel(mem, newval, oldval) \ (abort (), 0) @@ -82,19 +80,24 @@ # define __arch_atomic_exchange_and_add_64(mem, value) \ ({ abort (); (*mem) = (value); }) +# define __arch_atomic_increment_val_64(mem) \ + ({ abort (); (*mem)++; }) + +# define __arch_atomic_decrement_val_64(mem) \ + ({ abort (); (*mem)--; }) + # define __arch_atomic_decrement_if_positive_64(mem) \ ({ abort (); (*mem)--; }) - -/* - * Older powerpc32 processors don't support the new "light weight" - * sync (lwsync). So the only safe option is to use normal sync - * for all powerpc32 applications. + +/* + * Older powerpc32 processors don't support the new "light weight" + * sync (lwsync). So the only safe option is to use normal sync + * for all powerpc32 applications. */ # define atomic_read_barrier() __asm ("sync" ::: "memory") /* * Include the rest of the atomic ops macros which are common to both - * powerpc32 and powerpc64. + * powerpc32 and powerpc64. */ #include_next <bits/atomic.h> - diff --git a/sysdeps/powerpc/powerpc64/bits/atomic.h b/sysdeps/powerpc/powerpc64/bits/atomic.h index fa25678410..e46dc1e4d7 100644 --- a/sysdeps/powerpc/powerpc64/bits/atomic.h +++ b/sysdeps/powerpc/powerpc64/bits/atomic.h @@ -168,6 +168,32 @@ __val; \ }) +# define __arch_atomic_increment_val_64(mem) \ + ({ \ + __typeof (*(mem)) __val; \ + __asm __volatile ("1: ldarx %0,0,%2\n" \ + " addi %0,%0,1\n" \ + " stdcx. %0,0,%2\n" \ + " bne- 1b" \ + : "=&b" (__val), "=m" (*mem) \ + : "b" (mem), "m" (*mem) \ + : "cr0", "memory"); \ + __val; \ + }) + +# define __arch_atomic_decrement_val_64(mem) \ + ({ \ + __typeof (*(mem)) __val; \ + __asm __volatile ("1: ldarx %0,0,%2\n" \ + " subi %0,%0,1\n" \ + " stdcx. %0,0,%2\n" \ + " bne- 1b" \ + : "=&b" (__val), "=m" (*mem) \ + : "b" (mem), "m" (*mem) \ + : "cr0", "memory"); \ + __val; \ + }) + # define __arch_atomic_decrement_if_positive_64(mem) \ ({ int __val, __tmp; \ __asm __volatile ("1: ldarx %0,0,%3\n" \ |