7 files changed, 10 insertions, 14 deletions
diff --git a/sysdeps/ia64/fpu/fclrexcpt.c b/sysdeps/ia64/fpu/fclrexcpt.c
index fbd93ce5da..40ba1792ed 100644
--- a/sysdeps/ia64/fpu/fclrexcpt.c
+++ b/sysdeps/ia64/fpu/fclrexcpt.c
@@ -30,7 +30,7 @@ feclearexcept (int excepts)
   __asm__ __volatile__ ("mov.m %0=ar.fpsr" : "=r" (fpsr));
 
   /* Clear the relevant bits.  */
-  fpsr &= ~(((unsigned long int) ((excepts & FE_ALL_EXCEPT) << 13)));
+  fpsr &= ~(((fenv_t) ((excepts & FE_ALL_EXCEPT) << 13)));
   /* Put the new state in effect.  */
   __asm__ __volatile__ ("mov.m ar.fpsr=%0" :: "r" (fpsr) : "memory");
 
diff --git a/sysdeps/ia64/fpu/fedisblxcpt.c b/sysdeps/ia64/fpu/fedisblxcpt.c
index fceedc22be..1006e033e5 100644
--- a/sysdeps/ia64/fpu/fedisblxcpt.c
+++ b/sysdeps/ia64/fpu/fedisblxcpt.c
@@ -29,7 +29,7 @@ fedisableexcept (int excepts)
   /* Get the current fpsr.  */
   __asm__ __volatile__ ("mov.m %0=ar.fpsr" : "=r" (old_fpsr));
 
-  new_fpsr = old_fpsr |= FE_ALL_EXCEPT;
+  new_fpsr = old_fpsr | ((fenv_t) excepts & FE_ALL_EXCEPT);
 
   __asm__ __volatile__ ("mov.m ar.fpsr=%0" :: "r" (new_fpsr) : "memory");
 
diff --git a/sysdeps/ia64/fpu/feenablxcpt.c b/sysdeps/ia64/fpu/feenablxcpt.c
index 2c54476681..686b7505cc 100644
--- a/sysdeps/ia64/fpu/feenablxcpt.c
+++ b/sysdeps/ia64/fpu/feenablxcpt.c
@@ -29,8 +29,7 @@ feenableexcept (int excepts)
   /* Get the current fpsr.  */
   __asm__ __volatile__ ("mov.m %0=ar.fpsr" : "=r " (old_fpsr));
 
-  new_fpsr = ((old_fpsr & FE_ALL_EXCEPT)
-	      | (old_fpsr & ((unsigned long int) excepts ^ FE_ALL_EXCEPT)));
+  new_fpsr = old_fpsr & ~((fenv_t) excepts & FE_ALL_EXCEPT);
 
   __asm__ __volatile__ ("mov.m ar.fpsr=%0" :: "r" (new_fpsr) : "memory");
 
diff --git a/sysdeps/ia64/fpu/fesetenv.c b/sysdeps/ia64/fpu/fesetenv.c
index b1209ca34e..79651ea1ce 100644
--- a/sysdeps/ia64/fpu/fesetenv.c
+++ b/sysdeps/ia64/fpu/fesetenv.c
@@ -30,8 +30,8 @@ fesetenv (const fenv_t *envp)
      Magic encoding of default values: bit 62+63 set (which will never
      happen for a user-space address) means it's not indirect.
   */
-  if (((unsigned long int) envp >> 62) == 0x03)
-    env = (unsigned long int) envp & 0x3fffffffffffffff;
+  if (((fenv_t) envp >> 62) == 0x03)
+    env = (fenv_t) envp & 0x3fffffffffffffff;
   else
     env = *envp;
 
diff --git a/sysdeps/ia64/fpu/fesetround.c b/sysdeps/ia64/fpu/fesetround.c
index 66d7f89f39..7738eb209e 100644
--- a/sysdeps/ia64/fpu/fesetround.c
+++ b/sysdeps/ia64/fpu/fesetround.c
@@ -23,7 +23,7 @@
 int
 fesetround (int round)
 {
-  unsigned long int fpsr;
+  fenv_t fpsr;
 
   if (round & ~3)
     return 0;
@@ -32,7 +32,7 @@ fesetround (int round)
   __asm__ __volatile__ ("mov.m %0=ar.fpsr" : "=r" (fpsr));
 
   /* Set the relevant bits.  */
-  fpsr = (fpsr & ~(3UL << 10)) | ((unsigned long int) round << 10);
+  fpsr = (fpsr & ~(3UL << 10)) | ((fenv_t) round << 10);
 
   /* Put the new state in effect.  */
   __asm__ __volatile__ ("mov.m ar.fpsr=%0" :: "r" (fpsr) : "memory");
diff --git a/sysdeps/ia64/fpu/fgetexcptflg.c b/sysdeps/ia64/fpu/fgetexcptflg.c
index 555530762d..46a04e3f2c 100644
--- a/sysdeps/ia64/fpu/fgetexcptflg.c
+++ b/sysdeps/ia64/fpu/fgetexcptflg.c
@@ -28,7 +28,7 @@ fegetexceptflag (fexcept_t *flagp, int excepts)
   /* Get the current exceptions.  */
   __asm__ __volatile__ ("mov.m %0=ar.fpsr" : "=r" (fpsr));
 
-  *flagp = (fpsr ^ FE_ALL_EXCEPT) & excepts & FE_ALL_EXCEPT;
+  *flagp = (fexcept_t) ((fpsr >> 13) & excepts & FE_ALL_EXCEPT);
 
   /* Success.  */
   return 0;
diff --git a/sysdeps/ia64/fpu/fsetexcptflg.c b/sysdeps/ia64/fpu/fsetexcptflg.c
index 5e040416d4..69643636c3 100644
--- a/sysdeps/ia64/fpu/fsetexcptflg.c
+++ b/sysdeps/ia64/fpu/fsetexcptflg.c
@@ -19,7 +19,6 @@
    Boston, MA 02111-1307, USA.  */
 
 #include <fenv.h>
-#include <math.h>
 
 int
 fesetexceptflag (const fexcept_t *flagp, int excepts)
@@ -29,12 +28,10 @@ fesetexceptflag (const fexcept_t *flagp, int excepts)
   /* Get the current exception state.  */
   __asm__ __volatile__ ("mov.m %0=ar.fpsr" : "=r" (fpsr));
 
-  /* Get the reverse bits so we can enable the exceptions flagged
-     rather than disable them.  */
-  excepts ^= FE_ALL_EXCEPT;
+  fpsr &= ~(((fenv_t) excepts & FE_ALL_EXCEPT) << 13);
 
   /* Set all the bits that were called for.  */
-  fpsr = (fpsr & ~FE_ALL_EXCEPT) | (*flagp & excepts & FE_ALL_EXCEPT);
+  fpsr |= ((*flagp & excepts & FE_ALL_EXCEPT) << 13);
 
   /* And store it back.  */
   __asm__ __volatile__ ("mov.m ar.fpsr=%0" :: "r" (fpsr) : "memory");