8 files changed, 17 insertions, 17 deletions
diff --git a/ports/sysdeps/mips/fpu/fgetexcptflg.c b/ports/sysdeps/mips/fpu/fgetexcptflg.c
index b620d2efa4..436ba3e3f8 100644
--- a/ports/sysdeps/mips/fpu/fgetexcptflg.c
+++ b/ports/sysdeps/mips/fpu/fgetexcptflg.c
@@ -28,7 +28,7 @@ fegetexceptflag (fexcept_t *flagp, int excepts)
   /* Get the current exceptions.  */
   _FPU_GETCW (temp);
 
-  /* We only save the relevant bits here. In particular, care has to be 
+  /* We only save the relevant bits here. In particular, care has to be
      taken with the CAUSE bits, as an inadvertent restore later on could
      generate unexpected exceptions.  */
 
diff --git a/ports/sysdeps/mips/fpu/fraiseexcpt.c b/ports/sysdeps/mips/fpu/fraiseexcpt.c
index ca96250034..afd966ac85 100644
--- a/ports/sysdeps/mips/fpu/fraiseexcpt.c
+++ b/ports/sysdeps/mips/fpu/fraiseexcpt.c
@@ -29,7 +29,7 @@ feraiseexcept (int excepts)
   /* Get current state.  */
   _FPU_GETCW (cw);
 
-  /* Set flag bits (which are accumulative), and *also* set the 
+  /* Set flag bits (which are accumulative), and *also* set the
      cause bits. The setting of the cause bits is what actually causes
      the hardware to generate the exception, if the corresponding enable
      bit is set as well.  */
diff --git a/ports/sysdeps/mips/memset.S b/ports/sysdeps/mips/memset.S
index 78dab481dd..85062fe2e2 100644
--- a/ports/sysdeps/mips/memset.S
+++ b/ports/sysdeps/mips/memset.S
@@ -42,7 +42,7 @@ ENTRY (memset)
 	sll	t0, a1, 16
 	or	a1, t0			# a1 is now pattern in full word
 
-L(ueven):	
+L(ueven):
 	subu	t0, zero, a0		# Unaligned address?
 	andi	t0, 0x3
 	beq	t0, zero, L(chkw)
@@ -50,33 +50,33 @@ L(ueven):
 	SWHI	a1, 0(a0)		# Yes, handle first unaligned part
 	addu	a0, t0			# Now both a0 and a2 are updated
 
-L(chkw):	
+L(chkw):
 	andi	t0, a2, 0x7		# Enough left for one loop iteration?
 	beq	t0, a2, L(chkl)
 	subu	a3, a2, t0
 	addu	a3, a0			# a3 is last loop address +1
 	move	a2, t0			# a2 is now # of bytes left after loop
-L(loopw):	
+L(loopw):
 	addiu	a0, 8			# Handle 2 words pr. iteration
 	sw	a1, -8(a0)
 	bne	a0, a3, L(loopw)
 	sw	a1, -4(a0)
 
-L(chkl):	
+L(chkl):
 	andi	t0, a2, 0x4		# Check if there is at least a full
 	beq	t0, zero, L(last8)	#  word remaining after the loop
 	subu	a2, t0
 	sw	a1, 0(a0)		# Yes...
 	addiu	a0, 4
 
-L(last8):	
+L(last8):
 	blez	a2, L(exit)		# Handle last 8 bytes (if cnt>0)
 	addu	a3, a2, a0		# a3 is last address +1
-L(lst8l):	
+L(lst8l):
 	addiu	a0, 1
 	bne	a0, a3, L(lst8l)
 	sb	a1, -1(a0)
-L(exit):	
+L(exit):
 	j	ra			# Bye, bye
 	nop
 
diff --git a/ports/sysdeps/mips/mips64/bsd-_setjmp.S b/ports/sysdeps/mips/mips64/bsd-_setjmp.S
index 5d0f76c13c..d0416a70b0 100644
--- a/ports/sysdeps/mips/mips64/bsd-_setjmp.S
+++ b/ports/sysdeps/mips/mips64/bsd-_setjmp.S
@@ -35,7 +35,7 @@ ENTRY (_setjmp)
 	PTR_LA t9, C_SYMBOL_NAME (__sigsetjmp)
 #if _MIPS_SIM == _ABIO32
 	nop
-#endif	
+#endif
 	RESTORE_GP64_REG
 	move	a1, zero		/* Pass a second argument of zero.  */
 #ifdef __PIC__
diff --git a/ports/sysdeps/mips/mips64/bsd-setjmp.S b/ports/sysdeps/mips/mips64/bsd-setjmp.S
index 784e16e33f..7203540e7b 100644
--- a/ports/sysdeps/mips/mips64/bsd-setjmp.S
+++ b/ports/sysdeps/mips/mips64/bsd-setjmp.S
@@ -35,7 +35,7 @@ ENTRY (setjmp)
 	PTR_LA t9, C_SYMBOL_NAME (__sigsetjmp)
 #if _MIPS_SIM == _ABIO32
 	nop
-#endif	
+#endif
 	RESTORE_GP64_REG
 	dli a1, 1		/* Pass a second argument of one.  */
 #ifdef __PIC__
diff --git a/ports/sysdeps/mips/mips64/memset.S b/ports/sysdeps/mips/mips64/memset.S
index 382b0f4820..6453335266 100644
--- a/ports/sysdeps/mips/mips64/memset.S
+++ b/ports/sysdeps/mips/mips64/memset.S
@@ -22,7 +22,7 @@
 
 
 /* void *memset(void *s, int c, size_t n);
-	
+
    This could probably be optimized further.  */
 
 #if __MIPSEB
diff --git a/ports/sysdeps/mips/mips64/setjmp.S b/ports/sysdeps/mips/mips64/setjmp.S
index 5afbbe7562..f0aa814c65 100644
--- a/ports/sysdeps/mips/mips64/setjmp.S
+++ b/ports/sysdeps/mips/mips64/setjmp.S
@@ -35,7 +35,7 @@ ENTRY (__sigsetjmp)
 	PTR_LA t9, __sigsetjmp_aux
 #if _MIPS_SIM == _ABIO32
 	nop
-#endif	
+#endif
 	RESTORE_GP64_REG
 #if _MIPS_SIM != _ABIO32
 	move a4, gp
diff --git a/ports/sysdeps/mips/start.S b/ports/sysdeps/mips/start.S
index 83a68959a3..75ab477395 100644
--- a/ports/sysdeps/mips/start.S
+++ b/ports/sysdeps/mips/start.S
@@ -70,7 +70,7 @@
 		      char **argv, void (*init) (void), void (*fini) (void),
 		      void (*rtld_fini) (void), void *stack_end)
 */
-	
+
 	.text
 	.globl ENTRY_POINT
 	.type ENTRY_POINT,@function
@@ -87,11 +87,11 @@ ENTRY_POINT:
 	PTR_LA $4, main		/* main */
 	PTR_L $5, 0($29)		/* argc */
 	PTR_ADDIU $6, $29, PTRSIZE	/* argv  */
-	
+
 	/* Allocate space on the stack for seven arguments (o32 only)
-	   and make sure the stack is aligned to double words (8 bytes) 
+	   and make sure the stack is aligned to double words (8 bytes)
 	   on o32 and quad words (16 bytes) on n32 and n64.  */
-	
+
 	and $29, -2 * SZREG
 # if _MIPS_SIM == _ABIO32
 	PTR_SUBIU $29, 32