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-rw-r--r--REORG.TODO/sysdeps/unix/sysv/linux/sh/sh4/getcontext.S132
-rw-r--r--REORG.TODO/sysdeps/unix/sysv/linux/sh/sh4/register-dump.h263
-rw-r--r--REORG.TODO/sysdeps/unix/sysv/linux/sh/sh4/setcontext.S141
-rw-r--r--REORG.TODO/sysdeps/unix/sysv/linux/sh/sh4/swapcontext.S218
-rw-r--r--REORG.TODO/sysdeps/unix/sysv/linux/sh/sh4/sysdep.h4
-rw-r--r--REORG.TODO/sysdeps/unix/sysv/linux/sh/sh4/ucontext_i.sym73
6 files changed, 831 insertions, 0 deletions
diff --git a/REORG.TODO/sysdeps/unix/sysv/linux/sh/sh4/getcontext.S b/REORG.TODO/sysdeps/unix/sysv/linux/sh/sh4/getcontext.S
new file mode 100644
index 0000000000..40cabd1d91
--- /dev/null
+++ b/REORG.TODO/sysdeps/unix/sysv/linux/sh/sh4/getcontext.S
@@ -0,0 +1,132 @@
+/* Save current context.
+ Copyright (C) 2005-2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <sysdep.h>
+
+#include "ucontext_i.h"
+
+/* int __getcontext (ucontext_t *uc); */
+
+ .text
+ .align 5
+ENTRY(__getcontext)
+
+ /* Return value of getcontext. R0 is the only register whose
+ value is not preserved. */
+ mov #0, r0
+ mov.l r0, @(oR0,r4)
+ mov.l r1, @(oR1,r4)
+ mov.l r2, @(oR2,r4)
+ mov.l r3, @(oR3,r4)
+ mov.l r4, @(oR4,r4)
+ mov.l r5, @(oR5,r4)
+ mov.l r6, @(oR6,r4)
+ mov.l r7, @(oR7,r4)
+ mov r4, r0
+ add #(oMACL+4), r0
+ sts.l macl, @-r0
+ sts.l mach, @-r0
+ stc.l gbr, @-r0
+
+ /* Save T flag to SR. */
+ movt r1
+ mov.l r1, @-r0
+ sts.l pr, @-r0
+
+ /* The return address of getcontext is the restart pc. */
+ sts.l pr, @-r0
+
+ mov.l r15, @-r0
+ mov.l r14, @-r0
+ mov.l r13, @-r0
+ mov.l r12, @-r0
+ mov.l r11, @-r0
+ mov.l r10, @-r0
+ mov.l r9, @-r0
+ mov.l r8, @-r0
+
+#ifdef __SH_FPU_ANY__
+ mov r4, r0
+ /* We need 2 add instruction because oFPUL+4 > 127. */
+ add #124,r0
+ add #(oFPUL+4-124),r0
+ sts.l fpul, @-r0
+ sts.l fpscr, @-r0
+ frchg
+ fmov.s fr15, @-r0
+ fmov.s fr14, @-r0
+ fmov.s fr13, @-r0
+ fmov.s fr12, @-r0
+ fmov.s fr11, @-r0
+ fmov.s fr10, @-r0
+ fmov.s fr9, @-r0
+ fmov.s fr8, @-r0
+ fmov.s fr7, @-r0
+ fmov.s fr6, @-r0
+ fmov.s fr5, @-r0
+ fmov.s fr4, @-r0
+ fmov.s fr3, @-r0
+ fmov.s fr2, @-r0
+ fmov.s fr1, @-r0
+ fmov.s fr0, @-r0
+ frchg
+ fmov.s fr15, @-r0
+ fmov.s fr14, @-r0
+ fmov.s fr13, @-r0
+ fmov.s fr12, @-r0
+ fmov.s fr11, @-r0
+ fmov.s fr10, @-r0
+ fmov.s fr9, @-r0
+ fmov.s fr8, @-r0
+ fmov.s fr7, @-r0
+ fmov.s fr6, @-r0
+ fmov.s fr5, @-r0
+ fmov.s fr4, @-r0
+ fmov.s fr3, @-r0
+ fmov.s fr2, @-r0
+ fmov.s fr1, @-r0
+ fmov.s fr0, @-r0
+#endif /* __SH_FPU_ANY__ */
+
+ /* sigprocmask (SIG_BLOCK, NULL, &uc->uc_sigmask). */
+ mov r4, r6
+ /* We need 2 add instruction because oSIGMASK > 127. */
+ add #(oSIGMASK/2), r6
+ add #(oSIGMASK/2), r6
+ mov #SIG_BLOCK, r4
+ mov #0, r5
+ mov #+SYS_ify(sigprocmask), r3
+ trapa #0x13
+ mov r0, r1
+ mov #-12, r2
+ shad r2, r1
+ not r1, r1 // r1=0 means r0 = -1 to -4095
+ tst r1, r1 // i.e. error in linux
+ bf .Lgetcontext_end
+.Lsyscall_error:
+ SYSCALL_ERROR_HANDLER
+.Lgetcontext_end:
+ /* All done, return 0 for success. */
+ mov #0, r0
+.Lpseudo_end:
+ rts
+ nop
+
+PSEUDO_END(__getcontext)
+
+weak_alias (__getcontext, getcontext)
diff --git a/REORG.TODO/sysdeps/unix/sysv/linux/sh/sh4/register-dump.h b/REORG.TODO/sysdeps/unix/sysv/linux/sh/sh4/register-dump.h
new file mode 100644
index 0000000000..5595e90d91
--- /dev/null
+++ b/REORG.TODO/sysdeps/unix/sysv/linux/sh/sh4/register-dump.h
@@ -0,0 +1,263 @@
+/* Dump registers.
+ Copyright (C) 1999-2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <sys/uio.h>
+#include <_itoa.h>
+
+/* We will print the register dump in this format:
+
+ R0: XXXXXXXX R1: XXXXXXXX R2: XXXXXXXX R3: XXXXXXXX
+ R4: XXXXXXXX R5: XXXXXXXX R6: XXXXXXXX R7: XXXXXXXX
+ R8: XXXXXXXX R9: XXXXXXXX R10: XXXXXXXX R11: XXXXXXXX
+ R12: XXXXXXXX R13: XXXXXXXX R14: XXXXXXXX R15: XXXXXXXX
+
+MACL: XXXXXXXX MACH: XXXXXXXX
+
+ PC: XXXXXXXX PR: XXXXXXXX GBR: XXXXXXXX SR: XXXXXXXX
+
+ FR0: XXXXXXXX FR1: XXXXXXXX FR2: XXXXXXXX FR3: XXXXXXXX
+ FR4: XXXXXXXX FR5: XXXXXXXX FR6: XXXXXXXX FR7: XXXXXXXX
+ FR8: XXXXXXXX FR9: XXXXXXXX FR10: XXXXXXXX FR11: XXXXXXXX
+FR12: XXXXXXXX FR13: XXXXXXXX FR14: XXXXXXXX FR15: XXXXXXXX
+
+ XR0: XXXXXXXX XR1: XXXXXXXX XR2: XXXXXXXX XR3: XXXXXXXX
+ XR4: XXXXXXXX XR5: XXXXXXXX XR6: XXXXXXXX XR7: XXXXXXXX
+ XR8: XXXXXXXX XR9: XXXXXXXX XR10: XXXXXXXX XR11: XXXXXXXX
+XR12: XXXXXXXX XR13: XXXXXXXX XR14: XXXXXXXX XR15: XXXXXXXX
+
+FPSCR: XXXXXXXX FPUL: XXXXXXXX
+
+ */
+
+static void
+hexvalue (unsigned long int value, char *buf, size_t len)
+{
+ char *cp = _itoa_word (value, buf + len, 16, 0);
+ while (cp > buf)
+ *--cp = '0';
+}
+
+static void
+register_dump (int fd, struct sigcontext *ctx)
+{
+ char regs[22][8];
+ struct iovec iov[22 * 2 + 34 * 2 + 2];
+ size_t nr = 0;
+
+#define ADD_STRING(str) \
+ iov[nr].iov_base = (char *) str; \
+ iov[nr].iov_len = strlen (str); \
+ ++nr
+#define ADD_MEM(str, len) \
+ iov[nr].iov_base = str; \
+ iov[nr].iov_len = len; \
+ ++nr
+
+ /* Generate strings of register contents. */
+ hexvalue (ctx->sc_regs[0], regs[0], 8);
+ hexvalue (ctx->sc_regs[1], regs[1], 8);
+ hexvalue (ctx->sc_regs[2], regs[2], 8);
+ hexvalue (ctx->sc_regs[3], regs[3], 8);
+ hexvalue (ctx->sc_regs[4], regs[4], 8);
+ hexvalue (ctx->sc_regs[5], regs[5], 8);
+ hexvalue (ctx->sc_regs[6], regs[6], 8);
+ hexvalue (ctx->sc_regs[7], regs[7], 8);
+ hexvalue (ctx->sc_regs[8], regs[8], 8);
+ hexvalue (ctx->sc_regs[9], regs[9], 8);
+ hexvalue (ctx->sc_regs[10], regs[10], 8);
+ hexvalue (ctx->sc_regs[11], regs[11], 8);
+ hexvalue (ctx->sc_regs[12], regs[12], 8);
+ hexvalue (ctx->sc_regs[13], regs[13], 8);
+ hexvalue (ctx->sc_regs[14], regs[14], 8);
+ hexvalue (ctx->sc_regs[15], regs[15], 8);
+ hexvalue (ctx->sc_macl, regs[16], 8);
+ hexvalue (ctx->sc_mach, regs[17], 8);
+ hexvalue (ctx->sc_pc, regs[18], 8);
+ hexvalue (ctx->sc_pr, regs[19], 8);
+ hexvalue (ctx->sc_gbr, regs[20], 8);
+ hexvalue (ctx->sc_sr, regs[21], 8);
+
+ /* Generate the output. */
+ ADD_STRING ("Register dump:\n\n R0: ");
+ ADD_MEM (regs[0], 8);
+ ADD_STRING (" R1: ");
+ ADD_MEM (regs[1], 8);
+ ADD_STRING (" R2: ");
+ ADD_MEM (regs[2], 8);
+ ADD_STRING (" R3: ");
+ ADD_MEM (regs[3], 8);
+ ADD_STRING ("\n R4: ");
+ ADD_MEM (regs[4], 8);
+ ADD_STRING (" R5: ");
+ ADD_MEM (regs[5], 8);
+ ADD_STRING (" R6: ");
+ ADD_MEM (regs[6], 8);
+ ADD_STRING (" R7: ");
+ ADD_MEM (regs[7], 8);
+ ADD_STRING ("\n R8: ");
+ ADD_MEM (regs[8], 8);
+ ADD_STRING (" R9: ");
+ ADD_MEM (regs[9], 8);
+ ADD_STRING (" R10: ");
+ ADD_MEM (regs[10], 8);
+ ADD_STRING (" R11: ");
+ ADD_MEM (regs[11], 8);
+ ADD_STRING ("\n R12: ");
+ ADD_MEM (regs[12], 8);
+ ADD_STRING (" R13: ");
+ ADD_MEM (regs[13], 8);
+ ADD_STRING (" R14: ");
+ ADD_MEM (regs[14], 8);
+ ADD_STRING (" R15: ");
+ ADD_MEM (regs[15], 8);
+
+ ADD_STRING ("\n\nMACL: ");
+ ADD_MEM (regs[16], 8);
+ ADD_STRING (" MACH: ");
+ ADD_MEM (regs[17], 8);
+
+ ADD_STRING ("\n\n PC: ");
+ ADD_MEM (regs[18], 8);
+ ADD_STRING (" PR: ");
+ ADD_MEM (regs[19], 8);
+ ADD_STRING (" GBR: ");
+ ADD_MEM (regs[20], 8);
+ ADD_STRING (" SR: ");
+ ADD_MEM (regs[21], 8);
+
+ ADD_STRING ("\n");
+
+#ifdef __SH_FPU_ANY__
+ char fpregs[34][8];
+ if (ctx->sc_ownedfp != 0)
+ {
+ hexvalue (ctx->sc_fpregs[0], fpregs[0], 8);
+ hexvalue (ctx->sc_fpregs[1], fpregs[1], 8);
+ hexvalue (ctx->sc_fpregs[2], fpregs[2], 8);
+ hexvalue (ctx->sc_fpregs[3], fpregs[3], 8);
+ hexvalue (ctx->sc_fpregs[4], fpregs[4], 8);
+ hexvalue (ctx->sc_fpregs[5], fpregs[5], 8);
+ hexvalue (ctx->sc_fpregs[6], fpregs[6], 8);
+ hexvalue (ctx->sc_fpregs[7], fpregs[7], 8);
+ hexvalue (ctx->sc_fpregs[8], fpregs[8], 8);
+ hexvalue (ctx->sc_fpregs[9], fpregs[9], 8);
+ hexvalue (ctx->sc_fpregs[10], fpregs[10], 8);
+ hexvalue (ctx->sc_fpregs[11], fpregs[11], 8);
+ hexvalue (ctx->sc_fpregs[12], fpregs[12], 8);
+ hexvalue (ctx->sc_fpregs[13], fpregs[13], 8);
+ hexvalue (ctx->sc_fpregs[14], fpregs[14], 8);
+ hexvalue (ctx->sc_fpregs[15], fpregs[15], 8);
+ hexvalue (ctx->sc_xfpregs[0], fpregs[16], 8);
+ hexvalue (ctx->sc_xfpregs[1], fpregs[17], 8);
+ hexvalue (ctx->sc_xfpregs[2], fpregs[18], 8);
+ hexvalue (ctx->sc_xfpregs[3], fpregs[19], 8);
+ hexvalue (ctx->sc_xfpregs[4], fpregs[20], 8);
+ hexvalue (ctx->sc_xfpregs[5], fpregs[21], 8);
+ hexvalue (ctx->sc_xfpregs[6], fpregs[22], 8);
+ hexvalue (ctx->sc_xfpregs[7], fpregs[23], 8);
+ hexvalue (ctx->sc_xfpregs[8], fpregs[24], 8);
+ hexvalue (ctx->sc_xfpregs[9], fpregs[25], 8);
+ hexvalue (ctx->sc_xfpregs[10], fpregs[26], 8);
+ hexvalue (ctx->sc_xfpregs[11], fpregs[27], 8);
+ hexvalue (ctx->sc_xfpregs[12], fpregs[28], 8);
+ hexvalue (ctx->sc_xfpregs[13], fpregs[29], 8);
+ hexvalue (ctx->sc_xfpregs[14], fpregs[30], 8);
+ hexvalue (ctx->sc_xfpregs[15], fpregs[31], 8);
+ hexvalue (ctx->sc_fpscr, fpregs[32], 8);
+ hexvalue (ctx->sc_fpul, fpregs[33], 8);
+
+ ADD_STRING ("\n\n FR0: ");
+ ADD_MEM (fpregs[0], 8);
+ ADD_STRING (" FR1: ");
+ ADD_MEM (fpregs[1], 8);
+ ADD_STRING (" FR2: ");
+ ADD_MEM (fpregs[2], 8);
+ ADD_STRING (" FR3: ");
+ ADD_MEM (fpregs[3], 8);
+ ADD_STRING ("\n FR4: ");
+ ADD_MEM (fpregs[4], 8);
+ ADD_STRING (" FR5: ");
+ ADD_MEM (fpregs[5], 8);
+ ADD_STRING (" FR6: ");
+ ADD_MEM (fpregs[6], 8);
+ ADD_STRING (" FR7: ");
+ ADD_MEM (fpregs[7], 8);
+ ADD_STRING ("\n FR8: ");
+ ADD_MEM (fpregs[8], 8);
+ ADD_STRING (" FR9: ");
+ ADD_MEM (fpregs[9], 8);
+ ADD_STRING (" FR10: ");
+ ADD_MEM (fpregs[10], 8);
+ ADD_STRING (" FR11: ");
+ ADD_MEM (fpregs[11], 8);
+ ADD_STRING ("\nFR12: ");
+ ADD_MEM (fpregs[12], 8);
+ ADD_STRING (" FR13: ");
+ ADD_MEM (fpregs[13], 8);
+ ADD_STRING (" FR14: ");
+ ADD_MEM (fpregs[14], 8);
+ ADD_STRING (" FR15: ");
+ ADD_MEM (fpregs[15], 8);
+ ADD_STRING ("\n\n XR0: ");
+ ADD_MEM (fpregs[16], 8);
+ ADD_STRING (" XR1: ");
+ ADD_MEM (fpregs[17], 8);
+ ADD_STRING (" XR2: ");
+ ADD_MEM (fpregs[18], 8);
+ ADD_STRING (" XR3: ");
+ ADD_MEM (fpregs[19], 8);
+ ADD_STRING ("\n XR4: ");
+ ADD_MEM (fpregs[20], 8);
+ ADD_STRING (" XR5: ");
+ ADD_MEM (fpregs[21], 8);
+ ADD_STRING (" XR6: ");
+ ADD_MEM (fpregs[22], 8);
+ ADD_STRING (" XR7: ");
+ ADD_MEM (fpregs[23], 8);
+ ADD_STRING ("\n XR8: ");
+ ADD_MEM (fpregs[24], 8);
+ ADD_STRING (" XR9: ");
+ ADD_MEM (fpregs[25], 8);
+ ADD_STRING (" XR10: ");
+ ADD_MEM (fpregs[26], 8);
+ ADD_STRING (" XR11: ");
+ ADD_MEM (fpregs[27], 8);
+ ADD_STRING ("\nXR12: ");
+ ADD_MEM (fpregs[28], 8);
+ ADD_STRING (" XR13: ");
+ ADD_MEM (fpregs[29], 8);
+ ADD_STRING (" XR14: ");
+ ADD_MEM (fpregs[30], 8);
+ ADD_STRING (" XR15: ");
+ ADD_MEM (fpregs[31], 8);
+
+ ADD_STRING ("\n\nFPSCR: ");
+ ADD_MEM (fpregs[32], 8);
+ ADD_STRING (" FPUL: ");
+ ADD_MEM (fpregs[33], 8);
+
+ ADD_STRING ("\n");
+ }
+#endif /* __SH_FPU_ANY__ */
+
+ /* Write the stuff out. */
+ writev (fd, iov, nr);
+}
+
+
+#define REGISTER_DUMP register_dump (fd, &ctx)
diff --git a/REORG.TODO/sysdeps/unix/sysv/linux/sh/sh4/setcontext.S b/REORG.TODO/sysdeps/unix/sysv/linux/sh/sh4/setcontext.S
new file mode 100644
index 0000000000..e6672a6585
--- /dev/null
+++ b/REORG.TODO/sysdeps/unix/sysv/linux/sh/sh4/setcontext.S
@@ -0,0 +1,141 @@
+/* Install given context.
+ Copyright (C) 2005-2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <sysdep.h>
+
+#include "ucontext_i.h"
+
+/* int __setcontext (const ucontext_t *uc); */
+
+ .text
+ .align 5
+ENTRY(__setcontext)
+
+ mov r4, r8
+
+ /* sigprocmask (SIG_SETMASK, &uc->uc_sigmask, NULL). */
+ mov r4, r5
+ add #(oSIGMASK/2), r5
+ add #(oSIGMASK/2), r5
+ mov #SIG_SETMASK, r4
+ mov #0, r6
+ mov #+SYS_ify(sigprocmask), r3
+ trapa #0x13
+ mov r0, r1
+ mov #-12, r2
+ shad r2, r1
+ not r1, r1 // r1=0 means r0 = -1 to -4095
+ tst r1, r1 // i.e. error in linux
+ bf .Lsetcontext_restore
+.Lsyscall_error:
+ SYSCALL_ERROR_HANDLER
+.Lpseudo_end:
+ rts
+ nop
+
+.Lsetcontext_restore:
+#ifdef __SH_FPU_ANY__
+ mov r8, r0
+ add #(oFR0),r0
+ fmov.s @r0+, fr0
+ fmov.s @r0+, fr1
+ fmov.s @r0+, fr2
+ fmov.s @r0+, fr3
+ fmov.s @r0+, fr4
+ fmov.s @r0+, fr5
+ fmov.s @r0+, fr6
+ fmov.s @r0+, fr7
+ fmov.s @r0+, fr8
+ fmov.s @r0+, fr9
+ fmov.s @r0+, fr10
+ fmov.s @r0+, fr11
+ fmov.s @r0+, fr12
+ fmov.s @r0+, fr13
+ fmov.s @r0+, fr14
+ fmov.s @r0+, fr15
+ frchg
+ fmov.s @r0+, fr0
+ fmov.s @r0+, fr1
+ fmov.s @r0+, fr2
+ fmov.s @r0+, fr3
+ fmov.s @r0+, fr4
+ fmov.s @r0+, fr5
+ fmov.s @r0+, fr6
+ fmov.s @r0+, fr7
+ fmov.s @r0+, fr8
+ fmov.s @r0+, fr9
+ fmov.s @r0+, fr10
+ fmov.s @r0+, fr11
+ fmov.s @r0+, fr12
+ fmov.s @r0+, fr13
+ fmov.s @r0+, fr14
+ fmov.s @r0+, fr15
+ frchg
+ lds.l @r0+, fpscr
+ lds.l @r0+, fpul
+#endif /* __SH_FPU_ANY__ */
+
+ mov r8, r0
+ add #(oPC), r0
+ mov.l @r0+, r2
+ lds.l @r0+, pr
+
+ /* Restore T frag. */
+ mov.l @r0+, r1
+ shlr r1
+ /* Skip GBR which is used for thread pointer. */
+ add #4, r0
+
+ lds.l @r0+, mach
+ lds.l @r0+, macl
+
+ mov r8, r0
+ add #(oR9), r0
+ mov.l @r0+, r9
+ mov.l @r0+, r10
+ mov.l @r0+, r11
+ mov.l @r0+, r12
+ mov.l @r0+, r13
+ mov.l @r0+, r14
+ mov.l @r0+, r15
+
+ mov r8, r0
+ mov.l @(oR0,r0), r1
+ mov.l r1, @-r15
+ cfi_adjust_cfa_offset(4)
+ cfi_rel_offset (r1, 0)
+ mov.l r2, @-r15
+ cfi_adjust_cfa_offset(4)
+ cfi_rel_offset (r2, 0)
+
+ mov.l @(oR1,r0), r1
+ mov.l @(oR2,r0), r2
+ mov.l @(oR3,r0), r3
+ mov.l @(oR4,r0), r4
+ mov.l @(oR5,r0), r5
+ mov.l @(oR6,r0), r6
+ mov.l @(oR7,r0), r7
+ mov.l @(oR8,r0), r8
+ mov.l @r15+, r0
+ cfi_adjust_cfa_offset(-4)
+ jmp @r0
+ mov.l @r15+, r0
+
+PSEUDO_END(__setcontext)
+
+weak_alias (__setcontext, setcontext)
diff --git a/REORG.TODO/sysdeps/unix/sysv/linux/sh/sh4/swapcontext.S b/REORG.TODO/sysdeps/unix/sysv/linux/sh/sh4/swapcontext.S
new file mode 100644
index 0000000000..5f96790be1
--- /dev/null
+++ b/REORG.TODO/sysdeps/unix/sysv/linux/sh/sh4/swapcontext.S
@@ -0,0 +1,218 @@
+/* Save current context and install the given one.
+ Copyright (C) 2005-2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <sysdep.h>
+
+#include "ucontext_i.h"
+
+/* int __swapcontext (ucontext_t *ouc, const ucontext_t *uc); */
+
+ .text
+ .align 5
+ENTRY(__swapcontext)
+
+ /* Return value of getcontext. R0 is the only register whose
+ value is not preserved. */
+ mov #0, r0
+ mov.l r0, @(oR0,r4)
+ mov.l r1, @(oR1,r4)
+ mov.l r2, @(oR2,r4)
+ mov.l r3, @(oR3,r4)
+ mov.l r4, @(oR4,r4)
+ mov.l r5, @(oR5,r4)
+ mov.l r6, @(oR6,r4)
+ mov.l r7, @(oR7,r4)
+ mov r4, r0
+ add #(oMACL+4), r0
+ sts.l macl, @-r0
+ sts.l mach, @-r0
+ stc.l gbr, @-r0
+
+ /* Save T flag to SR. */
+ movt r1
+ mov.l r1, @-r0
+ sts.l pr, @-r0
+
+ /* The return address of getcontext is the restart pc. */
+ sts.l pr, @-r0
+
+ mov.l r15, @-r0
+ mov.l r14, @-r0
+ mov.l r13, @-r0
+ mov.l r12, @-r0
+ mov.l r11, @-r0
+ mov.l r10, @-r0
+ mov.l r9, @-r0
+ mov.l r8, @-r0
+
+#ifdef __SH_FPU_ANY__
+ mov r4, r0
+ /* We need 2 add instruction because oFPUL+4 >= 127. */
+ add #124,r0
+ add #(oFPUL+4-124),r0
+ sts.l fpul, @-r0
+ sts.l fpscr, @-r0
+ frchg
+ fmov.s fr15, @-r0
+ fmov.s fr14, @-r0
+ fmov.s fr13, @-r0
+ fmov.s fr12, @-r0
+ fmov.s fr11, @-r0
+ fmov.s fr10, @-r0
+ fmov.s fr9, @-r0
+ fmov.s fr8, @-r0
+ fmov.s fr7, @-r0
+ fmov.s fr6, @-r0
+ fmov.s fr5, @-r0
+ fmov.s fr4, @-r0
+ fmov.s fr3, @-r0
+ fmov.s fr2, @-r0
+ fmov.s fr1, @-r0
+ fmov.s fr0, @-r0
+ frchg
+ fmov.s fr15, @-r0
+ fmov.s fr14, @-r0
+ fmov.s fr13, @-r0
+ fmov.s fr12, @-r0
+ fmov.s fr11, @-r0
+ fmov.s fr10, @-r0
+ fmov.s fr9, @-r0
+ fmov.s fr8, @-r0
+ fmov.s fr7, @-r0
+ fmov.s fr6, @-r0
+ fmov.s fr5, @-r0
+ fmov.s fr4, @-r0
+ fmov.s fr3, @-r0
+ fmov.s fr2, @-r0
+ fmov.s fr1, @-r0
+ fmov.s fr0, @-r0
+#endif /* __SH_FPU_ANY__ */
+
+ mov r5, r8
+
+ /* sigprocmask (SIG_SETMASK, &uc->uc_sigmask, &ouc->uc_sigmask). */
+ mov #oSIGMASK, r1
+ extu.b r1, r1
+ add r1, r5
+ mov r4, r6
+ add r1, r6
+ mov #SIG_SETMASK, r4
+ mov #+SYS_ify(sigprocmask), r3
+ trapa #0x13
+ mov r0, r1
+ mov #-12, r2
+ shad r2, r1
+ not r1, r1 // r1=0 means r0 = -1 to -4095
+ tst r1, r1 // i.e. error in linux
+ bf .Lswapcontext_restore
+.Lsyscall_error:
+ SYSCALL_ERROR_HANDLER
+.Lpseudo_end:
+ rts
+ nop
+.Lswapcontext_restore:
+#ifdef __SH_FPU_ANY__
+ mov r8, r0
+ add #(oFR0),r0
+ fmov.s @r0+, fr0
+ fmov.s @r0+, fr1
+ fmov.s @r0+, fr2
+ fmov.s @r0+, fr3
+ fmov.s @r0+, fr4
+ fmov.s @r0+, fr5
+ fmov.s @r0+, fr6
+ fmov.s @r0+, fr7
+ fmov.s @r0+, fr8
+ fmov.s @r0+, fr9
+ fmov.s @r0+, fr10
+ fmov.s @r0+, fr11
+ fmov.s @r0+, fr12
+ fmov.s @r0+, fr13
+ fmov.s @r0+, fr14
+ fmov.s @r0+, fr15
+ frchg
+ fmov.s @r0+, fr0
+ fmov.s @r0+, fr1
+ fmov.s @r0+, fr2
+ fmov.s @r0+, fr3
+ fmov.s @r0+, fr4
+ fmov.s @r0+, fr5
+ fmov.s @r0+, fr6
+ fmov.s @r0+, fr7
+ fmov.s @r0+, fr8
+ fmov.s @r0+, fr9
+ fmov.s @r0+, fr10
+ fmov.s @r0+, fr11
+ fmov.s @r0+, fr12
+ fmov.s @r0+, fr13
+ fmov.s @r0+, fr14
+ fmov.s @r0+, fr15
+ frchg
+ lds.l @r0+, fpscr
+ lds.l @r0+, fpul
+#endif /* __SH_FPU_ANY__ */
+
+ mov r8, r0
+ add #(oPC), r0
+ mov.l @r0+, r2
+ lds.l @r0+, pr
+
+ /* Restore T frag. */
+ mov.l @r0+, r1
+ shlr r1
+ /* Skip GBR which is used for thread pointer. */
+ add #4, r0
+
+ lds.l @r0+, mach
+ lds.l @r0+, macl
+
+ mov r8, r0
+ add #(oR9), r0
+ mov.l @r0+, r9
+ mov.l @r0+, r10
+ mov.l @r0+, r11
+ mov.l @r0+, r12
+ mov.l @r0+, r13
+ mov.l @r0+, r14
+ mov.l @r0+, r15
+
+ mov r8, r0
+ mov.l @(oR0,r0), r1
+ mov.l r1, @-r15
+ cfi_adjust_cfa_offset(4)
+ cfi_rel_offset (r1, 0)
+ mov.l r2, @-r15
+ cfi_adjust_cfa_offset(4)
+ cfi_rel_offset (r2, 0)
+
+ mov.l @(oR1,r0), r1
+ mov.l @(oR2,r0), r2
+ mov.l @(oR3,r0), r3
+ mov.l @(oR4,r0), r4
+ mov.l @(oR5,r0), r5
+ mov.l @(oR6,r0), r6
+ mov.l @(oR7,r0), r7
+ mov.l @(oR8,r0), r8
+ mov.l @r15+, r0
+ cfi_adjust_cfa_offset(-4)
+ jmp @r0
+ mov.l @r15+, r0
+
+PSEUDO_END(__swapcontext)
+
+weak_alias (__swapcontext, swapcontext)
diff --git a/REORG.TODO/sysdeps/unix/sysv/linux/sh/sh4/sysdep.h b/REORG.TODO/sysdeps/unix/sysv/linux/sh/sh4/sysdep.h
new file mode 100644
index 0000000000..852f8eed7f
--- /dev/null
+++ b/REORG.TODO/sysdeps/unix/sysv/linux/sh/sh4/sysdep.h
@@ -0,0 +1,4 @@
+/* 4 instruction cycles not accessing cache and TLB are needed after
+ trapa instruction to avoid an SH-4 silicon bug. */
+#define NEED_SYSCALL_INST_PAD
+#include <sysdeps/unix/sysv/linux/sh/sysdep.h>
diff --git a/REORG.TODO/sysdeps/unix/sysv/linux/sh/sh4/ucontext_i.sym b/REORG.TODO/sysdeps/unix/sysv/linux/sh/sh4/ucontext_i.sym
new file mode 100644
index 0000000000..130f60cd96
--- /dev/null
+++ b/REORG.TODO/sysdeps/unix/sysv/linux/sh/sh4/ucontext_i.sym
@@ -0,0 +1,73 @@
+#include <stddef.h>
+#include <signal.h>
+#include <sys/ucontext.h>
+
+--
+
+SIG_BLOCK
+SIG_SETMASK
+
+#define ucontext(member) offsetof (ucontext_t, member)
+#define mcontext(member) ucontext (uc_mcontext.member)
+
+oLINK ucontext (uc_link)
+oSS_SP ucontext (uc_stack.ss_sp)
+oSS_SIZE ucontext (uc_stack.ss_size)
+oR0 mcontext (gregs[REG_R0])
+oR1 mcontext (gregs[REG_R1])
+oR2 mcontext (gregs[REG_R2])
+oR3 mcontext (gregs[REG_R3])
+oR4 mcontext (gregs[REG_R4])
+oR5 mcontext (gregs[REG_R5])
+oR6 mcontext (gregs[REG_R6])
+oR7 mcontext (gregs[REG_R7])
+oR8 mcontext (gregs[REG_R8])
+oR9 mcontext (gregs[REG_R9])
+oR10 mcontext (gregs[REG_R10])
+oR11 mcontext (gregs[REG_R11])
+oR12 mcontext (gregs[REG_R12])
+oR13 mcontext (gregs[REG_R13])
+oR14 mcontext (gregs[REG_R14])
+oR15 mcontext (gregs[REG_R15])
+oPC mcontext (pc)
+oPR mcontext (pr)
+oSR mcontext (sr)
+oGBR mcontext (gbr)
+oMACH mcontext (mach)
+oMACL mcontext (macl)
+oFR0 mcontext (fpregs[0])
+oFR1 mcontext (fpregs[1])
+oFR2 mcontext (fpregs[2])
+oFR3 mcontext (fpregs[3])
+oFR4 mcontext (fpregs[4])
+oFR5 mcontext (fpregs[5])
+oFR6 mcontext (fpregs[6])
+oFR7 mcontext (fpregs[7])
+oFR8 mcontext (fpregs[8])
+oFR9 mcontext (fpregs[9])
+oFR10 mcontext (fpregs[10])
+oFR11 mcontext (fpregs[11])
+oFR12 mcontext (fpregs[12])
+oFR13 mcontext (fpregs[13])
+oFR14 mcontext (fpregs[14])
+oFR15 mcontext (fpregs[15])
+oXFR0 mcontext (xfpregs[0])
+oXFR1 mcontext (xfpregs[1])
+oXFR2 mcontext (xfpregs[2])
+oXFR3 mcontext (xfpregs[3])
+oXFR4 mcontext (xfpregs[4])
+oXFR5 mcontext (xfpregs[5])
+oXFR6 mcontext (xfpregs[6])
+oXFR7 mcontext (xfpregs[7])
+oXFR8 mcontext (xfpregs[8])
+oXFR9 mcontext (xfpregs[9])
+oXFR10 mcontext (xfpregs[10])
+oXFR11 mcontext (xfpregs[11])
+oXFR12 mcontext (xfpregs[12])
+oXFR13 mcontext (xfpregs[13])
+oXFR14 mcontext (xfpregs[14])
+oXFR15 mcontext (xfpregs[15])
+oFPSCR mcontext (fpscr)
+oFPUL mcontext (fpul)
+oOWNEDFP mcontext (ownedfp)
+oSIGMASK ucontext (uc_sigmask)