diff options
Diffstat (limited to 'REORG.TODO/sysdeps/powerpc/powerpc32/fpu')
36 files changed, 2459 insertions, 0 deletions
diff --git a/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/Makefile b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/Makefile new file mode 100644 index 0000000000..e05073970d --- /dev/null +++ b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/Makefile @@ -0,0 +1,3 @@ +ifeq ($(subdir),misc) +sysdep_routines += fprsave fprrest +endif diff --git a/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/__longjmp-common.S b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/__longjmp-common.S new file mode 100644 index 0000000000..c01c94dfb7 --- /dev/null +++ b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/__longjmp-common.S @@ -0,0 +1,178 @@ +/* longjmp for PowerPC. + Copyright (C) 1995-2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. */ + +#include <sysdep.h> +#include <stap-probe.h> +#define _ASM +#ifdef __NO_VMX__ +# include <novmxsetjmp.h> +#else +# include <jmpbuf-offsets.h> +#endif + + .machine "altivec" +ENTRY (__longjmp_symbol) +#ifndef __NO_VMX__ +# ifdef PIC + mflr r6 + cfi_register (lr,r6) + SETUP_GOT_ACCESS(r5,got_label) + addis r5,r5,_GLOBAL_OFFSET_TABLE_-got_label@ha + addi r5,r5,_GLOBAL_OFFSET_TABLE_-got_label@l +# ifdef SHARED +# if IS_IN (rtld) + /* Inside ld.so we use the local alias to avoid runtime GOT + relocations. */ + lwz r5,_rtld_local_ro@got(r5) +# else + lwz r5,_rtld_global_ro@got(r5) +# endif + mtlr r6 + cfi_same_value (lr) + lwz r5,RTLD_GLOBAL_RO_DL_HWCAP_OFFSET+LOWORD(r5) +# else + lwz r5,_dl_hwcap@got(r5) + mtlr r6 + cfi_same_value (lr) + lwz r5,LOWORD(r5) +# endif +# else + lis r5,(_dl_hwcap+LOWORD)@ha + lwz r5,(_dl_hwcap+LOWORD)@l(r5) +# endif + andis. r5,r5,(PPC_FEATURE_HAS_ALTIVEC >> 16) + beq L(no_vmx) + la r5,((JB_VRS)*4)(3) + andi. r6,r5,0xf + lwz r0,((JB_VRSAVE)*4)(3) + mtspr VRSAVE,r0 + beq+ L(aligned_restore_vmx) + addi r6,r5,16 + lvsl v0,0,r5 + lvx v1,0,r5 + addi r5,r5,32 + lvx v21,0,r6 + vperm v20,v1,v21,v0 +# define load_misaligned_vmx_lo_loaded(loadvr,lovr,shiftvr,loadgpr,addgpr) \ + addi addgpr,addgpr,32; \ + lvx lovr,0,loadgpr; \ + vperm loadvr,loadvr,lovr,shiftvr; + load_misaligned_vmx_lo_loaded(v21,v22,v0,r5,r6) + load_misaligned_vmx_lo_loaded(v22,v23,v0,r6,r5) + load_misaligned_vmx_lo_loaded(v23,v24,v0,r5,r6) + load_misaligned_vmx_lo_loaded(v24,v25,v0,r6,r5) + load_misaligned_vmx_lo_loaded(v25,v26,v0,r5,r6) + load_misaligned_vmx_lo_loaded(v26,v27,v0,r6,r5) + load_misaligned_vmx_lo_loaded(v27,v28,v0,r5,r6) + load_misaligned_vmx_lo_loaded(v28,v29,v0,r6,r5) + load_misaligned_vmx_lo_loaded(v29,v30,v0,r5,r6) + load_misaligned_vmx_lo_loaded(v30,v31,v0,r6,r5) + lvx v1,0,r5 + vperm v31,v31,v1,v0 + b L(no_vmx) +L(aligned_restore_vmx): + addi r6,r5,16 + lvx v20,0,r5 + addi r5,r5,32 + lvx v21,0,r6 + addi r6,r6,32 + lvx v22,0,r5 + addi r5,r5,32 + lvx v23,0,r6 + addi r6,r6,32 + lvx v24,0,r5 + addi r5,r5,32 + lvx v25,0,r6 + addi r6,r6,32 + lvx v26,0,r5 + addi r5,r5,32 + lvx v27,0,r6 + addi r6,r6,32 + lvx v28,0,r5 + addi r5,r5,32 + lvx v29,0,r6 + addi r6,r6,32 + lvx v30,0,r5 + lvx v31,0,r6 +L(no_vmx): +#endif +#if defined PTR_DEMANGLE || defined CHECK_SP + lwz r24,(JB_GPR1*4)(r3) +# ifdef CHECK_SP +# ifdef PTR_DEMANGLE + PTR_DEMANGLE3 (r24, r24, r25) +# endif + CHECK_SP (r24) + mr r1,r24 +# endif +#else + lwz r1,(JB_GPR1*4)(r3) +#endif + lwz r0,(JB_LR*4)(r3) + lwz r14,((JB_GPRS+0)*4)(r3) + lfd fp14,((JB_FPRS+0*2)*4)(r3) + lwz r15,((JB_GPRS+1)*4)(r3) + lfd fp15,((JB_FPRS+1*2)*4)(r3) + lwz r16,((JB_GPRS+2)*4)(r3) + lfd fp16,((JB_FPRS+2*2)*4)(r3) + lwz r17,((JB_GPRS+3)*4)(r3) + lfd fp17,((JB_FPRS+3*2)*4)(r3) + lwz r18,((JB_GPRS+4)*4)(r3) + lfd fp18,((JB_FPRS+4*2)*4)(r3) + lwz r19,((JB_GPRS+5)*4)(r3) + lfd fp19,((JB_FPRS+5*2)*4)(r3) + lwz r20,((JB_GPRS+6)*4)(r3) + lfd fp20,((JB_FPRS+6*2)*4)(r3) +#ifdef PTR_DEMANGLE +# ifndef CHECK_SP + PTR_DEMANGLE3 (r1, r24, r25) +# endif + PTR_DEMANGLE2 (r0, r25) +#endif + /* longjmp/longjmp_target probe expects longjmp first argument (4@3), + second argument (-4@4), and target address (4@0), respectively. */ + LIBC_PROBE (longjmp, 3, 4@3, -4@4, 4@0) + mtlr r0 + lwz r21,((JB_GPRS+7)*4)(r3) + lfd fp21,((JB_FPRS+7*2)*4)(r3) + lwz r22,((JB_GPRS+8)*4)(r3) + lfd fp22,((JB_FPRS+8*2)*4)(r3) + lwz r5,(JB_CR*4)(r3) + lwz r23,((JB_GPRS+9)*4)(r3) + lfd fp23,((JB_FPRS+9*2)*4)(r3) + lwz r24,((JB_GPRS+10)*4)(r3) + lfd fp24,((JB_FPRS+10*2)*4)(r3) + lwz r25,((JB_GPRS+11)*4)(r3) + lfd fp25,((JB_FPRS+11*2)*4)(r3) + mtcrf 0xFF,r5 + lwz r26,((JB_GPRS+12)*4)(r3) + lfd fp26,((JB_FPRS+12*2)*4)(r3) + lwz r27,((JB_GPRS+13)*4)(r3) + lfd fp27,((JB_FPRS+13*2)*4)(r3) + lwz r28,((JB_GPRS+14)*4)(r3) + lfd fp28,((JB_FPRS+14*2)*4)(r3) + lwz r29,((JB_GPRS+15)*4)(r3) + lfd fp29,((JB_FPRS+15*2)*4)(r3) + lwz r30,((JB_GPRS+16)*4)(r3) + lfd fp30,((JB_FPRS+16*2)*4)(r3) + lwz r31,((JB_GPRS+17)*4)(r3) + lfd fp31,((JB_FPRS+17*2)*4)(r3) + LIBC_PROBE (longjmp_target, 3, 4@3, -4@4, 4@0) + mr r3,r4 + blr +END (__longjmp_symbol) diff --git a/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/__longjmp.S b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/__longjmp.S new file mode 100644 index 0000000000..0e62245927 --- /dev/null +++ b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/__longjmp.S @@ -0,0 +1,40 @@ +/* AltiVec/VMX (new) version of __longjmp for PowerPC. + Copyright (C) 1995-2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. */ + +#include <libc-symbols.h> +#include <rtld-global-offsets.h> +#include <shlib-compat.h> + +#if !IS_IN (libc) +/* Build a non-versioned object for rtld-*. */ +# define __longjmp_symbol __longjmp +# include "__longjmp-common.S" + +#else /* IS_IN (libc) */ +strong_alias (__vmx__longjmp, __longjmp) +# define __longjmp_symbol __vmx__longjmp +# include "__longjmp-common.S" + +# if defined SHARED && SHLIB_COMPAT (libc, GLIBC_2_0, GLIBC_2_3_4) +# define __NO_VMX__ +# undef JB_SIZE +# undef __longjmp_symbol +# define __longjmp_symbol __novmx__longjmp +# include "__longjmp-common.S" +# endif +#endif /* IS_IN (libc) */ diff --git a/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/configure b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/configure new file mode 100644 index 0000000000..98c6f30ca3 --- /dev/null +++ b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/configure @@ -0,0 +1,56 @@ +# This file is generated from configure.ac by Autoconf. DO NOT EDIT! + # Local configure fragment for sysdeps/powerpc/powerpc32/fpu. + +# Test whether integer to floating point conversions use fcfid. +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for fcfid use" >&5 +$as_echo_n "checking for fcfid use... " >&6; } +if ${libc_cv_ppc_fcfid+:} false; then : + $as_echo_n "(cached) " >&6 +else + echo 'double foo (int x) { return (double) x; }' > conftest.c +libc_cv_ppc_fcfid=no +if { ac_try='${CC-cc} -S $CFLAGS conftest.c -o conftest.s 1>&5' + { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5 + (eval $ac_try) 2>&5 + ac_status=$? + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; }; }; then + if grep '[ ]fcfid' conftest.s > /dev/null 2>&1; then + libc_cv_ppc_fcfid=yes + fi +fi +rm -rf conftest* +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $libc_cv_ppc_fcfid" >&5 +$as_echo "$libc_cv_ppc_fcfid" >&6; } +if test $libc_cv_ppc_fcfid = yes; then + $as_echo "#define HAVE_PPC_FCFID 1" >>confdefs.h + +fi + +# Test whether floating point to long long conversions use fctidz. +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for fctidz use" >&5 +$as_echo_n "checking for fctidz use... " >&6; } +if ${libc_cv_ppc_fctidz+:} false; then : + $as_echo_n "(cached) " >&6 +else + echo 'long long int foo (double x) { return (long long int) x; }' > conftest.c +libc_cv_ppc_fctidz=no +if { ac_try='${CC-cc} -S $CFLAGS conftest.c -o conftest.s 1>&5' + { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5 + (eval $ac_try) 2>&5 + ac_status=$? + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; }; }; then + if grep '[ ]fctidz' conftest.s > /dev/null 2>&1; then + libc_cv_ppc_fctidz=yes + fi +fi +rm -rf conftest* +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $libc_cv_ppc_fctidz" >&5 +$as_echo "$libc_cv_ppc_fctidz" >&6; } +if test $libc_cv_ppc_fctidz = yes; then + $as_echo "#define HAVE_PPC_FCTIDZ 1" >>confdefs.h + +fi diff --git a/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/configure.ac b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/configure.ac new file mode 100644 index 0000000000..1899705aab --- /dev/null +++ b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/configure.ac @@ -0,0 +1,34 @@ +GLIBC_PROVIDES dnl See aclocal.m4 in the top level source directory. +# Local configure fragment for sysdeps/powerpc/powerpc32/fpu. + +# Test whether integer to floating point conversions use fcfid. +AC_CACHE_CHECK([for fcfid use], [libc_cv_ppc_fcfid], [dnl +echo 'double foo (int x) { return (double) x; }' > conftest.c +libc_cv_ppc_fcfid=no +if AC_TRY_COMMAND(${CC-cc} -S $CFLAGS conftest.c -o conftest.s 1>&AS_MESSAGE_LOG_FD); then +changequote(,)dnl + if grep '[ ]fcfid' conftest.s > /dev/null 2>&1; then + libc_cv_ppc_fcfid=yes + fi +changequote([,])dnl +fi +rm -rf conftest*]) +if test $libc_cv_ppc_fcfid = yes; then + AC_DEFINE([HAVE_PPC_FCFID]) +fi + +# Test whether floating point to long long conversions use fctidz. +AC_CACHE_CHECK([for fctidz use], [libc_cv_ppc_fctidz], [dnl +echo 'long long int foo (double x) { return (long long int) x; }' > conftest.c +libc_cv_ppc_fctidz=no +if AC_TRY_COMMAND(${CC-cc} -S $CFLAGS conftest.c -o conftest.s 1>&AS_MESSAGE_LOG_FD); then +changequote(,)dnl + if grep '[ ]fctidz' conftest.s > /dev/null 2>&1; then + libc_cv_ppc_fctidz=yes + fi +changequote([,])dnl +fi +rm -rf conftest*]) +if test $libc_cv_ppc_fctidz = yes; then + AC_DEFINE([HAVE_PPC_FCTIDZ]) +fi diff --git a/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/fix-int-fp-convert-zero.h b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/fix-int-fp-convert-zero.h new file mode 100644 index 0000000000..bd3eb62bf5 --- /dev/null +++ b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/fix-int-fp-convert-zero.h @@ -0,0 +1,28 @@ +/* Fix for conversion of integer 0 to floating point. PowerPC version. + Copyright (C) 2015-2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. */ + +#ifndef FIX_INT_FP_CONVERT_ZERO_H +#define FIX_INT_FP_CONVERT_ZERO_H 1 + +/* The code sequences GCC generates for conversion of integers to + floating point result in -0 instead of +0 in FE_DOWNWARD mode when + the fcfid instruction is not used, as of GCC 5. See + <https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67771>. */ +#define FIX_INT_FP_CONVERT_ZERO (!HAVE_PPC_FCFID) + +#endif /* fix-int-fp-convert-zero.h */ diff --git a/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/fprrest.S b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/fprrest.S new file mode 100644 index 0000000000..7b2346471b --- /dev/null +++ b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/fprrest.S @@ -0,0 +1,94 @@ +/* Copyright (C) 2000-2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. */ + +/* + Floating Point Registers (FPRs) restore routine +*/ + +#include <sysdep.h> + +ENTRY(_restfpr_all) + .globl C_TEXT(_restf14) + .globl C_TEXT(_restfpr_14) +C_TEXT(_restf14): +C_TEXT(_restfpr_14): lfd fp14,-144(r1) + .globl C_TEXT(_restf15) + .globl C_TEXT(_restfpr_15) +C_TEXT(_restf15): +C_TEXT(_restfpr_15): lfd fp15,-136(r1) + .globl C_TEXT(_restf16) + .globl C_TEXT(_restfpr_16) +C_TEXT(_restf16): +C_TEXT(_restfpr_16): lfd fp16,-128(r1) + .globl C_TEXT(_restf17) + .globl C_TEXT(_restfpr_17) +C_TEXT(_restf17): +C_TEXT(_restfpr_17): lfd fp17,-120(r1) + .globl C_TEXT(_restf18) + .globl C_TEXT(_restfpr_18) +C_TEXT(_restf18): +C_TEXT(_restfpr_18): lfd fp18,-112(r1) + .globl C_TEXT(_restf19) + .globl C_TEXT(_restfpr_19) +C_TEXT(_restf19): +C_TEXT(_restfpr_19): lfd fp19,-104(r1) + .globl C_TEXT(_restf20) + .globl C_TEXT(_restfpr_20) +C_TEXT(_restf20): +C_TEXT(_restfpr_20): lfd fp20,-96(r1) + .globl C_TEXT(_restf21) + .globl C_TEXT(_restfpr_21) +C_TEXT(_restf21): +C_TEXT(_restfpr_21): lfd fp21,-88(r1) + .globl C_TEXT(_restf22) + .globl C_TEXT(_restfpr_22) +C_TEXT(_restf22): +C_TEXT(_restfpr_22): lfd fp22,-80(r1) + .globl C_TEXT(_restf23) + .globl C_TEXT(_restfpr_23) +C_TEXT(_restf23): +C_TEXT(_restfpr_23): lfd fp23,-72(r1) + .globl C_TEXT(_restf24) + .globl C_TEXT(_restfpr_24) +C_TEXT(_restf24): +C_TEXT(_restfpr_24): lfd fp24,-64(r1) + .globl C_TEXT(_restf25) + .globl C_TEXT(_restfpr_25) +C_TEXT(_restf25): +C_TEXT(_restfpr_25): lfd fp25,-56(r1) + .globl C_TEXT(_restf26) + .globl C_TEXT(_restfpr_26) +C_TEXT(_restf26): +C_TEXT(_restfpr_26): lfd fp26,-48(r1) + .globl C_TEXT(_restf27) + .globl C_TEXT(_restfpr_27) +C_TEXT(_restf27): +C_TEXT(_restfpr_27): lfd fp27,-40(r1) + .globl C_TEXT(_restf28) + .globl C_TEXT(_restfpr_28) +C_TEXT(_restf28): +C_TEXT(_restfpr_28): lfd fp28,-32(r1) + .globl C_TEXT(_restf29) + .globl C_TEXT(_restfpr_29) +C_TEXT(_restf29): +C_TEXT(_restfpr_29): lwz r0,8(r1) #get return address from frame + lfd fp29,-24(r1) #restore f29 + mtlr r0 #move return address to LR + lfd fp30,-16(r1) #restore f30 + lfd fp31,-8(r1) #restore f31 + blr #return +END (_restfpr_all) diff --git a/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/fprsave.S b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/fprsave.S new file mode 100644 index 0000000000..975a8216cb --- /dev/null +++ b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/fprsave.S @@ -0,0 +1,111 @@ +/* Copyright (C) 2000-2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. */ + +/* + Floating Point Registers (FPRs) save routine +*/ + +#include <sysdep.h> + +ENTRY(_savefpr_all) + .globl C_TEXT(_savef14) + .globl C_TEXT(_savefpr_14) +C_TEXT(_savef14): +C_TEXT(_savefpr_14): stfd fp14,-144(r1) + cfi_offset(fp14,-144) + .globl C_TEXT(_savef15) + .globl C_TEXT(_savefpr_15) +C_TEXT(_savef15): +C_TEXT(_savefpr_15): stfd fp15,-136(r1) + cfi_offset(fp15,-136) + .globl C_TEXT(_savef16) + .globl C_TEXT(_savefpr_16) +C_TEXT(_savef16): +C_TEXT(_savefpr_16): stfd fp16,-128(r1) + cfi_offset(fp16,-128) + .globl C_TEXT(_savef17) + .globl C_TEXT(_savefpr_17) +C_TEXT(_savef17): +C_TEXT(_savefpr_17): stfd fp17,-120(r1) + cfi_offset(fp17,-120) + .globl C_TEXT(_savef18) + .globl C_TEXT(_savefpr_18) +C_TEXT(_savef18): +C_TEXT(_savefpr_18): stfd fp18,-112(r1) + cfi_offset(fp18,-112) + .globl C_TEXT(_savef19) + .globl C_TEXT(_savefpr_19) +C_TEXT(_savef19): +C_TEXT(_savefpr_19): stfd fp19,-104(r1) + cfi_offset(fp19,-104) + .globl C_TEXT(_savef20) + .globl C_TEXT(_savefpr_20) +C_TEXT(_savef20): +C_TEXT(_savefpr_20): stfd fp20,-96(r1) + cfi_offset(fp20,-96) + .globl C_TEXT(_savef21) + .globl C_TEXT(_savefpr_21) +C_TEXT(_savef21): +C_TEXT(_savefpr_21): stfd fp21,-88(r1) + cfi_offset(fp21,-88) + .globl C_TEXT(_savef22) + .globl C_TEXT(_savefpr_22) +C_TEXT(_savef22): +C_TEXT(_savefpr_22): stfd fp22,-80(r1) + cfi_offset(fp22,-80) + .globl C_TEXT(_savef23) + .globl C_TEXT(_savefpr_23) +C_TEXT(_savef23): +C_TEXT(_savefpr_23): stfd fp23,-72(r1) + cfi_offset(fp23,-72) + .globl C_TEXT(_savef24) + .globl C_TEXT(_savefpr_24) +C_TEXT(_savef24): +C_TEXT(_savefpr_24): stfd fp24,-64(r1) + cfi_offset(fp24,-64) + .globl C_TEXT(_savef25) + .globl C_TEXT(_savefpr_25) +C_TEXT(_savef25): +C_TEXT(_savefpr_25): stfd fp25,-56(r1) + cfi_offset(fp25,-56) + .globl C_TEXT(_savef26) + .globl C_TEXT(_savefpr_26) +C_TEXT(_savef26): +C_TEXT(_savefpr_26): stfd fp26,-48(r1) + cfi_offset(fp26,-48) + .globl C_TEXT(_savef27) + .globl C_TEXT(_savefpr_27) +C_TEXT(_savef27): +C_TEXT(_savefpr_27): stfd fp27,-40(r1) + cfi_offset(fp27,-40) + .globl C_TEXT(_savef28) + .globl C_TEXT(_savefpr_28) +C_TEXT(_savef28): +C_TEXT(_savefpr_28): stfd fp28,-32(r1) + cfi_offset(fp28,-32) + .globl C_TEXT(_savef29) + .globl C_TEXT(_savefpr_29) +C_TEXT(_savef29): +C_TEXT(_savefpr_29): stfd fp29,-24(r1) #save f29 + stfd fp30,-16(r1) #save f30 + stfd fp31,-8(r1) #save f31 + cfi_offset(fp29,-24) + cfi_offset(fp30,-16) + cfi_offset(fp31,-8) + stw r0,8(r1) #save LR in callers frame + blr #return +END (_savefpr_all) diff --git a/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_ceil.S b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_ceil.S new file mode 100644 index 0000000000..51b8c21027 --- /dev/null +++ b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_ceil.S @@ -0,0 +1,83 @@ +/* ceil function. PowerPC32 version. + Copyright (C) 2004-2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. */ + +#include <sysdep.h> +#include <math_ldbl_opt.h> + + .section .rodata.cst4,"aM",@progbits,4 + .align 2 +.LC0: /* 2**52 */ + .long 0x59800000 + + .section ".text" +ENTRY (__ceil) +#ifdef SHARED + mflr r11 + cfi_register(lr,r11) + SETUP_GOT_ACCESS(r9,got_label) + addis r9,r9,.LC0-got_label@ha + lfs fp13,.LC0-got_label@l(r9) + mtlr r11 + cfi_same_value (lr) +#else + lis r9,.LC0@ha + lfs fp13,.LC0@l(r9) +#endif + fabs fp0,fp1 + fsub fp12,fp13,fp13 /* generate 0.0 */ + fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO52) */ + mffs fp11 /* Save current FPU rounding mode and + "inexact" state. */ + fcmpu cr6,fp1,fp12 /* if (x > 0.0) */ + bnl- cr7,.L10 + mtfsfi 7,2 /* Set rounding mode toward +inf. */ + ble- cr6,.L4 + fadd fp1,fp1,fp13 /* x+= TWO52; */ + fsub fp1,fp1,fp13 /* x-= TWO52; */ + fabs fp1,fp1 /* if (x == 0.0) */ + /* x = 0.0; */ + mtfsf 0xff,fp11 /* Restore previous rounding mode and + "inexact" state. */ + blr +.L4: + bge- cr6,.L9 /* if (x < 0.0) */ + fsub fp1,fp1,fp13 /* x-= TWO52; */ + fadd fp1,fp1,fp13 /* x+= TWO52; */ + fnabs fp1,fp1 /* if (x == 0.0) */ + /* x = -0.0; */ +.L9: + mtfsf 0xff,fp11 /* Restore previous rounding mode and + "inexact" state. */ + blr +.L10: + /* Ensure sNaN input is converted to qNaN. */ + fcmpu cr7,fp1,fp1 + beqlr cr7 + fadd fp1,fp1,fp1 + blr + END (__ceil) + +weak_alias (__ceil, ceil) + +#ifdef NO_LONG_DOUBLE +weak_alias (__ceil, ceill) +strong_alias (__ceil, __ceill) +#endif +#if LONG_DOUBLE_COMPAT(libm, GLIBC_2_0) +compat_symbol (libm, __ceil, ceill, GLIBC_2_0) +#endif diff --git a/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_ceilf.S b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_ceilf.S new file mode 100644 index 0000000000..9d8d8aa294 --- /dev/null +++ b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_ceilf.S @@ -0,0 +1,75 @@ +/* float ceil function. PowerPC32 version. + Copyright (C) 2004-2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. */ + +#include <sysdep.h> + + .section .rodata.cst4,"aM",@progbits,4 + .align 2 +.LC0: /* 2**23 */ + .long 0x4b000000 + + .section ".text" +ENTRY (__ceilf) +#ifdef SHARED + mflr r11 + cfi_register(lr,r11) + SETUP_GOT_ACCESS(r9,got_label) + addis r9,r9,.LC0-got_label@ha + lfs fp13,.LC0-got_label@l(r9) + mtlr r11 + cfi_same_value (lr) +#else + lis r9,.LC0@ha + lfs fp13,.LC0@l(r9) +#endif + fabs fp0,fp1 + fsubs fp12,fp13,fp13 /* generate 0.0 */ + fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO23) */ + mffs fp11 /* Save current FPU rounding mode and + "inexact" state. */ + fcmpu cr6,fp1,fp12 /* if (x > 0.0) */ + bnl- cr7,.L10 + mtfsfi 7,2 /* Set rounding mode toward +inf. */ + ble- cr6,.L4 + fadds fp1,fp1,fp13 /* x+= TWO23; */ + fsubs fp1,fp1,fp13 /* x-= TWO23; */ + fabs fp1,fp1 /* if (x == 0.0) */ + /* x = 0.0; */ + mtfsf 0xff,fp11 /* Restore previous rounding mode and + "inexact" state. */ + blr +.L4: + bge- cr6,.L9 /* if (x < 0.0) */ + fsubs fp1,fp1,fp13 /* x-= TWO23; */ + fadds fp1,fp1,fp13 /* x+= TWO23; */ + fnabs fp1,fp1 /* if (x == 0.0) */ + /* x = -0.0; */ +.L9: + mtfsf 0xff,fp11 /* Restore previous rounding mode and + "inexact" state. */ + blr +.L10: + /* Ensure sNaN input is converted to qNaN. */ + fcmpu cr7,fp1,fp1 + beqlr cr7 + fadds fp1,fp1,fp1 + blr + END (__ceilf) + +weak_alias (__ceilf, ceilf) + diff --git a/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_copysign.S b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_copysign.S new file mode 100644 index 0000000000..850dded3b6 --- /dev/null +++ b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_copysign.S @@ -0,0 +1,59 @@ +/* Copy a sign bit between floating-point values. + Copyright (C) 1997-2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. */ + +/* This has been coded in assembler because GCC makes such a mess of it + when it's coded in C. */ + +#include <sysdep.h> +#include <math_ldbl_opt.h> + +ENTRY(__copysign) +/* double [f1] copysign (double [f1] x, double [f2] y); + copysign(x,y) returns a value with the magnitude of x and + with the sign bit of y. */ + stwu r1,-16(r1) + cfi_adjust_cfa_offset (16) + stfd fp2,8(r1) + lwz r3,8+HIWORD(r1) + cmpwi r3,0 + addi r1,r1,16 + cfi_adjust_cfa_offset (-16) + blt L(0) + fabs fp1,fp1 + blr +L(0): fnabs fp1,fp1 + blr + END (__copysign) + +weak_alias (__copysign,copysign) + +/* It turns out that it's safe to use this code even for single-precision. */ +weak_alias (__copysign,copysignf) +strong_alias(__copysign,__copysignf) + +#ifdef NO_LONG_DOUBLE +weak_alias (__copysign,copysignl) +strong_alias(__copysign,__copysignl) +#endif +#if IS_IN (libm) +# if LONG_DOUBLE_COMPAT(libm, GLIBC_2_0) +compat_symbol (libm, __copysign, copysignl, GLIBC_2_0) +# endif +#elif LONG_DOUBLE_COMPAT(libc, GLIBC_2_0) +compat_symbol (libc, __copysign, copysignl, GLIBC_2_0) +#endif diff --git a/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_copysignf.S b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_copysignf.S new file mode 100644 index 0000000000..e05438ae7d --- /dev/null +++ b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_copysignf.S @@ -0,0 +1 @@ +/* __copysignf is in s_copysign.S */ diff --git a/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_copysignl.S b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_copysignl.S new file mode 100644 index 0000000000..272032b49e --- /dev/null +++ b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_copysignl.S @@ -0,0 +1,66 @@ +/* Copy a sign bit between floating-point values. + IBM extended format long double version. + Copyright (C) 2006-2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. */ + +#include <sysdep.h> +#include <math_ldbl_opt.h> + +ENTRY(__copysignl) +/* long double [f1,f2] copysign (long double [f1,f2] x, long double [f3,f4] y); + copysign(x,y) returns a value with the magnitude of x and + with the sign bit of y. */ +#ifdef _ARCH_PPCGR + /* fsel available. */ + stwu r1,-16(r1) + cfi_adjust_cfa_offset (16) + stfd fp3,8(r1) + fmr fp0,fp1 + fabs fp1,fp1 + lwz r3,8+HIWORD(r1) + cmpwi cr6,r3,0 + addi r1,r1,16 + cfi_adjust_cfa_offset (-16) + fneg fp3,fp2 + fsel fp2,fp0,fp2,fp3 + bgelr cr6 + fneg fp1,fp1 + fneg fp2,fp2 + blr +#else + stwu r1,-32(r1) + cfi_adjust_cfa_offset (32) + stfd fp3,8(r1) + stfd fp1,16(r1) + lwz r3,8+HIWORD(r1) + lwz r4,16+HIWORD(r1) + xor r3,r3,r4 + cmpwi cr6,r3,0 + addi r1,r1,32 + cfi_adjust_cfa_offset (-32) + bgelr cr6 + fneg fp1,fp1 + fneg fp2,fp2 + blr +#endif +END (__copysignl) + +#if IS_IN (libm) +long_double_symbol (libm, __copysignl, copysignl) +#else +long_double_symbol (libc, __copysignl, copysignl) +#endif diff --git a/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_fabs.S b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_fabs.S new file mode 100644 index 0000000000..53d21301ee --- /dev/null +++ b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_fabs.S @@ -0,0 +1,5 @@ +#include <math_ldbl_opt.h> +#include <sysdeps/powerpc/fpu/s_fabs.S> +#if LONG_DOUBLE_COMPAT(libm, GLIBC_2_0) +compat_symbol (libm, __fabs, fabsl, GLIBC_2_0) +#endif diff --git a/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_fabsl.S b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_fabsl.S new file mode 100644 index 0000000000..75608ec70c --- /dev/null +++ b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_fabsl.S @@ -0,0 +1,52 @@ +/* Copy a sign bit between floating-point values. + IBM extended format long double version. + Copyright (C) 2004-2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. */ + +#include <sysdep.h> +#include <math_ldbl_opt.h> + +ENTRY(__fabsl) +/* long double [f1,f2] fabs (long double [f1,f2] x); + fabs(x,y) returns a value with the magnitude of x and + with the sign bit of y. */ +#ifdef _ARCH_PPCGR + /* fsel available. */ + fmr fp0,fp1 +#else + /* Use integer operations to test sign of high part to avoid + exceptions on sNaNs. */ + stwu r1,-16(r1) + cfi_adjust_cfa_offset (16) + stfd fp1,8(r1) +#endif + fabs fp1,fp1 +#ifdef _ARCH_PPCGR + fneg fp3,fp2 + fsel fp2,fp0,fp2,fp3 +#else + lwz r3,8+HIWORD(r1) + cmpwi cr6,r3,0 + addi r1,r1,16 + cfi_adjust_cfa_offset (-16) + bgelr cr6 + fneg fp2,fp2 +#endif + blr +END (__fabsl) + +long_double_symbol (libm, __fabsl, fabsl) diff --git a/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_floor.S b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_floor.S new file mode 100644 index 0000000000..90a1b184df --- /dev/null +++ b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_floor.S @@ -0,0 +1,83 @@ +/* Floor function. PowerPC32 version. + Copyright (C) 2004-2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. */ + +#include <sysdep.h> +#include <math_ldbl_opt.h> + + .section .rodata.cst4,"aM",@progbits,4 + .align 2 +.LC0: /* 2**52 */ + .long 0x59800000 + + .section ".text" +ENTRY (__floor) +#ifdef SHARED + mflr r11 + cfi_register(lr,r11) + SETUP_GOT_ACCESS(r9,got_label) + addis r9,r9,.LC0-got_label@ha + lfs fp13,.LC0-got_label@l(r9) + mtlr r11 + cfi_same_value (lr) +#else + lis r9,.LC0@ha + lfs fp13,.LC0@l(r9) +#endif + fabs fp0,fp1 + fsub fp12,fp13,fp13 /* generate 0.0 */ + fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO52) */ + mffs fp11 /* Save current FPU rounding mode and + "inexact" state. */ + fcmpu cr6,fp1,fp12 /* if (x > 0.0) */ + bnl- cr7,.L10 + mtfsfi 7,3 /* Set rounding mode toward -inf. */ + ble- cr6,.L4 + fadd fp1,fp1,fp13 /* x+= TWO52; */ + fsub fp1,fp1,fp13 /* x-= TWO52; */ + fabs fp1,fp1 /* if (x == 0.0) */ + /* x = 0.0; */ + mtfsf 0xff,fp11 /* Restore previous rounding mode and + "inexact" state. */ + blr +.L4: + bge- cr6,.L9 /* if (x < 0.0) */ + fsub fp1,fp1,fp13 /* x-= TWO52; */ + fadd fp1,fp1,fp13 /* x+= TWO52; */ + fnabs fp1,fp1 /* if (x == 0.0) */ + /* x = -0.0; */ +.L9: + mtfsf 0xff,fp11 /* Restore previous rounding mode and + "inexact" state. */ + blr +.L10: + /* Ensure sNaN input is converted to qNaN. */ + fcmpu cr7,fp1,fp1 + beqlr cr7 + fadd fp1,fp1,fp1 + blr + END (__floor) + +weak_alias (__floor, floor) + +#ifdef NO_LONG_DOUBLE +weak_alias (__floor, floorl) +strong_alias (__floor, __floorl) +#endif +#if LONG_DOUBLE_COMPAT(libm, GLIBC_2_0) +compat_symbol (libm, __floor, floorl, GLIBC_2_0) +#endif diff --git a/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_floorf.S b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_floorf.S new file mode 100644 index 0000000000..b87e3bf33e --- /dev/null +++ b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_floorf.S @@ -0,0 +1,75 @@ +/* float Floor function. PowerPC32 version. + Copyright (C) 2004-2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. */ + +#include <sysdep.h> + + .section .rodata.cst4,"aM",@progbits,4 + .align 2 +.LC0: /* 2**23 */ + .long 0x4b000000 + + .section ".text" +ENTRY (__floorf) +#ifdef SHARED + mflr r11 + cfi_register(lr,r11) + SETUP_GOT_ACCESS(r9,got_label) + addis r9,r9,.LC0-got_label@ha + lfs fp13,.LC0-got_label@l(r9) + mtlr r11 + cfi_same_value (lr) +#else + lis r9,.LC0@ha + lfs fp13,.LC0@l(r9) +#endif + fabs fp0,fp1 + fsubs fp12,fp13,fp13 /* generate 0.0 */ + fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO23) */ + mffs fp11 /* Save current FPU rounding mode and + "inexact" state. */ + fcmpu cr6,fp1,fp12 /* if (x > 0.0) */ + bnl- cr7,.L10 + mtfsfi 7,3 /* Set rounding mode toward -inf. */ + ble- cr6,.L4 + fadds fp1,fp1,fp13 /* x+= TWO23; */ + fsubs fp1,fp1,fp13 /* x-= TWO23; */ + fabs fp1,fp1 /* if (x == 0.0) */ + /* x = 0.0; */ + mtfsf 0xff,fp11 /* Restore previous rounding mode and + "inexact" state. */ + blr +.L4: + bge- cr6,.L9 /* if (x < 0.0) */ + fsubs fp1,fp1,fp13 /* x-= TWO23; */ + fadds fp1,fp1,fp13 /* x+= TWO23; */ + fnabs fp1,fp1 /* if (x == 0.0) */ + /* x = -0.0; */ +.L9: + mtfsf 0xff,fp11 /* Restore previous rounding mode and + "inexact" state. */ + blr +.L10: + /* Ensure sNaN input is converted to qNaN. */ + fcmpu cr7,fp1,fp1 + beqlr cr7 + fadds fp1,fp1,fp1 + blr + END (__floorf) + +weak_alias (__floorf, floorf) + diff --git a/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_fma.S b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_fma.S new file mode 100644 index 0000000000..d40695c633 --- /dev/null +++ b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_fma.S @@ -0,0 +1,5 @@ +#include <math_ldbl_opt.h> +#include <sysdeps/powerpc/fpu/s_fma.S> +#if LONG_DOUBLE_COMPAT(libm, GLIBC_2_1) +compat_symbol (libm, __fma, fmal, GLIBC_2_1) +#endif diff --git a/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_isnan.S b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_isnan.S new file mode 100644 index 0000000000..363535dcdb --- /dev/null +++ b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_isnan.S @@ -0,0 +1,57 @@ +/* isnan(). PowerPC32 version. + Copyright (C) 2008-2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. */ + +#include <sysdep.h> +#include <math_ldbl_opt.h> + +/* int __isnan(x) */ + .machine power4 +EALIGN (__isnan, 4, 0) + mffs fp0 + mtfsb0 4*cr6+lt /* reset_fpscr_bit (FPSCR_VE) */ + fcmpu cr7,fp1,fp1 + mtfsf 255,fp0 + li r3,0 + beqlr+ cr7 /* (x == x) then not a NAN */ + li r3,1 /* else must be a NAN */ + blr + END (__isnan) + +hidden_def (__isnan) +weak_alias (__isnan, isnan) + +/* It turns out that the 'double' version will also always work for + single-precision. */ +#ifndef __isnan +strong_alias (__isnan, __isnanf) +hidden_def (__isnanf) +weak_alias (__isnanf, isnanf) +#endif + +#ifdef NO_LONG_DOUBLE +strong_alias (__isnan, __isnanl) +weak_alias (__isnan, isnanl) +#endif + +#if !IS_IN (libm) +# if LONG_DOUBLE_COMPAT(libc, GLIBC_2_0) +compat_symbol (libc, __isnan, __isnanl, GLIBC_2_0); +compat_symbol (libc, isnan, isnanl, GLIBC_2_0); +# endif +#endif + diff --git a/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_llrint.c b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_llrint.c new file mode 100644 index 0000000000..13d150cd68 --- /dev/null +++ b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_llrint.c @@ -0,0 +1,63 @@ +/* Round a double value to a long long in the current rounding mode. + Copyright (C) 1997-2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. */ + +#include <limits.h> +#include <math.h> +#include <math_ldbl_opt.h> +#include <math_private.h> +#include <stdint.h> + +long long int +__llrint (double x) +{ + double rx = __rint (x); + if (HAVE_PPC_FCTIDZ || rx != x) + return (long long int) rx; + else + { + /* Avoid incorrect exceptions from libgcc conversions (as of GCC + 5): <https://gcc.gnu.org/bugzilla/show_bug.cgi?id=59412>. */ + if (fabs (rx) < 0x1p31) + return (long long int) (long int) rx; + uint64_t i0; + EXTRACT_WORDS64 (i0, rx); + int exponent = ((i0 >> 52) & 0x7ff) - 0x3ff; + if (exponent < 63) + { + unsigned long long int mant + = (i0 & ((1ULL << 52) - 1)) | (1ULL << 52); + if (exponent < 52) + mant >>= 52 - exponent; + else + mant <<= exponent - 52; + return (long long int) ((i0 & (1ULL << 63)) != 0 ? -mant : mant); + } + else if (rx == (double) LLONG_MIN) + return LLONG_MIN; + else + return (long long int) (long int) rx << 32; + } +} +weak_alias (__llrint, llrint) +#ifdef NO_LONG_DOUBLE +strong_alias (__llrint, __llrintl) +weak_alias (__llrint, llrintl) +#endif +#if LONG_DOUBLE_COMPAT(libm, GLIBC_2_1) +compat_symbol (libm, __llrint, llrintl, GLIBC_2_1); +#endif diff --git a/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_llrintf.c b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_llrintf.c new file mode 100644 index 0000000000..46365452a8 --- /dev/null +++ b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_llrintf.c @@ -0,0 +1,46 @@ +/* Round a float value to a long long in the current rounding mode. + Copyright (C) 1997-2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. */ + +#include <math.h> +#include <math_private.h> +#include <stdint.h> + +long long int +__llrintf (float x) +{ + float rx = __rintf (x); + if (HAVE_PPC_FCTIDZ || rx != x) + return (long long int) rx; + else + { + float arx = fabsf (rx); + /* Avoid incorrect exceptions from libgcc conversions (as of GCC + 5): <https://gcc.gnu.org/bugzilla/show_bug.cgi?id=59412>. */ + if (arx < 0x1p31f) + return (long long int) (long int) rx; + else if (!(arx < 0x1p55f)) + return (long long int) (long int) (rx * 0x1p-32f) << 32; + uint32_t i0; + GET_FLOAT_WORD (i0, rx); + int exponent = ((i0 >> 23) & 0xff) - 0x7f; + unsigned long long int mant = (i0 & 0x7fffff) | 0x800000; + mant <<= exponent - 23; + return (long long int) ((i0 & 0x80000000) != 0 ? -mant : mant); + } +} +weak_alias (__llrintf, llrintf) diff --git a/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_llround.c b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_llround.c new file mode 100644 index 0000000000..5e5a237b0c --- /dev/null +++ b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_llround.c @@ -0,0 +1,90 @@ +/* Round double value to long long int. + Copyright (C) 1997-2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. */ + +#include <limits.h> +#include <math.h> +#include <math_ldbl_opt.h> +#include <math_private.h> +#include <stdint.h> + +/* Round to the nearest integer, with values exactly on a 0.5 boundary + rounded away from zero, regardless of the current rounding mode. + If (long long)x, when x is out of range of a long long, clips at + LLONG_MAX or LLONG_MIN, then this implementation also clips. */ + +long long int +__llround (double x) +{ + long long xr; + if (HAVE_PPC_FCTIDZ) + xr = (long long) x; + else + { + /* Avoid incorrect exceptions from libgcc conversions (as of GCC + 5): <https://gcc.gnu.org/bugzilla/show_bug.cgi?id=59412>. */ + if (fabs (x) < 0x1p31) + xr = (long long int) (long int) x; + else + { + uint64_t i0; + EXTRACT_WORDS64 (i0, x); + int exponent = ((i0 >> 52) & 0x7ff) - 0x3ff; + if (exponent < 63) + { + unsigned long long int mant + = (i0 & ((1ULL << 52) - 1)) | (1ULL << 52); + if (exponent < 52) + /* llround is not required to raise "inexact". */ + mant >>= 52 - exponent; + else + mant <<= exponent - 52; + xr = (long long int) ((i0 & (1ULL << 63)) != 0 ? -mant : mant); + } + else if (x == (double) LLONG_MIN) + xr = LLONG_MIN; + else + xr = (long long int) (long int) x << 32; + } + } + /* Avoid spurious "inexact" converting LLONG_MAX to double, and from + subtraction when the result is out of range, by returning early + for arguments large enough that no rounding is needed. */ + if (!(fabs (x) < 0x1p52)) + return xr; + double xrf = (double) xr; + + if (x >= 0.0) + { + if (x - xrf >= 0.5) + xr += (long long) ((unsigned long long) xr + 1) > 0; + } + else + { + if (xrf - x >= 0.5) + xr -= (long long) ((unsigned long long) xr - 1) < 0; + } + return xr; +} +weak_alias (__llround, llround) +#ifdef NO_LONG_DOUBLE +strong_alias (__llround, __llroundl) +weak_alias (__llround, llroundl) +#endif +#if LONG_DOUBLE_COMPAT (libm, GLIBC_2_1) +compat_symbol (libm, __llround, llroundl, GLIBC_2_1); +#endif diff --git a/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_llroundf.c b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_llroundf.c new file mode 100644 index 0000000000..55452bac73 --- /dev/null +++ b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_llroundf.c @@ -0,0 +1,72 @@ +/* Round float value to long long int. + Copyright (C) 1997-2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. */ + +#include <math.h> +#include <math_private.h> +#include <stdint.h> + +/* Round to the nearest integer, with values exactly on a 0.5 boundary + rounded away from zero, regardless of the current rounding mode. + If (long long)x, when x is out of range of a long long, clips at + LLONG_MAX or LLONG_MIN, then this implementation also clips. */ + +long long int +__llroundf (float x) +{ + long long xr; + if (HAVE_PPC_FCTIDZ) + xr = (long long) x; + else + { + float ax = fabsf (x); + /* Avoid incorrect exceptions from libgcc conversions (as of GCC + 5): <https://gcc.gnu.org/bugzilla/show_bug.cgi?id=59412>. */ + if (ax < 0x1p31f) + xr = (long long int) (long int) x; + else if (!(ax < 0x1p55f)) + xr = (long long int) (long int) (x * 0x1p-32f) << 32; + else + { + uint32_t i0; + GET_FLOAT_WORD (i0, x); + int exponent = ((i0 >> 23) & 0xff) - 0x7f; + unsigned long long int mant = (i0 & 0x7fffff) | 0x800000; + mant <<= exponent - 23; + xr = (long long int) ((i0 & 0x80000000) != 0 ? -mant : mant); + } + } + /* Avoid spurious "inexact" converting LLONG_MAX to float, and from + subtraction when the result is out of range, by returning early + for arguments large enough that no rounding is needed. */ + if (!(fabsf (x) < 0x1p23f)) + return xr; + float xrf = (float) xr; + + if (x >= 0.0) + { + if (x - xrf >= 0.5) + xr += (long long) ((unsigned long long) xr + 1) > 0; + } + else + { + if (xrf - x >= 0.5) + xr -= (long long) ((unsigned long long) xr - 1) < 0; + } + return xr; +} +weak_alias (__llroundf, llroundf) diff --git a/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_lrint.S b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_lrint.S new file mode 100644 index 0000000000..8d54d95b6a --- /dev/null +++ b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_lrint.S @@ -0,0 +1,46 @@ +/* Round double to long int. PowerPC32 version. + Copyright (C) 2004-2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. */ + +#include <sysdep.h> +#include <math_ldbl_opt.h> + +/* long int[r3] __lrint (double x[fp1]) */ +ENTRY (__lrint) + stwu r1,-16(r1) + fctiw fp13,fp1 + stfd fp13,8(r1) + nop /* Ensure the following load is in a different dispatch group */ + nop /* to avoid pipe stall on POWER4&5. */ + nop + lwz r3,8+LOWORD(r1) + addi r1,r1,16 + blr + END (__lrint) + +weak_alias (__lrint, lrint) + +strong_alias (__lrint, __lrintf) +weak_alias (__lrint, lrintf) + +#ifdef NO_LONG_DOUBLE +strong_alias (__lrint, __lrintl) +weak_alias (__lrint, lrintl) +#endif +#if LONG_DOUBLE_COMPAT(libm, GLIBC_2_1) +compat_symbol (libm, __lrint, lrintl, GLIBC_2_1) +#endif diff --git a/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_lround.S b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_lround.S new file mode 100644 index 0000000000..e4ec1bb0b6 --- /dev/null +++ b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_lround.S @@ -0,0 +1,129 @@ +/* lround function. PowerPC32 version. + Copyright (C) 2004-2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. */ + +#include <sysdep.h> +#include <math_ldbl_opt.h> + + .section .rodata.cst4,"aM",@progbits,4 + .align 2 +.LC0: /* 0.5 */ + .long 0x3f000000 +.LC1: /* 2^52. */ + .long 0x59800000 + .section .rodata.cst8,"aM",@progbits,8 + .align 3 +.LC2: /* 0x7fffffff.8p0. */ + .long 0x41dfffff + .long 0xffe00000 +.LC3: /* -0x80000000.8p0. */ + .long 0xc1e00000 + .long 0x00100000 + .section ".text" + +/* long [r3] lround (float x [fp1]) + IEEE 1003.1 lround function. IEEE specifies "round to the nearest + integer value, rounding halfway cases away from zero, regardless of + the current rounding mode." However PowerPC Architecture defines + "round to Nearest" as "Choose the best approximation. In case of a + tie, choose the one that is even (least significant bit o).". + So we can't use the PowerPC "round to Nearest" mode. Instead we set + "round toward Zero" mode and round by adding +-0.5 before rounding + to the integer value. It is necessary to detect when x is + (+-)0x1.fffffffffffffp-2 because adding +-0.5 in this case will + cause an erroneous shift, carry and round. We simply return 0 if + 0.5 > x > -0.5. */ + +ENTRY (__lround) + stwu r1,-16(r1) + cfi_adjust_cfa_offset (16) +#ifdef SHARED + mflr r11 + cfi_register(lr,r11) + SETUP_GOT_ACCESS(r9,got_label) + addis r10,r9,.LC0-got_label@ha + lfs fp10,.LC0-got_label@l(r10) + addis r10,r9,.LC1-got_label@ha + lfs fp11,.LC1-got_label@l(r10) + addis r10,r9,.LC2-got_label@ha + lfd fp9,.LC2-got_label@l(r10) + addis r10,r9,.LC3-got_label@ha + lfd fp8,.LC3-got_label@l(r10) + mtlr r11 + cfi_same_value (lr) +#else + lis r9,.LC0@ha + lfs fp10,.LC0@l(r9) + lis r9,.LC1@ha + lfs fp11,.LC1@l(r9) + lis r9,.LC2@ha + lfd fp9,.LC2@l(r9) + lis r9,.LC3@ha + lfd fp8,.LC3@l(r9) +#endif + fabs fp2, fp1 /* Get the absolute value of x. */ + fsub fp12,fp10,fp10 /* Compute 0.0. */ + fcmpu cr6, fp2, fp10 /* if |x| < 0.5 */ + fcmpu cr5, fp1, fp9 /* if x >= 0x7fffffff.8p0 */ + fcmpu cr1, fp1, fp8 /* if x <= -0x80000000.8p0 */ + fcmpu cr7, fp1, fp12 /* x is negative? x < 0.0 */ + blt- cr6,.Lretzero + bge- cr5,.Loflow + ble- cr1,.Loflow + /* Test whether an integer to avoid spurious "inexact". */ + fadd fp3,fp2,fp11 + fsub fp3,fp3,fp11 + fcmpu cr5, fp2, fp3 + beq cr5,.Lnobias + fadd fp3,fp2,fp10 /* |x|+=0.5 bias to prepare to round. */ + bge cr7,.Lconvert /* x is positive so don't negate x. */ + fnabs fp3,fp3 /* -(|x|+=0.5) */ +.Lconvert: + fctiwz fp4,fp3 /* Convert to Integer word lround toward 0. */ + stfd fp4,8(r1) + nop /* Ensure the following load is in a different dispatch */ + nop /* group to avoid pipe stall on POWER4&5. */ + nop + lwz r3,8+LOWORD(r1) /* Load return as integer. */ +.Lout: + addi r1,r1,16 + blr +.Lretzero: /* when 0.5 > x > -0.5 */ + li r3,0 /* return 0. */ + b .Lout +.Lnobias: + fmr fp3,fp1 + b .Lconvert +.Loflow: + fmr fp3,fp11 + bge cr7,.Lconvert + fnabs fp3,fp3 + b .Lconvert + END (__lround) + +weak_alias (__lround, lround) + +strong_alias (__lround, __lroundf) +weak_alias (__lround, lroundf) + +#ifdef NO_LONG_DOUBLE +weak_alias (__lround, lroundl) +strong_alias (__lround, __lroundl) +#endif +#if LONG_DOUBLE_COMPAT(libm, GLIBC_2_1) +compat_symbol (libm, __lround, lroundl, GLIBC_2_1) +#endif diff --git a/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_lroundf.S b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_lroundf.S new file mode 100644 index 0000000000..6289e0be58 --- /dev/null +++ b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_lroundf.S @@ -0,0 +1 @@ +/* __lroundf is in s_lround.S */ diff --git a/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_nearbyint.S b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_nearbyint.S new file mode 100644 index 0000000000..df590e08bd --- /dev/null +++ b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_nearbyint.S @@ -0,0 +1,87 @@ +/* Round to int floating-point values. PowerPC32 version. + Copyright (C) 2011-2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + Contributed by Adhemerval Zanella <azanella@br.ibm.com>, 2011 + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. */ + +/* This has been coded in assembler because GCC makes such a mess of it + when it's coded in C. */ + +#include <sysdep.h> +#include <math_ldbl_opt.h> + + +/* double [fp1] nearbyint(double [fp1] x) */ + + .section .rodata.cst4,"aM",@progbits,4 + .align 2 +.LC0: /* 2**52 */ + .long 0x59800000 /* TWO52: 2**52 */ + + .section ".text" +ENTRY (__nearbyint) +#ifdef SHARED + mflr r11 + cfi_register(lr,r11) + bcl 20,31,1f +1: mflr r9 + addis r9,r9,.LC0-1b@ha + lfs fp13,.LC0-1b@l(r9) + mtlr r11 + cfi_same_value (lr) +#else + lis r9,.LC0@ha + lfs fp13,.LC0@l(r9) +#endif + fabs fp0,fp1 + fsub fp12,fp13,fp13 /* generate 0.0 */ + fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO52 */ + bge cr7,.L10 + fcmpu cr7,fp1,fp12 /* if (x > 0.0 */ + ble cr7,L(lessthanzero) + mffs fp11 + mtfsb0 4*cr7+lt /* Disable FE_INEXACT exception */ + fadd fp1,fp1,fp13 /* x += TWO52 */ + fsub fp1,fp1,fp13 /* x -= TWO52 */ + fabs fp1,fp1 /* if (x == 0.0 */ + mtfsf 0xff,fp11 /* Restore FE_INEXACT state. */ + blr +L(lessthanzero): + bgelr cr7 + mffs fp11 + mtfsb0 4*cr7+lt /* Disable FE_INEXACT exception */ + fsub fp1,fp1,fp13 /* x -= TWO52 */ + fadd fp1,fp1,fp13 /* x += TWO52 */ + fnabs fp1,fp1 /* if (x == 0.0) */ + mtfsf 0xff,fp11 /* Restore FE_INEXACT state. */ + blr +.L10: + /* Ensure sNaN input is converted to qNaN. */ + fcmpu cr7,fp1,fp1 + beqlr cr7 + fadd fp1,fp1,fp1 + blr +END (__nearbyint) + +weak_alias (__nearbyint, nearbyint) + +#ifdef NO_LONG_DOUBLE +weak_alias (__nearbyint, nearbyintl) +strong_alias (__nearbyint, __nearbyintl) +#endif +#if LONG_DOUBLE_COMPAT(libm, GLIBC_2_1) +compat_symbol (libm, __nearbyint, nearbyintl, GLIBC_2_1) +#endif diff --git a/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_nearbyintf.S b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_nearbyintf.S new file mode 100644 index 0000000000..fb4c6e4cee --- /dev/null +++ b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_nearbyintf.S @@ -0,0 +1,78 @@ +/* Round to int floating-point values. PowerPC32 version. + Copyright (C) 2011-2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + Contributed by Adhemerval Zanella <azanella@br.ibm.com>, 2011 + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. */ + +/* This has been coded in assembler because GCC makes such a mess of it + when it's coded in C. */ + +#include <sysdep.h> + + +/* float [fp1] nearbyintf(float [fp1] x) */ + + .section .rodata.cst4,"aM",@progbits,4 + .align 2 +.LC0: + .long 0x4B000000 /* TWO23: 2**23 */ + + .section ".text" +ENTRY (__nearbyintf) +#ifdef SHARED + mflr r11 + cfi_register(lr,r11) + bcl 20,31,1f +1: mflr r9 + addis r9,r9,.LC0-1b@ha + lfs fp13,.LC0-1b@l(r9) + mtlr r11 + cfi_same_value (lr) +#else + lis r9,.LC0@ha + lfs fp13,.LC0@l(r9) +#endif + fabs fp0,fp1 + fsub fp12,fp13,fp13 /* generate 0.0 */ + fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO23 */ + bge cr7,.L10 + fcmpu cr7,fp1,fp12 /* if (x > 0.0 */ + ble cr7,L(lessthanzero) + mffs fp11 + mtfsb0 4*cr7+lt /* Disable FE_INEXACT exception */ + fadds fp1,fp1,fp13 /* x += TWO23 */ + fsubs fp1,fp1,fp13 /* x -= TWO23 */ + fabs fp1,fp1 /* if (x == 0.0) */ + mtfsf 0xff,fp11 /* Restore FE_INEXACT state. */ + blr +L(lessthanzero): + bgelr cr7 + mffs fp11 + mtfsb0 4*cr7+lt /* Disable FE_INEXACT exception */ + fsubs fp1,fp1,fp13 /* x -= TWO23 */ + fadds fp1,fp1,fp13 /* x += TWO23 */ + fnabs fp1,fp1 /* if (x == 0.0) */ + mtfsf 0xff,fp11 /* Restore FE_INEXACT state. */ + blr +.L10: + /* Ensure sNaN input is converted to qNaN. */ + fcmpu cr7,fp1,fp1 + beqlr cr7 + fadds fp1,fp1,fp1 + blr +END (__nearbyintf) + +weak_alias (__nearbyintf, nearbyintf) diff --git a/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_rint.S b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_rint.S new file mode 100644 index 0000000000..a1c3116447 --- /dev/null +++ b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_rint.S @@ -0,0 +1,76 @@ +/* Round to int floating-point values. PowerPC32 version. + Copyright (C) 2004-2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. */ + +/* This has been coded in assembler because GCC makes such a mess of it + when it's coded in C. */ + +#include <sysdep.h> +#include <math_ldbl_opt.h> + + .section .rodata.cst4,"aM",@progbits,4 + .align 2 +.LC0: /* 2**52 */ + .long 0x59800000 + + .section ".text" +ENTRY (__rint) +#ifdef SHARED + mflr r11 + cfi_register(lr,r11) + SETUP_GOT_ACCESS(r9,got_label) + addis r9,r9,.LC0-got_label@ha + lfs fp13,.LC0-got_label@l(r9) + mtlr r11 + cfi_same_value (lr) +#else + lis r9,.LC0@ha + lfs fp13,.LC0@l(r9) +#endif + fabs fp0,fp1 + fsub fp12,fp13,fp13 /* generate 0.0 */ + fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO52) */ + fcmpu cr6,fp1,fp12 /* if (x > 0.0) */ + bnl cr7,.L10 + bng cr6,.L4 + fadd fp1,fp1,fp13 /* x+= TWO52; */ + fsub fp1,fp1,fp13 /* x-= TWO52; */ + fabs fp1,fp1 /* if (x == 0.0) */ + blr /* x = 0.0; */ +.L4: + bnllr cr6 /* if (x < 0.0) */ + fsub fp1,fp1,fp13 /* x-= TWO52; */ + fadd fp1,fp1,fp13 /* x+= TWO52; */ + fnabs fp1,fp1 /* if (x == 0.0) */ + blr /* x = -0.0; */ +.L10: + /* Ensure sNaN input is converted to qNaN. */ + fcmpu cr7,fp1,fp1 + beqlr cr7 + fadd fp1,fp1,fp1 + blr + END (__rint) + +weak_alias (__rint, rint) + +#ifdef NO_LONG_DOUBLE +weak_alias (__rint, rintl) +strong_alias (__rint, __rintl) +#endif +#if LONG_DOUBLE_COMPAT(libm, GLIBC_2_0) +compat_symbol (libm, __rint, rintl, GLIBC_2_0) +#endif diff --git a/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_rintf.S b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_rintf.S new file mode 100644 index 0000000000..70e52e894d --- /dev/null +++ b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_rintf.S @@ -0,0 +1,65 @@ +/* Round float to int floating-point values. PowerPC32 version. + Copyright (C) 2004-2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. */ + +#include <sysdep.h> + + .section .rodata.cst4,"aM",@progbits,4 + .align 2 +.LC0: /* 2**23 */ + .long 0x4b000000 + + .section ".text" +ENTRY (__rintf) +#ifdef SHARED + mflr r11 + cfi_register(lr,r11) + SETUP_GOT_ACCESS(r9,got_label) + addis r9,r9,.LC0-got_label@ha + lfs fp13,.LC0-got_label@l(r9) + mtlr r11 + cfi_same_value (lr) +#else + lis r9,.LC0@ha + lfs fp13,.LC0@l(r9) +#endif + fabs fp0,fp1 + fsubs fp12,fp13,fp13 /* generate 0.0 */ + fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO23) */ + fcmpu cr6,fp1,fp12 /* if (x > 0.0) */ + bnl cr7,.L10 + bng cr6,.L4 + fadds fp1,fp1,fp13 /* x+= TWO23; */ + fsubs fp1,fp1,fp13 /* x-= TWO23; */ + fabs fp1,fp1 /* if (x == 0.0) */ + blr /* x = 0.0; */ +.L4: + bnllr cr6 /* if (x < 0.0) */ + fsubs fp1,fp1,fp13 /* x-= TWO23; */ + fadds fp1,fp1,fp13 /* x+= TWO23; */ + fnabs fp1,fp1 /* if (x == 0.0) */ + blr /* x = -0.0; */ +.L10: + /* Ensure sNaN input is converted to qNaN. */ + fcmpu cr7,fp1,fp1 + beqlr cr7 + fadds fp1,fp1,fp1 + blr + END (__rintf) + +weak_alias (__rintf, rintf) + diff --git a/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_round.S b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_round.S new file mode 100644 index 0000000000..f539890b17 --- /dev/null +++ b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_round.S @@ -0,0 +1,104 @@ +/* round function. PowerPC32 version. + Copyright (C) 2004-2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. */ + +#include <sysdep.h> +#include <math_ldbl_opt.h> + + .section .rodata.cst8,"aM",@progbits,8 + .align 2 +.LC0: /* 2**52 */ + .long 0x59800000 +.LC1: /* 0.5 */ + .long 0x3f000000 + +/* double [fp1] round (double x [fp1]) + IEEE 1003.1 round function. IEEE specifies "round to the nearest + integer value, rounding halfway cases away from zero, regardless of + the current rounding mode." However PowerPC Architecture defines + "Round to Nearest" as "Choose the best approximation. In case of a + tie, choose the one that is even (least significant bit o).". + So we can't use the PowerPC "Round to Nearest" mode. Instead we set + "Round toward Zero" mode and round by adding +-0.5 before rounding + to the integer value. */ + + .section ".text" +ENTRY (__round) +#ifdef SHARED + mflr r11 + cfi_register(lr,r11) + SETUP_GOT_ACCESS(r9,got_label) + addis r9,r9,.LC0-got_label@ha + addi r9,r9,.LC0-got_label@l + mtlr r11 + cfi_same_value (lr) + lfs fp13,0(r9) +#else + lis r9,.LC0@ha + lfs fp13,.LC0@l(r9) +#endif + fabs fp0,fp1 + fsub fp12,fp13,fp13 /* generate 0.0 */ + fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO52) */ + mffs fp11 /* Save current FPU rounding mode and + "inexact" state. */ + fcmpu cr6,fp1,fp12 /* if (x > 0.0) */ + bnl- cr7,.L10 + mtfsfi 7,1 /* Set rounding mode toward 0. */ +#ifdef SHARED + lfs fp10,.LC1-.LC0(r9) +#else + lis r9,.LC1@ha + lfs fp10,.LC1@l(r9) +#endif + ble- cr6,.L4 + fadd fp1,fp1,fp10 /* x+= 0.5; */ + fadd fp1,fp1,fp13 /* x+= TWO52; */ + fsub fp1,fp1,fp13 /* x-= TWO52; */ + fabs fp1,fp1 /* if (x == 0.0) */ + /* x = 0.0; */ + mtfsf 0xff,fp11 /* Restore previous rounding mode and + "inexact" state. */ + blr +.L4: + fsub fp9,fp1,fp10 /* x+= 0.5; */ + bge- cr6,.L9 /* if (x < 0.0) */ + fsub fp1,fp9,fp13 /* x-= TWO52; */ + fadd fp1,fp1,fp13 /* x+= TWO52; */ + fnabs fp1,fp1 /* if (x == 0.0) */ + /* x = -0.0; */ +.L9: + mtfsf 0xff,fp11 /* Restore previous rounding mode and + "inexact" state. */ + blr +.L10: + /* Ensure sNaN input is converted to qNaN. */ + fcmpu cr7,fp1,fp1 + beqlr cr7 + fadd fp1,fp1,fp1 + blr + END (__round) + +weak_alias (__round, round) + +#ifdef NO_LONG_DOUBLE +weak_alias (__round, roundl) +strong_alias (__round, __roundl) +#endif +#if LONG_DOUBLE_COMPAT(libm, GLIBC_2_1) +compat_symbol (libm, __round, roundl, GLIBC_2_1) +#endif diff --git a/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_roundf.S b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_roundf.S new file mode 100644 index 0000000000..5daf84b598 --- /dev/null +++ b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_roundf.S @@ -0,0 +1,95 @@ +/* roundf function. PowerPC32 version. + Copyright (C) 2004-2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. */ + +#include <sysdep.h> + + .section .rodata.cst8,"aM",@progbits,8 + .align 3 +.LC0: /* 2**23 */ + .long 0x4b000000 +.LC1: /* 0.5 */ + .long 0x3f000000 + +/* float [fp1] roundf (float x [fp1]) + IEEE 1003.1 round function. IEEE specifies "round to the nearest + integer value, rounding halfway cases away from zero, regardless of + the current rounding mode." However PowerPC Architecture defines + "Round to Nearest" as "Choose the best approximation. In case of a + tie, choose the one that is even (least significant bit o).". + So we can't use the PowerPC "Round to Nearest" mode. Instead we set + "Round toward Zero" mode and round by adding +-0.5 before rounding + to the integer value. */ + + .section ".text" +ENTRY (__roundf ) +#ifdef SHARED + mflr r11 + cfi_register(lr,r11) + SETUP_GOT_ACCESS(r9,got_label) + addis r9,r9,.LC0-got_label@ha + addi r9,r9,.LC0-got_label@l + mtlr r11 + cfi_same_value (lr) + lfs fp13,0(r9) +#else + lis r9,.LC0@ha + lfs fp13,.LC0@l(r9) +#endif + fabs fp0,fp1 + fsubs fp12,fp13,fp13 /* generate 0.0 */ + fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO23) */ + mffs fp11 /* Save current FPU rounding mode and + "inexact" state. */ + fcmpu cr6,fp1,fp12 /* if (x > 0.0) */ + bnl- cr7,.L10 + mtfsfi 7,1 /* Set rounding mode toward 0. */ +#ifdef SHARED + lfs fp10,.LC1-.LC0(r9) +#else + lfs fp10,.LC1@l(r9) +#endif + ble- cr6,.L4 + fadds fp1,fp1,fp10 /* x+= 0.5; */ + fadds fp1,fp1,fp13 /* x+= TWO23; */ + fsubs fp1,fp1,fp13 /* x-= TWO23; */ + fabs fp1,fp1 /* if (x == 0.0) */ + /* x = 0.0; */ + mtfsf 0xff,fp11 /* Restore previous rounding mode and + "inexact" state. */ + blr +.L4: + fsubs fp9,fp1,fp10 /* x+= 0.5; */ + bge- cr6,.L9 /* if (x < 0.0) */ + fsubs fp1,fp9,fp13 /* x-= TWO23; */ + fadds fp1,fp1,fp13 /* x+= TWO23; */ + fnabs fp1,fp1 /* if (x == 0.0) */ + /* x = -0.0; */ +.L9: + mtfsf 0xff,fp11 /* Restore previous rounding mode and + "inexact" state. */ + blr +.L10: + /* Ensure sNaN input is converted to qNaN. */ + fcmpu cr7,fp1,fp1 + beqlr cr7 + fadds fp1,fp1,fp1 + blr + END (__roundf) + +weak_alias (__roundf, roundf) + diff --git a/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_trunc.S b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_trunc.S new file mode 100644 index 0000000000..85d292c03c --- /dev/null +++ b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_trunc.S @@ -0,0 +1,90 @@ +/* trunc function. PowerPC32 version. + Copyright (C) 2004-2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. */ + +#include <sysdep.h> +#include <math_ldbl_opt.h> + + .section .rodata.cst4,"aM",@progbits,4 + .align 2 +.LC0: /* 2**52 */ + .long 0x59800000 + +/* double [fp1] trunc (double x [fp1]) + IEEE 1003.1 trunc function. IEEE specifies "trunc to the integer + value, in floating format, nearest to but no larger in magnitude + then the argument." + We set "round toward Zero" mode and trunc by adding +-2**52 then + subtracting +-2**52. */ + + .section ".text" +ENTRY (__trunc) +#ifdef SHARED + mflr r11 + cfi_register(lr,r11) + SETUP_GOT_ACCESS(r9,got_label) + addis r9,r9,.LC0-got_label@ha + lfs fp13,.LC0-got_label@l(r9) + mtlr r11 + cfi_same_value (lr) +#else + lis r9,.LC0@ha + lfs fp13,.LC0@l(r9) +#endif + fabs fp0,fp1 + fsub fp12,fp13,fp13 /* generate 0.0 */ + fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO52) */ + mffs fp11 /* Save current FPU rounding mode and + "inexact" state. */ + fcmpu cr6,fp1,fp12 /* if (x > 0.0) */ + bnl- cr7,.L10 + mtfsfi 7,1 /* Set rounding toward 0 mode. */ + ble- cr6,.L4 + fadd fp1,fp1,fp13 /* x+= TWO52; */ + fsub fp1,fp1,fp13 /* x-= TWO52; */ + fabs fp1,fp1 /* if (x == 0.0) */ + /* x = 0.0; */ + mtfsf 0xff,fp11 /* Restore previous rounding mode and + "inexact" state. */ + blr +.L4: + bge- cr6,.L9 /* if (x < 0.0) */ + fsub fp1,fp1,fp13 /* x-= TWO52; */ + fadd fp1,fp1,fp13 /* x+= TWO52; */ + fnabs fp1,fp1 /* if (x == 0.0) */ + /* x = -0.0; */ +.L9: + mtfsf 0xff,fp11 /* Restore previous rounding mode and + "inexact" state. */ + blr +.L10: + /* Ensure sNaN input is converted to qNaN. */ + fcmpu cr7,fp1,fp1 + beqlr cr7 + fadd fp1,fp1,fp1 + blr + END (__trunc) + +weak_alias (__trunc, trunc) + +#ifdef NO_LONG_DOUBLE +weak_alias (__trunc, truncl) +strong_alias (__trunc, __truncl) +#endif +#if LONG_DOUBLE_COMPAT(libm, GLIBC_2_1) +compat_symbol (libm, __trunc, truncl, GLIBC_2_1) +#endif diff --git a/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_truncf.S b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_truncf.S new file mode 100644 index 0000000000..9b91e3f0a5 --- /dev/null +++ b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/s_truncf.S @@ -0,0 +1,82 @@ +/* truncf function. PowerPC32 version. + Copyright (C) 2004-2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. */ + +#include <sysdep.h> + + .section .rodata.cst4,"aM",@progbits,4 + .align 2 +.LC0: /* 2**23 */ + .long 0x4b000000 + +/* float [fp1] truncf (float x [fp1]) + IEEE 1003.1 trunc function. IEEE specifies "trunc to the integer + value, in floating format, nearest to but no larger in magnitude + then the argument." + We set "round toward Zero" mode and trunc by adding +-2**23 then + subtracting +-2**23. */ + + .section ".text" +ENTRY (__truncf) +#ifdef SHARED + mflr r11 + cfi_register(lr,r11) + SETUP_GOT_ACCESS(r9,got_label) + addis r9,r9,.LC0-got_label@ha + lfs fp13,.LC0-got_label@l(r9) + mtlr r11 + cfi_same_value (lr) +#else + lis r9,.LC0@ha + lfs fp13,.LC0@l(r9) +#endif + fabs fp0,fp1 + fsubs fp12,fp13,fp13 /* generate 0.0 */ + fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO23) */ + mffs fp11 /* Save current FPU rounding mode and + "inexact" state. */ + fcmpu cr6,fp1,fp12 /* if (x > 0.0) */ + bnl- cr7,.L10 + mtfsfi 7,1 /* Set rounding toward 0 mode. */ + ble- cr6,.L4 + fadds fp1,fp1,fp13 /* x+= TWO23; */ + fsubs fp1,fp1,fp13 /* x-= TWO23; */ + fabs fp1,fp1 /* if (x == 0.0) */ + /* x = 0.0; */ + mtfsf 0xff,fp11 /* Restore previous rounding mode and + "inexact" state. */ + blr +.L4: + bge- cr6,.L9 /* if (x < 0.0) */ + fsubs fp1,fp1,fp13 /* x-= TWO23; */ + fadds fp1,fp1,fp13 /* x+= TWO23; */ + fnabs fp1,fp1 /* if (x == 0.0) */ + /* x = -0.0; */ +.L9: + mtfsf 0xff,fp11 /* Restore previous rounding mode and + "inexact" state. */ + blr +.L10: + /* Ensure sNaN input is converted to qNaN. */ + fcmpu cr7,fp1,fp1 + beqlr cr7 + fadds fp1,fp1,fp1 + blr + END (__truncf) + +weak_alias (__truncf, truncf) + diff --git a/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/setjmp-common.S b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/setjmp-common.S new file mode 100644 index 0000000000..19ad07ee56 --- /dev/null +++ b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/setjmp-common.S @@ -0,0 +1,183 @@ +/* setjmp for PowerPC. + Copyright (C) 1995-2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. */ + +#include <sysdep.h> +#include <stap-probe.h> +#define _ASM +#ifdef __NO_VMX__ +# include <novmxsetjmp.h> +#else +# include <jmpbuf-offsets.h> +#endif + + .machine "altivec" +ENTRY (__sigsetjmp_symbol) + +#ifdef PTR_MANGLE + mr r5,r1 + PTR_MANGLE(r5, r6) + stw r5,(JB_GPR1*4)(3) +#else + stw r1,(JB_GPR1*4)(3) +#endif + mflr r0 + /* setjmp probe expects longjmp first argument (4@3), second argument + (-4@4), and target address (4@0), respectively. */ + LIBC_PROBE (setjmp, 3, 4@3, -4@4, 4@0) + stw r14,((JB_GPRS+0)*4)(3) + stfd fp14,((JB_FPRS+0*2)*4)(3) +#ifdef PTR_MANGLE + PTR_MANGLE2 (r0, r6) +#endif + stw r0,(JB_LR*4)(3) + stw r15,((JB_GPRS+1)*4)(3) + stfd fp15,((JB_FPRS+1*2)*4)(3) + mfcr r0 + stw r16,((JB_GPRS+2)*4)(3) + stfd fp16,((JB_FPRS+2*2)*4)(3) + stw r0,(JB_CR*4)(3) + stw r17,((JB_GPRS+3)*4)(3) + stfd fp17,((JB_FPRS+3*2)*4)(3) + stw r18,((JB_GPRS+4)*4)(3) + stfd fp18,((JB_FPRS+4*2)*4)(3) + stw r19,((JB_GPRS+5)*4)(3) + stfd fp19,((JB_FPRS+5*2)*4)(3) + stw r20,((JB_GPRS+6)*4)(3) + stfd fp20,((JB_FPRS+6*2)*4)(3) + stw r21,((JB_GPRS+7)*4)(3) + stfd fp21,((JB_FPRS+7*2)*4)(3) + stw r22,((JB_GPRS+8)*4)(3) + stfd fp22,((JB_FPRS+8*2)*4)(3) + stw r23,((JB_GPRS+9)*4)(3) + stfd fp23,((JB_FPRS+9*2)*4)(3) + stw r24,((JB_GPRS+10)*4)(3) + stfd fp24,((JB_FPRS+10*2)*4)(3) + stw r25,((JB_GPRS+11)*4)(3) + stfd fp25,((JB_FPRS+11*2)*4)(3) + stw r26,((JB_GPRS+12)*4)(3) + stfd fp26,((JB_FPRS+12*2)*4)(3) + stw r27,((JB_GPRS+13)*4)(3) + stfd fp27,((JB_FPRS+13*2)*4)(3) + stw r28,((JB_GPRS+14)*4)(3) + stfd fp28,((JB_FPRS+14*2)*4)(3) + stw r29,((JB_GPRS+15)*4)(3) + stfd fp29,((JB_FPRS+15*2)*4)(3) + stw r30,((JB_GPRS+16)*4)(3) + stfd fp30,((JB_FPRS+16*2)*4)(3) + stw r31,((JB_GPRS+17)*4)(3) + stfd fp31,((JB_FPRS+17*2)*4)(3) +#ifndef __NO_VMX__ +# ifdef PIC + mflr r6 + cfi_register(lr,r6) + SETUP_GOT_ACCESS(r5,got_label) + addis r5,r5,_GLOBAL_OFFSET_TABLE_-got_label@ha + addi r5,r5,_GLOBAL_OFFSET_TABLE_-got_label@l + mtlr r6 + cfi_same_value (lr) +# ifdef SHARED +# if IS_IN (rtld) + /* Inside ld.so we use the local alias to avoid runtime GOT + relocations. */ + lwz r5,_rtld_local_ro@got(r5) +# else + lwz r5,_rtld_global_ro@got(r5) +# endif + lwz r5,RTLD_GLOBAL_RO_DL_HWCAP_OFFSET+LOWORD(r5) +# else + lwz r5,_dl_hwcap@got(r5) + lwz r5,LOWORD(r5) +# endif +# else + lis r6,(_dl_hwcap+LOWORD)@ha + lwz r5,(_dl_hwcap+LOWORD)@l(r6) +# endif + andis. r5,r5,(PPC_FEATURE_HAS_ALTIVEC >> 16) + beq L(no_vmx) + la r5,((JB_VRS)*4)(3) + andi. r6,r5,0xf + mfspr r0,VRSAVE + stw r0,((JB_VRSAVE)*4)(3) + addi r6,r5,16 + beq+ L(aligned_save_vmx) + + lvsr v0,0,r5 + lvsl v1,0,r5 + addi r6,r5,-16 + +# define save_misaligned_vmx(savevr,prevvr,shiftvr,tmpvr,savegpr,addgpr) \ + addi addgpr,addgpr,32; \ + vperm tmpvr,prevvr,savevr,shiftvr; \ + stvx tmpvr,0,savegpr + + /* + * We have to be careful not to corrupt the data below v20 and + * above v31. To keep things simple we just rotate both ends in + * the opposite direction to our main permute so we can use + * the common macro. + */ + + /* load and rotate data below v20 */ + lvx v2,0,r5 + vperm v2,v2,v2,v1 + save_misaligned_vmx(v20,v2,v0,v3,r5,r6) + save_misaligned_vmx(v21,v20,v0,v3,r6,r5) + save_misaligned_vmx(v22,v21,v0,v3,r5,r6) + save_misaligned_vmx(v23,v22,v0,v3,r6,r5) + save_misaligned_vmx(v24,v23,v0,v3,r5,r6) + save_misaligned_vmx(v25,v24,v0,v3,r6,r5) + save_misaligned_vmx(v26,v25,v0,v3,r5,r6) + save_misaligned_vmx(v27,v26,v0,v3,r6,r5) + save_misaligned_vmx(v28,v27,v0,v3,r5,r6) + save_misaligned_vmx(v29,v28,v0,v3,r6,r5) + save_misaligned_vmx(v30,v29,v0,v3,r5,r6) + save_misaligned_vmx(v31,v30,v0,v3,r6,r5) + /* load and rotate data above v31 */ + lvx v2,0,r6 + vperm v2,v2,v2,v1 + save_misaligned_vmx(v2,v31,v0,v3,r5,r6) + + b L(no_vmx) + +L(aligned_save_vmx): + stvx 20,0,r5 + addi r5,r5,32 + stvx 21,0,r6 + addi r6,r6,32 + stvx 22,0,r5 + addi r5,r5,32 + stvx 23,0,r6 + addi r6,r6,32 + stvx 24,0,r5 + addi r5,r5,32 + stvx 25,0,r6 + addi r6,r6,32 + stvx 26,0,r5 + addi r5,r5,32 + stvx 27,0,r6 + addi r6,r6,32 + stvx 28,0,r5 + addi r5,r5,32 + stvx 29,0,r6 + addi r6,r6,32 + stvx 30,0,r5 + stvx 31,0,r6 +L(no_vmx): +#endif + b __sigjmp_save_symbol@local +END (__sigsetjmp_symbol) diff --git a/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/setjmp.S b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/setjmp.S new file mode 100644 index 0000000000..02b17d3467 --- /dev/null +++ b/REORG.TODO/sysdeps/powerpc/powerpc32/fpu/setjmp.S @@ -0,0 +1,47 @@ +/* non altivec (old) version of setjmp for PowerPC. + Copyright (C) 1995-2017 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. */ + +#include <libc-symbols.h> +#include <rtld-global-offsets.h> +#include <shlib-compat.h> + +#if !IS_IN (libc) +/* Build a non-versioned object for rtld-*. */ +# define __sigsetjmp_symbol __sigsetjmp +# define __sigjmp_save_symbol __sigjmp_save +# include "setjmp-common.S" + +#else /* IS_IN (libc) */ +/* Build a versioned object for libc. */ +versioned_symbol (libc, __vmx__sigsetjmp, __sigsetjmp, GLIBC_2_3_4) +# define __sigsetjmp_symbol __vmx__sigsetjmp +# define __sigjmp_save_symbol __vmx__sigjmp_save +# include "setjmp-common.S" +libc_hidden_ver (__vmx__sigsetjmp, __sigsetjmp) + +# if defined SHARED && SHLIB_COMPAT (libc, GLIBC_2_0, GLIBC_2_3_4) +# define __NO_VMX__ +# undef __sigsetjmp_symbol +# undef __sigjmp_save_symbol +# undef JB_SIZE +compat_symbol (libc, __novmx__sigsetjmp, __sigsetjmp, GLIBC_2_0) +# define __sigsetjmp_symbol __novmx__sigsetjmp +# define __sigjmp_save_symbol __novmx__sigjmp_save +# include "setjmp-common.S" +# endif +#endif /* IS_IN (libc) */ |