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diff --git a/ChangeLog b/ChangeLog
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 2014-12-22  Wilco Dijkstra  <wdijkstr@arm.com>
 
+	* sysdeps/aarch64/fpu/feenablxcpt.c (feenableexcept):
+	Optimize to avoid an unnecessary FPCR read.
+
+2014-12-22  Wilco Dijkstra  <wdijkstr@arm.com>
+
 	* sysdeps/aarch64/fpu/fesetenv.c (fesetenv):
 	Optimize to reduce FPCR/FPSR accesses.