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-rw-r--r--ChangeLog5
-rw-r--r--sysdeps/x86/cpu-features.c8
2 files changed, 13 insertions, 0 deletions
diff --git a/ChangeLog b/ChangeLog
index 44deb0fd26..0b0b5e2202 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,8 @@
+2016-04-15 H.J. Lu <hongjiu.lu@intel.com>
+
+ * sysdeps/x86/cpu-features.c (init_cpu_features): Detect Intel
+ Goldmont and Airmont processors.
+
2016-04-15 Wilco Dijkstra <wdijkstr@arm.com>
* string/string.h: Use __GNUC_PREREQ(3,4) for bits/string2.h.
diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c
index 963b845916..a5fa81f709 100644
--- a/sysdeps/x86/cpu-features.c
+++ b/sysdeps/x86/cpu-features.c
@@ -140,6 +140,14 @@ init_cpu_features (struct cpu_features *cpu_features)
cpu_features->feature[index_arch_Prefer_No_VZEROUPPER]
|= bit_arch_Prefer_No_VZEROUPPER;
+ case 0x5c:
+ case 0x5f:
+ /* Unaligned load versions are faster than SSSE3
+ on Goldmont. */
+
+ case 0x4c:
+ /* Airmont is a die shrink of Silvermont. */
+
case 0x37:
case 0x4a:
case 0x4d: