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-rw-r--r--ChangeLog5
-rw-r--r--sysdeps/mips/sys/tas.h3
2 files changed, 7 insertions, 1 deletions
diff --git a/ChangeLog b/ChangeLog
index 204af29aa5..67abf144c9 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,8 @@
+2018-11-01 Fredrik Noring <noring@nocrew.org>
+
+ * sysdeps/mips/sys/tas.h (_test_and_set): Handle the R5900 CPU
+ with the ISA override.
+
2018-10-31 Rafael Avila de Espindola <rafael@espindo.la>
* sysdeps/unix/sysv/linux/sysdep-vdso.h: Simplify an #if #else
diff --git a/sysdeps/mips/sys/tas.h b/sysdeps/mips/sys/tas.h
index d5ed013e28..22cee94f7a 100644
--- a/sysdeps/mips/sys/tas.h
+++ b/sysdeps/mips/sys/tas.h
@@ -38,10 +38,11 @@ __NTH (_test_and_set (int *__p, int __v))
{
int __r, __t;
+ /* The R5900 reports itself as MIPS III but it does not have LL/SC. */
__asm__ __volatile__
("/* Inline test and set */\n"
".set push\n\t"
-#if _MIPS_SIM == _ABIO32 && __mips < 2
+#if _MIPS_SIM == _ABIO32 && (__mips < 2 || defined (_MIPS_ARCH_R5900))
".set mips2\n\t"
#endif
"sync\n\t"