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authorGordana Cmiljanovic <Gordana.Cmiljanovic@imgtec.com>2017-06-13 21:34:45 +0000
committerJoseph Myers <joseph@codesourcery.com>2017-06-13 21:34:45 +0000
commitb309f058cf7639951bebb86270ffbc116ea5f720 (patch)
treebd42dec0d4649a94e18384bf0294f3c473a6aa83 /sysdeps
parentc2528fef3b05bcffb1ac27c6c09cc3ff24b7f03f (diff)
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mips: Fix store/load gp registers to/from ucontext_t
General purpose registers in mcontext_t structure are 8 bytes long for both MIPS32/MIPS64. get/set/make/swap context implementations for MIPS O32 incorrectly assume that general purpose registers in this structure are 4 bytes long. This patch is fixing that. Tested for MIPS O32 LE and BE. Compared objdump of modified functions for mips n32 and mips n64. [BZ #21548] * sysdeps/unix/sysv/linux/mips/getcontext.S: Define MCONTEXT_SZGREG as 8 and use it when copying general purpose registers. * sysdeps/unix/sysv/linux/mips/makecontext.S: Likewise. * sysdeps/unix/sysv/linux/mips/mips32/Makefile: Include new test for mips o32. * sysdeps/unix/sysv/linux/mips/mips32/bug-getcontext-mips-gp.c: Added new test for mips o32. * sysdeps/unix/sysv/linux/mips/setcontext.S: Define MCONTEXT_SZGREG as 8 and use it when copying general purpose registers. * sysdeps/unix/sysv/linux/mips/swapcontext.S: Likewise.
Diffstat (limited to 'sysdeps')
-rw-r--r--sysdeps/unix/sysv/linux/mips/getcontext.S37
-rw-r--r--sysdeps/unix/sysv/linux/mips/makecontext.S27
-rw-r--r--sysdeps/unix/sysv/linux/mips/mips32/Makefile4
-rw-r--r--sysdeps/unix/sysv/linux/mips/mips32/bug-getcontext-mips-gp.c63
-rw-r--r--sysdeps/unix/sysv/linux/mips/setcontext.S51
-rw-r--r--sysdeps/unix/sysv/linux/mips/swapcontext.S79
6 files changed, 180 insertions, 81 deletions
diff --git a/sysdeps/unix/sysv/linux/mips/getcontext.S b/sysdeps/unix/sysv/linux/mips/getcontext.S
index 64de2ebf2e..aa6f45e68c 100644
--- a/sysdeps/unix/sysv/linux/mips/getcontext.S
+++ b/sysdeps/unix/sysv/linux/mips/getcontext.S
@@ -38,6 +38,12 @@ MASK = 0x10000000
#endif
FRAMESZ = ((LOCALSZ * SZREG) + ALSZ) & ALMASK
GPOFF = FRAMESZ - (1 * SZREG)
+MCONTEXT_GREGSZ = 8
+#if _MIPS_SIM == _ABIO32 && __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+MCONTEXT_GREGOFF = 4
+#else
+MCONTEXT_GREGOFF = 0
+#endif
NESTED (__getcontext, FRAMESZ, ra)
.mask MASK, 0
@@ -74,23 +80,24 @@ NESTED (__getcontext, FRAMESZ, ra)
/* Store a magic flag. */
li v1, 1
- REG_S v1, (0 * SZREG + MCONTEXT_GREGS)(a0) /* zero */
-
- REG_S s0, (16 * SZREG + MCONTEXT_GREGS)(a0)
- REG_S s1, (17 * SZREG + MCONTEXT_GREGS)(a0)
- REG_S s2, (18 * SZREG + MCONTEXT_GREGS)(a0)
- REG_S s3, (19 * SZREG + MCONTEXT_GREGS)(a0)
- REG_S s4, (20 * SZREG + MCONTEXT_GREGS)(a0)
- REG_S s5, (21 * SZREG + MCONTEXT_GREGS)(a0)
- REG_S s6, (22 * SZREG + MCONTEXT_GREGS)(a0)
- REG_S s7, (23 * SZREG + MCONTEXT_GREGS)(a0)
+ /* zero */
+ REG_S v1, (MCONTEXT_GREGOFF + 0 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+
+ REG_S s0, (MCONTEXT_GREGOFF + 16 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+ REG_S s1, (MCONTEXT_GREGOFF + 17 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+ REG_S s2, (MCONTEXT_GREGOFF + 18 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+ REG_S s3, (MCONTEXT_GREGOFF + 19 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+ REG_S s4, (MCONTEXT_GREGOFF + 20 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+ REG_S s5, (MCONTEXT_GREGOFF + 21 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+ REG_S s6, (MCONTEXT_GREGOFF + 22 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+ REG_S s7, (MCONTEXT_GREGOFF + 23 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
#if ! defined (__PIC__) || _MIPS_SIM != _ABIO32
- REG_S _GP, (28 * SZREG + MCONTEXT_GREGS)(a0)
+ REG_S _GP, (MCONTEXT_GREGOFF + 28 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
#endif
- REG_S _SP, (29 * SZREG + MCONTEXT_GREGS)(a0)
- REG_S fp, (30 * SZREG + MCONTEXT_GREGS)(a0)
- REG_S ra, (31 * SZREG + MCONTEXT_GREGS)(a0)
- REG_S ra, MCONTEXT_PC(a0)
+ REG_S _SP, (MCONTEXT_GREGOFF + 29 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+ REG_S fp, (MCONTEXT_GREGOFF + 30 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+ REG_S ra, (MCONTEXT_GREGOFF + 31 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+ REG_S ra, (MCONTEXT_GREGOFF + MCONTEXT_PC)(a0)
#ifdef __mips_hard_float
# if _MIPS_SIM == _ABI64
diff --git a/sysdeps/unix/sysv/linux/mips/makecontext.S b/sysdeps/unix/sysv/linux/mips/makecontext.S
index 5c3af04491..6bbdc26f5d 100644
--- a/sysdeps/unix/sysv/linux/mips/makecontext.S
+++ b/sysdeps/unix/sysv/linux/mips/makecontext.S
@@ -53,6 +53,12 @@ NARGREGS = 8
A3OFF = FRAMESZ + (3 * SZREG) /* caller-allocated */
NARGREGS = 4
#endif
+MCONTEXT_GREGSZ = 8
+#if _MIPS_SIM == _ABIO32 && __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+MCONTEXT_GREGOFF = 4
+#else
+MCONTEXT_GREGOFF = 0
+#endif
NESTED (__makecontext, FRAMESZ, ra)
.mask MASK, -(ARGSZ * SZREG)
@@ -89,7 +95,8 @@ NESTED (__makecontext, FRAMESZ, ra)
/* Store a magic flag. */
li v1, 1
- REG_S v1, (0 * SZREG + MCONTEXT_GREGS)(a0) /* zero */
+ /* zero */
+ REG_S v1, (MCONTEXT_GREGOFF + 0 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
/* Set up the stack. */
PTR_L t0, STACK_SP(a0)
@@ -100,14 +107,14 @@ NESTED (__makecontext, FRAMESZ, ra)
blez a2, 2f /* no arguments */
/* Store register arguments. */
- PTR_ADDIU t2, a0, MCONTEXT_GREGS + 4 * SZREG
+ PTR_ADDIU t2, a0, MCONTEXT_GREGS + 4 * MCONTEXT_GREGSZ + MCONTEXT_GREGOFF
move t3, zero
0:
addiu t3, 1
REG_L v1, (t1)
PTR_ADDIU t1, SZREG
REG_S v1, (t2)
- PTR_ADDIU t2, SZREG
+ PTR_ADDIU t2, MCONTEXT_GREGSZ
bgeu t3, a2, 2f /* all done */
bltu t3, NARGREGS, 0b /* next */
@@ -138,13 +145,17 @@ NESTED (__makecontext, FRAMESZ, ra)
#else
PTR_LA t9, 99f
#endif
- REG_S t0, (29 * SZREG + MCONTEXT_GREGS)(a0) /* sp */
- REG_S v1, (16 * SZREG + MCONTEXT_GREGS)(a0) /* s0 */
+ /* sp */
+ REG_S t0, (MCONTEXT_GREGOFF + 29 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+ /* s0 */
+ REG_S v1, (MCONTEXT_GREGOFF + 16 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
#ifdef __PIC__
- REG_S gp, (17 * SZREG + MCONTEXT_GREGS)(a0) /* s1 */
+ /* s1 */
+ REG_S gp, (MCONTEXT_GREGOFF + 17 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
#endif
- REG_S t9, (31 * SZREG + MCONTEXT_GREGS)(a0) /* ra */
- REG_S a1, MCONTEXT_PC(a0)
+ /* ra */
+ REG_S t9, (MCONTEXT_GREGOFF + 31 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+ REG_S a1, (MCONTEXT_GREGOFF + MCONTEXT_PC)(a0)
#ifdef __PIC__
RESTORE_GP64_STACK
diff --git a/sysdeps/unix/sysv/linux/mips/mips32/Makefile b/sysdeps/unix/sysv/linux/mips/mips32/Makefile
index 9439d29dea..33b461500c 100644
--- a/sysdeps/unix/sysv/linux/mips/mips32/Makefile
+++ b/sysdeps/unix/sysv/linux/mips/mips32/Makefile
@@ -2,3 +2,7 @@ ifeq ($(subdir),conform)
# For bugs 17786 and 21278.
conformtest-xfail-conds += mips-o32-linux
endif
+
+ifeq ($(subdir),stdlib)
+tests += bug-getcontext-mips-gp
+endif
diff --git a/sysdeps/unix/sysv/linux/mips/mips32/bug-getcontext-mips-gp.c b/sysdeps/unix/sysv/linux/mips/mips32/bug-getcontext-mips-gp.c
new file mode 100644
index 0000000000..9327f172a5
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/mips/mips32/bug-getcontext-mips-gp.c
@@ -0,0 +1,63 @@
+/* Tests register values retreived by getcontext() for mips o32.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <errno.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <ucontext.h>
+
+
+#if !defined __mips__ || _MIPS_SIM != _ABIO32
+# error "MIPS O32 specific test."
+#endif
+
+#define SP_REG 29
+
+static int
+do_test (void)
+{
+ ucontext_t ctx;
+ memset (&ctx, 0, sizeof (ctx));
+ int status = getcontext (&ctx);
+ if (status)
+ {
+ printf ("\ngetcontext() failed, errno: %d.\n", errno);
+ return 1;
+ }
+
+ if (ctx.uc_mcontext.gregs[SP_REG] == 0
+ || ctx.uc_mcontext.gregs[SP_REG] > 0xffffffff)
+ {
+ printf ("\nError getcontext(): invalid $sp = 0x%llx.\n",
+ ctx.uc_mcontext.gregs[SP_REG]);
+ return 1;
+ }
+
+ if (ctx.uc_mcontext.pc == 0
+ || ctx.uc_mcontext.pc > 0xffffffff)
+ {
+ printf ("\nError getcontext(): invalid ctx.uc_mcontext.pc = 0x%llx.\n",
+ ctx.uc_mcontext.pc);
+ return 1;
+ }
+
+ return 0;
+}
+
+#include <support/test-driver.c>
diff --git a/sysdeps/unix/sysv/linux/mips/setcontext.S b/sysdeps/unix/sysv/linux/mips/setcontext.S
index 4e363d98d0..4f52b8d460 100644
--- a/sysdeps/unix/sysv/linux/mips/setcontext.S
+++ b/sysdeps/unix/sysv/linux/mips/setcontext.S
@@ -47,6 +47,12 @@ A0OFF = FRAMESZ - (1 * SZREG) /* callee-allocated */
#else
A0OFF = FRAMESZ + (0 * SZREG) /* caller-allocated */
#endif
+MCONTEXT_GREGSZ = 8
+#if _MIPS_SIM == _ABIO32 && __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+MCONTEXT_GREGOFF = 4
+#else
+MCONTEXT_GREGOFF = 0
+#endif
NESTED (__setcontext, FRAMESZ, ra)
.mask MASK, -(ARGSZ * SZREG)
@@ -73,7 +79,8 @@ NESTED (__setcontext, FRAMESZ, ra)
/* Check for the magic flag. */
li v0, 1
- REG_L v1, (0 * SZREG + MCONTEXT_GREGS)(a0) /* zero */
+ /* zero */
+ REG_L v1, (MCONTEXT_GREGOFF + 0 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
bne v0, v1, 98f
REG_S a0, A0OFF(sp)
@@ -117,32 +124,32 @@ NESTED (__setcontext, FRAMESZ, ra)
/* Note the contents of argument registers will be random
unless makecontext() has been called. */
- REG_L a0, (4 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L a1, (5 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L a2, (6 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L a3, (7 * SZREG + MCONTEXT_GREGS)(v0)
+ REG_L a0, (MCONTEXT_GREGOFF + 4 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L a1, (MCONTEXT_GREGOFF + 5 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L a2, (MCONTEXT_GREGOFF + 6 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L a3, (MCONTEXT_GREGOFF + 7 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
#if _MIPS_SIM != _ABIO32
- REG_L a4, (8 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L a5, (9 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L a6, (10 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L a7, (11 * SZREG + MCONTEXT_GREGS)(v0)
+ REG_L a4, (MCONTEXT_GREGOFF + 8 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L a5, (MCONTEXT_GREGOFF + 9 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L a6, (MCONTEXT_GREGOFF + 10 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L a7, (MCONTEXT_GREGOFF + 11 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
#endif
- REG_L s0, (16 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L s1, (17 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L s2, (18 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L s3, (19 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L s4, (20 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L s5, (21 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L s6, (22 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L s7, (23 * SZREG + MCONTEXT_GREGS)(v0)
+ REG_L s0, (MCONTEXT_GREGOFF + 16 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L s1, (MCONTEXT_GREGOFF + 17 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L s2, (MCONTEXT_GREGOFF + 18 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L s3, (MCONTEXT_GREGOFF + 19 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L s4, (MCONTEXT_GREGOFF + 20 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L s5, (MCONTEXT_GREGOFF + 21 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L s6, (MCONTEXT_GREGOFF + 22 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L s7, (MCONTEXT_GREGOFF + 23 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
#if ! defined (__PIC__) || _MIPS_SIM != _ABIO32
- REG_L gp, (28 * SZREG + MCONTEXT_GREGS)(v0)
+ REG_L gp, (MCONTEXT_GREGOFF + 28 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
#endif
- REG_L sp, (29 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L fp, (30 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L ra, (31 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L t9, MCONTEXT_PC(v0)
+ REG_L sp, (MCONTEXT_GREGOFF + 29 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L fp, (MCONTEXT_GREGOFF + 30 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L ra, (MCONTEXT_GREGOFF + 31 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L t9, (MCONTEXT_GREGOFF + MCONTEXT_PC)(v0)
move v0, zero
jr t9
diff --git a/sysdeps/unix/sysv/linux/mips/swapcontext.S b/sysdeps/unix/sysv/linux/mips/swapcontext.S
index fde6e5e48a..ff63b3d9c8 100644
--- a/sysdeps/unix/sysv/linux/mips/swapcontext.S
+++ b/sysdeps/unix/sysv/linux/mips/swapcontext.S
@@ -47,6 +47,12 @@ A1OFF = FRAMESZ - (1 * SZREG) /* callee-allocated */
#else
A1OFF = FRAMESZ + (1 * SZREG) /* caller-allocated */
#endif
+MCONTEXT_GREGSZ = 8
+#if _MIPS_SIM == _ABIO32 && __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+MCONTEXT_GREGOFF = 4
+#else
+MCONTEXT_GREGOFF = 0
+#endif
NESTED (__swapcontext, FRAMESZ, ra)
.mask MASK, -(ARGSZ * SZREG)
@@ -83,23 +89,24 @@ NESTED (__swapcontext, FRAMESZ, ra)
/* Store a magic flag. */
li v1, 1
- REG_S v1, (0 * SZREG + MCONTEXT_GREGS)(a0) /* zero */
-
- REG_S s0, (16 * SZREG + MCONTEXT_GREGS)(a0)
- REG_S s1, (17 * SZREG + MCONTEXT_GREGS)(a0)
- REG_S s2, (18 * SZREG + MCONTEXT_GREGS)(a0)
- REG_S s3, (19 * SZREG + MCONTEXT_GREGS)(a0)
- REG_S s4, (20 * SZREG + MCONTEXT_GREGS)(a0)
- REG_S s5, (21 * SZREG + MCONTEXT_GREGS)(a0)
- REG_S s6, (22 * SZREG + MCONTEXT_GREGS)(a0)
- REG_S s7, (23 * SZREG + MCONTEXT_GREGS)(a0)
+ /* zero */
+ REG_S v1, (MCONTEXT_GREGOFF + 0 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+
+ REG_S s0, (MCONTEXT_GREGOFF + 16 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+ REG_S s1, (MCONTEXT_GREGOFF + 17 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+ REG_S s2, (MCONTEXT_GREGOFF + 18 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+ REG_S s3, (MCONTEXT_GREGOFF + 19 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+ REG_S s4, (MCONTEXT_GREGOFF + 20 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+ REG_S s5, (MCONTEXT_GREGOFF + 21 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+ REG_S s6, (MCONTEXT_GREGOFF + 22 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+ REG_S s7, (MCONTEXT_GREGOFF + 23 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
#if ! defined (__PIC__) || _MIPS_SIM != _ABIO32
- REG_S _GP, (28 * SZREG + MCONTEXT_GREGS)(a0)
+ REG_S _GP, (MCONTEXT_GREGOFF + 28 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
#endif
- REG_S _SP, (29 * SZREG + MCONTEXT_GREGS)(a0)
- REG_S fp, (30 * SZREG + MCONTEXT_GREGS)(a0)
- REG_S ra, (31 * SZREG + MCONTEXT_GREGS)(a0)
- REG_S ra, MCONTEXT_PC(a0)
+ REG_S _SP, (MCONTEXT_GREGOFF + 29 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+ REG_S fp, (MCONTEXT_GREGOFF + 30 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+ REG_S ra, (MCONTEXT_GREGOFF + 31 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+ REG_S ra, (MCONTEXT_GREGOFF + MCONTEXT_PC)(a0)
#ifdef __mips_hard_float
# if _MIPS_SIM == _ABI64
@@ -167,32 +174,32 @@ NESTED (__swapcontext, FRAMESZ, ra)
/* Note the contents of argument registers will be random
unless makecontext() has been called. */
- REG_L a0, (4 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L a1, (5 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L a2, (6 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L a3, (7 * SZREG + MCONTEXT_GREGS)(v0)
+ REG_L a0, (MCONTEXT_GREGOFF + 4 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L a1, (MCONTEXT_GREGOFF + 5 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L a2, (MCONTEXT_GREGOFF + 6 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L a3, (MCONTEXT_GREGOFF + 7 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
#if _MIPS_SIM != _ABIO32
- REG_L a4, (8 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L a5, (9 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L a6, (10 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L a7, (11 * SZREG + MCONTEXT_GREGS)(v0)
+ REG_L a4, (MCONTEXT_GREGOFF + 8 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L a5, (MCONTEXT_GREGOFF + 9 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L a6, (MCONTEXT_GREGOFF + 10 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L a7, (MCONTEXT_GREGOFF + 11 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
#endif
- REG_L s0, (16 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L s1, (17 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L s2, (18 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L s3, (19 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L s4, (20 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L s5, (21 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L s6, (22 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L s7, (23 * SZREG + MCONTEXT_GREGS)(v0)
+ REG_L s0, (MCONTEXT_GREGOFF + 16 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L s1, (MCONTEXT_GREGOFF + 17 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L s2, (MCONTEXT_GREGOFF + 18 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L s3, (MCONTEXT_GREGOFF + 19 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L s4, (MCONTEXT_GREGOFF + 20 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L s5, (MCONTEXT_GREGOFF + 21 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L s6, (MCONTEXT_GREGOFF + 22 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L s7, (MCONTEXT_GREGOFF + 23 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
#if ! defined (__PIC__) || _MIPS_SIM != _ABIO32
- REG_L gp, (28 * SZREG + MCONTEXT_GREGS)(v0)
+ REG_L gp, (MCONTEXT_GREGOFF + 28 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
#endif
- REG_L sp, (29 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L fp, (30 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L ra, (31 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L t9, MCONTEXT_PC(v0)
+ REG_L sp, (MCONTEXT_GREGOFF + 29 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L fp, (MCONTEXT_GREGOFF + 30 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L ra, (MCONTEXT_GREGOFF + 31 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L t9, (MCONTEXT_GREGOFF + MCONTEXT_PC)(v0)
move v0, zero
jr t9