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authorRogerio Alves <rcardoso@linux.ibm.com>2019-01-14 07:53:50 -0600
committerTulio Magno Quites Machado Filho <tuliom@linux.ibm.com>2019-01-15 16:26:28 -0200
commit56054664ccf837fa325692c0359baa62c64491a1 (patch)
tree2327c0e5a3ab18941f1dd7ce083775521caca4e2 /sysdeps
parent1a153e47fcc9401d8ea424ad86569a57ed0f8c52 (diff)
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powerpc: fix tst-ucontext-ppc64-vscr test for POWER 5/6.
An error "impossible register constraint in 'asm'" was raised on POWER 5 and due to __vector __int128_t being used as operands without passing the option -msvx to gcc. This patch replaces "__vector __int128_t" with "__vector unsigned int" which requires only -maltivec, available since POWER ISA 2.03, and which is already passed to the compiler. * sysdeps/powerpc/powerpc64/tst-ucontext-ppc64-vscr.c: (do_test): Changed __vector __int128_t to __vector unsigned int. Reviewed-by: Tulio Magno Quites Machado Filho <tuliom@linux.ibm.com>
Diffstat (limited to 'sysdeps')
-rw-r--r--sysdeps/powerpc/powerpc64/tst-ucontext-ppc64-vscr.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/sysdeps/powerpc/powerpc64/tst-ucontext-ppc64-vscr.c b/sysdeps/powerpc/powerpc64/tst-ucontext-ppc64-vscr.c
index 2dcf5bb634..dbe06c847b 100644
--- a/sysdeps/powerpc/powerpc64/tst-ucontext-ppc64-vscr.c
+++ b/sysdeps/powerpc/powerpc64/tst-ucontext-ppc64-vscr.c
@@ -44,8 +44,8 @@ do_test (void)
uint32_t* vscr_ptr = vscr;
uint32_t vscr_word;
ucontext_t ucp;
- __vector __int128_t v0 = {0};
- __vector __int128_t v1 = {0};
+ __vector unsigned int v0 = {0};
+ __vector unsigned int v1 = {0};
/* Set SAT bit in VSCR register. */
asm volatile (".machine push;\n"