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authorH.J. Lu <hjl.tools@gmail.com>2013-07-02 08:03:29 -0700
committerH.J. Lu <hjl.tools@gmail.com>2013-07-02 08:06:04 -0700
commit1c81621c5bbecb223c9d1262c05175608c47add5 (patch)
treebbfd0f4a2731c6ace22cb3d66887081845b8a342 /sysdeps
parent77f01ab5d1d2eead1bd4a9135d6a76ebd3fe21e5 (diff)
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Enable static 32-bit SSE4.2 strcasecmp/strncasecmp
Diffstat (limited to 'sysdeps')
-rw-r--r--sysdeps/i386/i686/multiarch/strcasecmp.S3
-rw-r--r--sysdeps/i386/i686/multiarch/strncase.S3
2 files changed, 0 insertions, 6 deletions
diff --git a/sysdeps/i386/i686/multiarch/strcasecmp.S b/sysdeps/i386/i686/multiarch/strcasecmp.S
index 3b38214c9b..2444af26c3 100644
--- a/sysdeps/i386/i686/multiarch/strcasecmp.S
+++ b/sysdeps/i386/i686/multiarch/strcasecmp.S
@@ -54,12 +54,9 @@ ENTRY(__strcasecmp)
testl $bit_SSSE3, CPUID_OFFSET+index_SSSE3+__cpu_features
jz 2f
leal __strcasecmp_ssse3, %eax
-#if 0
- // XXX Temporarily
testl $bit_SSE4_2, CPUID_OFFSET+index_SSE4_2+__cpu_features
jz 2f
leal __strcasecmp_sse4_2, %eax
-#endif
2: ret
END(__strcasecmp)
#endif
diff --git a/sysdeps/i386/i686/multiarch/strncase.S b/sysdeps/i386/i686/multiarch/strncase.S
index 51c6d721c9..939cd96ce0 100644
--- a/sysdeps/i386/i686/multiarch/strncase.S
+++ b/sysdeps/i386/i686/multiarch/strncase.S
@@ -54,12 +54,9 @@ ENTRY(__strncasecmp)
testl $bit_SSSE3, CPUID_OFFSET+index_SSSE3+__cpu_features
jz 2f
leal __strncasecmp_ssse3, %eax
-#if 0
- // XXX Temporarily
testl $bit_SSE4_2, CPUID_OFFSET+index_SSE4_2+__cpu_features
jz 2f
leal __strncasecmp_sse4_2, %eax
-#endif
2: ret
END(__strncasecmp)
#endif