Vector powf for x86_64 and tests.

Here is implementation of vectorized powf containing SSE, AVX,
AVX2 and AVX512 versions according to Vector ABI
<https://groups.google.com/forum/#!topic/x86-64-abi/LmppCfN1rZ4>.

    * sysdeps/unix/sysv/linux/x86_64/libmvec.abilist: New symbols added.
    * sysdeps/x86/fpu/bits/math-vector.h: Added SIMD declaration and asm
    redirections for powf.
    * sysdeps/x86_64/fpu/Makefile (libmvec-support): Added new files.
    * sysdeps/x86_64/fpu/Versions: New versions added.
    * sysdeps/x86_64/fpu/libm-test-ulps: Regenerated.
    * sysdeps/x86_64/fpu/multiarch/Makefile (libmvec-sysdep_routines):
    Added build of SSE, AVX2 and AVX512 IFUNC versions.
    * sysdeps/x86_64/fpu/svml_s_wrapper_impl.h: Added 2 argument wrappers.
    * sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core_avx512.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_powf4_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_powf4_core_sse4.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_powf8_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_powf8_core_avx2.S: New file.
    * sysdeps/x86_64/fpu/svml_s_powf16_core.S: New file.
    * sysdeps/x86_64/fpu/svml_s_powf4_core.S: New file.
    * sysdeps/x86_64/fpu/svml_s_powf8_core.S: New file.
    * sysdeps/x86_64/fpu/svml_s_powf8_core_avx.S: New file.
    * sysdeps/x86_64/fpu/svml_s_powf_data.S: New file.
    * sysdeps/x86_64/fpu/svml_s_powf_data.h: New file.
    * sysdeps/x86_64/fpu/test-float-vlen16-wrappers.c: Vector powf tests.
    * sysdeps/x86_64/fpu/test-float-vlen16.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen4-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen4.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8-avx2-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8-avx2.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8.c: Likewise.
    * math/test-float-vlen16.h: Fixed 2 argument macro.
    * math/test-float-vlen4.h: Likewise.
    * math/test-float-vlen8.h: Likewise.
    * NEWS: Mention addition of x86_64 vector powf.

25 files changed, 5586 insertions, 2 deletions

diff --git a/sysdeps/x86_64/fpu/Makefile b/sysdeps/x86_64/fpu/Makefile
index aa9bdea668..20b22f07bd 100644
--- a/sysdeps/x86_64/fpu/Makefile
+++ b/sysdeps/x86_64/fpu/Makefile
@@ -15,7 +15,8 @@ libmvec-support += svml_d_cos2_core svml_d_cos4_core_avx \
 		   svml_s_expf4_core svml_s_expf8_core_avx svml_s_expf8_core \
 		   svml_s_expf16_core svml_s_expf_data svml_d_pow2_core \
 		   svml_d_pow4_core_avx svml_d_pow4_core svml_d_pow8_core \
-		   svml_d_pow_data \
+		   svml_d_pow_data svml_s_powf4_core svml_s_powf8_core_avx \
+		   svml_s_powf8_core svml_s_powf16_core svml_s_powf_data \
 		   init-arch
 endif
 
diff --git a/sysdeps/x86_64/fpu/Versions b/sysdeps/x86_64/fpu/Versions
index e379c36125..1aa7937a30 100644
--- a/sysdeps/x86_64/fpu/Versions
+++ b/sysdeps/x86_64/fpu/Versions
@@ -9,5 +9,6 @@ libmvec {
     _ZGVbN4v_sinf; _ZGVcN8v_sinf; _ZGVdN8v_sinf; _ZGVeN16v_sinf;
     _ZGVbN4v_logf; _ZGVcN8v_logf; _ZGVdN8v_logf; _ZGVeN16v_logf;
     _ZGVbN4v_expf; _ZGVcN8v_expf; _ZGVdN8v_expf; _ZGVeN16v_expf;
+    _ZGVbN4vv_powf; _ZGVcN8vv_powf; _ZGVdN8vv_powf; _ZGVeN16vv_powf;
   }
 }
diff --git a/sysdeps/x86_64/fpu/libm-test-ulps b/sysdeps/x86_64/fpu/libm-test-ulps
index 718e84c3f9..e5ec939225 100644
--- a/sysdeps/x86_64/fpu/libm-test-ulps
+++ b/sysdeps/x86_64/fpu/libm-test-ulps
@@ -1947,17 +1947,25 @@ ifloat: 4
 ildouble: 2
 ldouble: 2
 
+Function: "pow_vlen16":
+float: 3
+
 Function: "pow_vlen2":
 double: 1
 
 Function: "pow_vlen4":
 double: 1
+float: 3
 
 Function: "pow_vlen4_avx2":
 double: 1
 
 Function: "pow_vlen8":
 double: 1
+float: 3
+
+Function: "pow_vlen8_avx2":
+float: 3
 
 Function: "sin":
 ildouble: 1
diff --git a/sysdeps/x86_64/fpu/multiarch/Makefile b/sysdeps/x86_64/fpu/multiarch/Makefile
index b03b1380c0..8f3c457888 100644
--- a/sysdeps/x86_64/fpu/multiarch/Makefile
+++ b/sysdeps/x86_64/fpu/multiarch/Makefile
@@ -66,5 +66,7 @@ libmvec-sysdep_routines += svml_d_cos2_core_sse4 svml_d_cos4_core_avx2 \
 			   svml_d_exp4_core_avx2 svml_d_exp8_core_avx512 \
 			   svml_s_expf4_core_sse4 svml_s_expf8_core_avx2 \
 			   svml_s_expf16_core_avx512 svml_d_pow2_core_sse4 \
-			   svml_d_pow4_core_avx2 svml_d_pow8_core_avx512
+			   svml_d_pow4_core_avx2 svml_d_pow8_core_avx512 \
+			   svml_s_powf4_core_sse4 svml_s_powf8_core_avx2 \
+			   svml_s_powf16_core_avx512
 endif
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core.S
new file mode 100644
index 0000000000..a4ba4fbc04
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core.S
@@ -0,0 +1,39 @@
+/* Multiple versions of vectorized powf.
+   Copyright (C) 2014-2015 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+#include <init-arch.h>
+
+	.text
+ENTRY (_ZGVeN16vv_powf)
+        .type   _ZGVeN16vv_powf, @gnu_indirect_function
+        cmpl    $0, KIND_OFFSET+__cpu_features(%rip)
+        jne     1
+        call    __init_cpu_features
+1:      leaq    _ZGVeN16vv_powf_skx(%rip), %rax
+        testl   $bit_AVX512DQ_Usable, __cpu_features+FEATURE_OFFSET+index_AVX512DQ_Usable(%rip)
+        jnz     3
+2:      leaq    _ZGVeN16vv_powf_knl(%rip), %rax
+        testl   $bit_AVX512F_Usable, __cpu_features+FEATURE_OFFSET+index_AVX512F_Usable(%rip)
+        jnz     3
+        leaq    _ZGVeN16vv_powf_avx2_wrapper(%rip), %rax
+3:      ret
+END (_ZGVeN16vv_powf)
+
+#define _ZGVeN16vv_powf _ZGVeN16vv_powf_avx2_wrapper
+#include "../svml_s_powf16_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core_avx512.S b/sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core_avx512.S
new file mode 100644
index 0000000000..4b61974cb6
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core_avx512.S
@@ -0,0 +1,653 @@
+/* Function powf vectorized with AVX-512. KNL and SKX versions.
+   Copyright (C) 2014-2015 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+#include "svml_s_powf_data.h"
+#include "svml_s_wrapper_impl.h"
+
+/*
+   ALGORITHM DESCRIPTION:
+
+     We are using the next identity : pow(x,y) = 2^(y * log2(x)).
+
+     1) log2(x) calculation
+        Here we use the following formula.
+        Let |x|=2^k1*X1, where k1 is integer, 1<=X1<2.
+        Let C ~= 1/ln(2),
+        Rcp1 ~= 1/X1,   X2=Rcp1*X1,
+        Rcp2 ~= 1/X2,   X3=Rcp2*X2,
+        Rcp3 ~= 1/X3,   Rcp3C ~= C/X3.
+        Then
+          log2|x| = k1 + log2(1/Rcp1) + log2(1/Rcp2) + log2(C/Rcp3C) +
+                    log2(X1*Rcp1*Rcp2*Rcp3C/C),
+        where X1*Rcp1*Rcp2*Rcp3C = C*(1+q), q is very small.
+
+        The values of Rcp1, log2(1/Rcp1), Rcp2, log2(1/Rcp2),
+        Rcp3C, log2(C/Rcp3C) are taken from tables.
+        Values of Rcp1, Rcp2, Rcp3C are such that RcpC=Rcp1*Rcp2*Rcp3C
+        is exactly represented in target precision.
+
+        log2(X1*Rcp1*Rcp2*Rcp3C/C) = log2(1+q) = ln(1+q)/ln2 =
+             = 1/(ln2)*q - 1/(2ln2)*q^2 + 1/(3ln2)*q^3 - ... =
+             = 1/(C*ln2)*cq - 1/(2*C^2*ln2)*cq^2 + 1/(3*C^3*ln2)*cq^3 - ... =
+             = (1 + a1)*cq + a2*cq^2 + a3*cq^3 + ...,
+        where
+             cq=X1*Rcp1*Rcp2*Rcp3C-C,
+             a1=1/(C*ln(2))-1 is small,
+             a2=1/(2*C^2*ln2),
+             a3=1/(3*C^3*ln2),
+                  ...
+        Log2 result is split by three parts: HH+HL+HLL
+
+     2) Calculation of y*log2(x)
+        Split y into YHi+YLo.
+        Get high PH and medium PL parts of y*log2|x|.
+        Get low PLL part of y*log2|x|.
+        Now we have PH+PL+PLL ~= y*log2|x|.
+
+     3) Calculation of 2^(y*log2(x))
+        Let's represent PH+PL+PLL in the form N + j/2^expK + Z,
+        where expK=7 in this implementation, N and j are integers,
+        0<=j<=2^expK-1, |Z|<2^(-expK-1). Hence
+        2^(PH+PL+PLL) ~= 2^N * 2^(j/2^expK) * 2^Z,
+        where 2^(j/2^expK) is stored in a table, and
+        2^Z ~= 1 + B1*Z + B2*Z^2 ... + B5*Z^5.
+        We compute 2^(PH+PL+PLL) as follows:
+        Break PH into PHH + PHL, where PHH = N + j/2^expK.
+        Z = PHL + PL + PLL
+        Exp2Poly = B1*Z + B2*Z^2 ... + B5*Z^5
+        Get 2^(j/2^expK) from table in the form THI+TLO.
+        Now we have 2^(PH+PL+PLL) ~= 2^N * (THI + TLO) * (1 + Exp2Poly).
+        Get significand of 2^(PH+PL+PLL) in the form ResHi+ResLo:
+        ResHi := THI
+        ResLo := THI * Exp2Poly + TLO
+        Get exponent ERes of the result:
+        Res := ResHi + ResLo:
+        Result := ex(Res) + N.  */
+
+	.text
+ENTRY (_ZGVeN16vv_powf_knl)
+#ifndef HAVE_AVX512_ASM_SUPPORT
+WRAPPER_IMPL_AVX512_ff _ZGVdN8vv_powf
+#else
+        pushq     %rbp
+        cfi_adjust_cfa_offset (8)
+        cfi_rel_offset (%rbp, 0)
+        movq      %rsp, %rbp
+        cfi_def_cfa_register (%rbp)
+        andq      $-64, %rsp
+        subq      $1344, %rsp
+        movq      __svml_spow_data@GOTPCREL(%rip), %rdx
+        vmovaps   %zmm1, %zmm9
+        vshuff32x4 $238, %zmm0, %zmm0, %zmm7
+        kxnorw    %k3, %k3, %k3
+        vcvtps2pd %ymm0, %zmm14
+        vcvtps2pd %ymm7, %zmm10
+        movl      $-1, %eax
+        movq      $-1, %rcx
+        vpandd    _ABSMASK(%rdx), %zmm9, %zmm4
+        vmovups   _ExpMask(%rdx), %zmm6
+
+/* exponent bits selection */
+        vpsrlq    $20, %zmm14, %zmm13
+        vshuff32x4 $238, %zmm9, %zmm9, %zmm8
+        vpcmpd    $5, _INF(%rdx), %zmm4, %k2
+        vpsrlq    $32, %zmm13, %zmm15
+        vcvtps2pd %ymm8, %zmm2
+        vmovups   _Two10(%rdx), %zmm4
+        vpmovqd   %zmm15, %ymm12
+        vcvtps2pd %ymm9, %zmm1
+        vpsubd    _NMINNORM(%rdx), %zmm0, %zmm3
+        vpbroadcastd %eax, %zmm8{%k2}{z}
+        vpcmpd    $5, _NMAXVAL(%rdx), %zmm3, %k1
+
+/* preserve mantissa, set input exponent to 2^(-10) */
+        vmovaps   %zmm6, %zmm3
+        vpternlogq $248, %zmm6, %zmm10, %zmm4
+        vpsrlq    $20, %zmm10, %zmm10
+        vpternlogq $234, _Two10(%rdx), %zmm14, %zmm3
+
+/* reciprocal approximation good to at least 11 bits */
+        vrcp28pd  %zmm4, %zmm11
+        vpsrlq    $32, %zmm10, %zmm14
+        vpbroadcastd %eax, %zmm7{%k1}{z}
+        kxnorw    %k1, %k1, %k1
+        vrcp28pd  %zmm3, %zmm5
+        vpmovqd   %zmm14, %ymm6
+        vshufi32x4 $68, %zmm6, %zmm12, %zmm13
+        vmovups   _One(%rdx), %zmm6
+
+/* round reciprocal to nearest integer, will have 1+9 mantissa bits */
+        vrndscalepd $8, %zmm5, %zmm14
+
+/* biased exponent in DP format */
+        vshuff32x4 $238, %zmm13, %zmm13, %zmm5
+        vrndscalepd $8, %zmm11, %zmm11
+        vcmppd    $30, _Threshold(%rdx), %zmm14, %k2
+        vcvtdq2pd %ymm13, %zmm10
+        vcvtdq2pd %ymm5, %zmm15
+
+/* table lookup */
+        vpsrlq    $40, %zmm14, %zmm13
+        vpxord    %zmm5, %zmm5, %zmm5
+        vgatherqpd _Log2Rcp_lookup(%rdx,%zmm13), %zmm5{%k3}
+        vfmsub213pd %zmm6, %zmm14, %zmm3
+        vfmsub213pd %zmm6, %zmm11, %zmm4
+        vcmppd    $30, _Threshold(%rdx), %zmm11, %k3
+        vpbroadcastq %rcx, %zmm14{%k2}{z}
+
+/* dpP= _dbT+lJ*T_ITEM_GRAN */
+        kxnorw    %k2, %k2, %k2
+        vpsrlq    $40, %zmm11, %zmm12
+        vpxord    %zmm6, %zmm6, %zmm6
+        vpbroadcastq %rcx, %zmm11{%k3}{z}
+        kxnorw    %k3, %k3, %k3
+        vgatherqpd _Log2Rcp_lookup(%rdx,%zmm12), %zmm6{%k1}
+        vmovups   _Bias1(%rdx), %zmm12
+        vpternlogq $236, _Bias(%rdx), %zmm12, %zmm14
+        vpternlogq $248, _Bias(%rdx), %zmm11, %zmm12
+        vsubpd    %zmm14, %zmm10, %zmm13
+        vsubpd    %zmm12, %zmm15, %zmm10
+        vmovups   _poly_coeff_3(%rdx), %zmm11
+        vmovups   _poly_coeff_4(%rdx), %zmm15
+        vfmadd213pd %zmm15, %zmm4, %zmm11
+        vmulpd    %zmm4, %zmm4, %zmm12
+        vmovaps   %zmm15, %zmm14
+        vmulpd    %zmm3, %zmm3, %zmm15
+        vfmadd231pd _poly_coeff_3(%rdx), %zmm3, %zmm14
+
+/* reconstruction */
+        vfmadd213pd %zmm4, %zmm12, %zmm11
+        vfmadd213pd %zmm3, %zmm15, %zmm14
+        vaddpd    %zmm6, %zmm11, %zmm11
+        vaddpd    %zmm5, %zmm14, %zmm3
+        vfmadd231pd _L2(%rdx), %zmm10, %zmm11
+        vfmadd132pd _L2(%rdx), %zmm3, %zmm13
+        vmulpd    %zmm2, %zmm11, %zmm12
+        vmulpd    %zmm1, %zmm13, %zmm10
+        vmulpd    __dbInvLn2(%rdx), %zmm12, %zmm6
+
+/* hi bits */
+        vpsrlq    $32, %zmm12, %zmm12
+        vmulpd    __dbInvLn2(%rdx), %zmm10, %zmm1
+
+/* to round down; if dR is an integer we will get R = 1, which is ok */
+        vsubpd    __dbHALF(%rdx), %zmm6, %zmm4
+        vpsrlq    $32, %zmm10, %zmm11
+        vpmovqd   %zmm11, %ymm3
+        vsubpd    __dbHALF(%rdx), %zmm1, %zmm2
+        vaddpd    __dbShifter(%rdx), %zmm4, %zmm14
+        vpmovqd   %zmm12, %ymm4
+        vshufi32x4 $68, %zmm4, %zmm3, %zmm5
+        vpxord    %zmm4, %zmm4, %zmm4
+        vaddpd    __dbShifter(%rdx), %zmm2, %zmm2
+
+/* iAbsX = iAbsX&iAbsMask; */
+        vpandd    __iAbsMask(%rdx), %zmm5, %zmm11
+        vpxord    %zmm5, %zmm5, %zmm5
+        vsubpd    __dbShifter(%rdx), %zmm14, %zmm13
+
+/* iRangeMask = (iAbsX>iDomainRange) */
+        vpcmpgtd     __iDomainRange(%rdx), %zmm11, %k1
+        vsubpd       __dbShifter(%rdx), %zmm2, %zmm15
+        vpbroadcastd %eax, %zmm10{%k1}{z}
+        vpternlogd   $254, %zmm8, %zmm7, %zmm10
+
+/* [0..1) */
+        vsubpd    %zmm15, %zmm1, %zmm1
+
+/* low K bits */
+        vpandq    __lbLOWKBITS(%rdx), %zmm14, %zmm11
+        vgatherqpd 13952(%rdx,%zmm11,8), %zmm5{%k3}
+        vsubpd    %zmm13, %zmm6, %zmm7
+        vptestmd  %zmm10, %zmm10, %k0
+        vpandq    __lbLOWKBITS(%rdx), %zmm2, %zmm10
+        vmulpd    __dbC1(%rdx), %zmm1, %zmm1
+        vmulpd    __dbC1(%rdx), %zmm7, %zmm3
+        vpsrlq    $11, %zmm2, %zmm8
+        vpsrlq    $11, %zmm14, %zmm2
+
+/* NB : including +/- sign for the exponent!! */
+        vpsllq    $52, %zmm8, %zmm8
+        kmovw     %k0, %ecx
+        vpsllq    $52, %zmm2, %zmm6
+        vfmadd213pd %zmm5, %zmm3, %zmm5
+        vgatherqpd 13952(%rdx,%zmm10,8), %zmm4{%k2}
+        vfmadd213pd %zmm4, %zmm1, %zmm4
+        vpaddq    %zmm6, %zmm5, %zmm10
+        vcvtpd2ps %zmm10, %ymm12
+        vpaddq    %zmm8, %zmm4, %zmm7
+        vcvtpd2ps %zmm7, %ymm11
+        vshuff32x4 $68, %zmm12, %zmm11, %zmm1
+        testl     %ecx, %ecx
+        jne       .LBL_1_3
+
+.LBL_1_2:
+        cfi_remember_state
+        vmovaps   %zmm1, %zmm0
+        movq      %rbp, %rsp
+        cfi_def_cfa_register (%rsp)
+        popq      %rbp
+        cfi_adjust_cfa_offset (-8)
+        cfi_restore (%rbp)
+        ret
+
+.LBL_1_3:
+        cfi_restore_state
+        vmovups   %zmm0, 1152(%rsp)
+        vmovups   %zmm9, 1216(%rsp)
+        vmovups   %zmm1, 1280(%rsp)
+        je        .LBL_1_2
+
+        xorb      %dl, %dl
+        kmovw     %k4, 1048(%rsp)
+        xorl      %eax, %eax
+        kmovw     %k5, 1040(%rsp)
+        kmovw     %k6, 1032(%rsp)
+        kmovw     %k7, 1024(%rsp)
+        vmovups   %zmm16, 960(%rsp)
+        vmovups   %zmm17, 896(%rsp)
+        vmovups   %zmm18, 832(%rsp)
+        vmovups   %zmm19, 768(%rsp)
+        vmovups   %zmm20, 704(%rsp)
+        vmovups   %zmm21, 640(%rsp)
+        vmovups   %zmm22, 576(%rsp)
+        vmovups   %zmm23, 512(%rsp)
+        vmovups   %zmm24, 448(%rsp)
+        vmovups   %zmm25, 384(%rsp)
+        vmovups   %zmm26, 320(%rsp)
+        vmovups   %zmm27, 256(%rsp)
+        vmovups   %zmm28, 192(%rsp)
+        vmovups   %zmm29, 128(%rsp)
+        vmovups   %zmm30, 64(%rsp)
+        vmovups   %zmm31, (%rsp)
+        movq      %rsi, 1064(%rsp)
+        movq      %rdi, 1056(%rsp)
+        movq      %r12, 1096(%rsp)
+        cfi_offset_rel_rsp (12, 1096)
+        movb      %dl, %r12b
+        movq      %r13, 1088(%rsp)
+        cfi_offset_rel_rsp (13, 1088)
+        movl      %ecx, %r13d
+        movq      %r14, 1080(%rsp)
+        cfi_offset_rel_rsp (14, 1080)
+        movl      %eax, %r14d
+        movq      %r15, 1072(%rsp)
+        cfi_offset_rel_rsp (15, 1072)
+        cfi_remember_state
+
+.LBL_1_6:
+        btl       %r14d, %r13d
+        jc        .LBL_1_12
+
+.LBL_1_7:
+        lea       1(%r14), %esi
+        btl       %esi, %r13d
+        jc        .LBL_1_10
+
+.LBL_1_8:
+        addb      $1, %r12b
+        addl      $2, %r14d
+        cmpb      $16, %r12b
+        jb        .LBL_1_6
+
+        kmovw     1048(%rsp), %k4
+        movq      1064(%rsp), %rsi
+        kmovw     1040(%rsp), %k5
+        movq      1056(%rsp), %rdi
+        kmovw     1032(%rsp), %k6
+        movq      1096(%rsp), %r12
+        cfi_restore (%r12)
+        movq      1088(%rsp), %r13
+        cfi_restore (%r13)
+        kmovw     1024(%rsp), %k7
+        vmovups   960(%rsp), %zmm16
+        vmovups   896(%rsp), %zmm17
+        vmovups   832(%rsp), %zmm18
+        vmovups   768(%rsp), %zmm19
+        vmovups   704(%rsp), %zmm20
+        vmovups   640(%rsp), %zmm21
+        vmovups   576(%rsp), %zmm22
+        vmovups   512(%rsp), %zmm23
+        vmovups   448(%rsp), %zmm24
+        vmovups   384(%rsp), %zmm25
+        vmovups   320(%rsp), %zmm26
+        vmovups   256(%rsp), %zmm27
+        vmovups   192(%rsp), %zmm28
+        vmovups   128(%rsp), %zmm29
+        vmovups   64(%rsp), %zmm30
+        vmovups   (%rsp), %zmm31
+        movq      1080(%rsp), %r14
+        cfi_restore (%r14)
+        movq      1072(%rsp), %r15
+        cfi_restore (%r15)
+        vmovups   1280(%rsp), %zmm1
+        jmp       .LBL_1_2
+
+.LBL_1_10:
+        cfi_restore_state
+        movzbl    %r12b, %r15d
+        vmovss    1156(%rsp,%r15,8), %xmm0
+        vmovss    1220(%rsp,%r15,8), %xmm1
+        call      powf@PLT
+        vmovss    %xmm0, 1284(%rsp,%r15,8)
+        jmp       .LBL_1_8
+
+.LBL_1_12:
+        movzbl    %r12b, %r15d
+        vmovss    1152(%rsp,%r15,8), %xmm0
+        vmovss    1216(%rsp,%r15,8), %xmm1
+        call      powf@PLT
+        vmovss    %xmm0, 1280(%rsp,%r15,8)
+        jmp       .LBL_1_7
+#endif
+END (_ZGVeN16vv_powf_knl)
+
+ENTRY (_ZGVeN16vv_powf_skx)
+#ifndef HAVE_AVX512_ASM_SUPPORT
+WRAPPER_IMPL_AVX512_ff _ZGVdN8vv_powf
+#else
+        pushq     %rbp
+        cfi_adjust_cfa_offset (8)
+        cfi_rel_offset (%rbp, 0)
+        movq      %rsp, %rbp
+        cfi_def_cfa_register (%rbp)
+        andq      $-64, %rsp
+        subq      $1344, %rsp
+        movq      __svml_spow_data@GOTPCREL(%rip), %rax
+        vextractf32x8 $1, %zmm1, %ymm14
+        vextractf32x8 $1, %zmm0, %ymm15
+        vpsubd _NMINNORM(%rax), %zmm0, %zmm9
+        vmovups   %zmm26, 1280(%rsp)
+        vmovups _ExpMask(%rax), %zmm6
+        vpcmpd    $1, _NMAXVAL(%rax), %zmm9, %k1
+        vcvtps2pd %ymm0, %zmm5
+        vcvtps2pd %ymm1, %zmm12
+        kxnorw    %k3, %k3, %k3
+
+/* exponent bits selection */
+        vpsrlq    $20, %zmm5, %zmm3
+        vpsrlq    $32, %zmm3, %zmm2
+        vpmovqd   %zmm2, %ymm11
+        vcvtps2pd %ymm14, %zmm13
+        vmovups   .L_2il0floatpacket.23(%rip), %zmm14
+        vmovaps   %zmm14, %zmm26
+        vpandd _ABSMASK(%rax), %zmm1, %zmm8
+        vpcmpd    $1, _INF(%rax), %zmm8, %k2
+        vpandnd   %zmm9, %zmm9, %zmm26{%k1}
+        vmovups _Two10(%rax), %zmm9
+        kxnorw    %k1, %k1, %k1
+        vcvtps2pd %ymm15, %zmm4
+        vmovaps   %zmm14, %zmm15
+
+/* preserve mantissa, set input exponent to 2^(-10) */
+        vpternlogq $248, %zmm6, %zmm4, %zmm9
+        vpsrlq    $20, %zmm4, %zmm4
+
+/* reciprocal approximation good to at least 11 bits */
+        vrcp14pd  %zmm9, %zmm10
+
+/* round reciprocal to nearest integer, will have 1+9 mantissa bits */
+        vrndscalepd $8, %zmm10, %zmm3
+        vmovups _One(%rax), %zmm10
+        vfmsub213pd %zmm10, %zmm3, %zmm9
+        vpandnd   %zmm8, %zmm8, %zmm15{%k2}
+        vmovaps   %zmm6, %zmm8
+        vpternlogq $234, _Two10(%rax), %zmm5, %zmm8
+        vpsrlq    $32, %zmm4, %zmm5
+        vrcp14pd  %zmm8, %zmm7
+        vpmovqd   %zmm5, %ymm6
+        vrndscalepd $8, %zmm7, %zmm2
+        vfmsub213pd %zmm10, %zmm2, %zmm8
+
+/* table lookup */
+        vpsrlq    $40, %zmm2, %zmm10
+        vinserti32x8 $1, %ymm6, %zmm11, %zmm4
+        vpsrlq    $40, %zmm3, %zmm11
+
+/* biased exponent in DP format */
+        vextracti32x8 $1, %zmm4, %ymm7
+        vcvtdq2pd %ymm4, %zmm6
+        vpmovqd   %zmm10, %ymm4
+        vpmovqd   %zmm11, %ymm5
+        vpxord    %zmm10, %zmm10, %zmm10
+        vgatherdpd _Log2Rcp_lookup(%rax,%ymm4), %zmm10{%k3}
+        vpbroadcastq .L_2il0floatpacket.24(%rip), %zmm4
+        vpxord    %zmm11, %zmm11, %zmm11
+        vcvtdq2pd %ymm7, %zmm7
+        vgatherdpd _Log2Rcp_lookup(%rax,%ymm5), %zmm11{%k1}
+        vmovups _Threshold(%rax), %zmm5
+        vcmppd    $21, %zmm2, %zmm5, %k2
+        vcmppd    $21, %zmm3, %zmm5, %k3
+        vmovups _Bias1(%rax), %zmm3
+        vmovaps   %zmm4, %zmm2
+        vpandnq   %zmm5, %zmm5, %zmm2{%k2}
+        vpternlogq $236, _Bias(%rax), %zmm3, %zmm2
+
+/* dpP= _dbT+lJ*T_ITEM_GRAN */
+        kxnorw    %k2, %k2, %k2
+        vpandnq   %zmm5, %zmm5, %zmm4{%k3}
+        vpternlogq $248, _Bias(%rax), %zmm4, %zmm3
+        vsubpd    %zmm2, %zmm6, %zmm4
+        vmovups _poly_coeff_3(%rax), %zmm6
+        vmovups _poly_coeff_4(%rax), %zmm2
+        vsubpd    %zmm3, %zmm7, %zmm5
+        vmulpd    %zmm8, %zmm8, %zmm7
+        vfmadd213pd %zmm2, %zmm9, %zmm6
+        kxnorw    %k3, %k3, %k3
+        vmovaps   %zmm2, %zmm3
+        vmulpd    %zmm9, %zmm9, %zmm2
+        vfmadd231pd _poly_coeff_3(%rax), %zmm8, %zmm3
+
+/* reconstruction */
+        vfmadd213pd %zmm9, %zmm2, %zmm6
+        vfmadd213pd %zmm8, %zmm7, %zmm3
+        vaddpd    %zmm11, %zmm6, %zmm8
+        vaddpd    %zmm10, %zmm3, %zmm9
+        vfmadd231pd _L2(%rax), %zmm5, %zmm8
+        vfmadd132pd _L2(%rax), %zmm9, %zmm4
+        vmulpd    %zmm13, %zmm8, %zmm13
+        vmulpd    %zmm12, %zmm4, %zmm3
+        vmulpd __dbInvLn2(%rax), %zmm13, %zmm10
+        vmulpd __dbInvLn2(%rax), %zmm3, %zmm8
+
+/* hi bits */
+        vpsrlq    $32, %zmm3, %zmm4
+        vpsrlq    $32, %zmm13, %zmm13
+
+/* to round down; if dR is an integer we will get R = 1, which is ok */
+        vsubpd __dbHALF(%rax), %zmm8, %zmm12
+        vpmovqd   %zmm4, %ymm5
+        vpmovqd   %zmm13, %ymm2
+        vsubpd __dbHALF(%rax), %zmm10, %zmm9
+        vaddpd __dbShifter(%rax), %zmm12, %zmm7
+        vaddpd __dbShifter(%rax), %zmm9, %zmm9
+        vsubpd __dbShifter(%rax), %zmm7, %zmm11
+        vsubpd __dbShifter(%rax), %zmm9, %zmm12
+        vinserti32x8 $1, %ymm2, %zmm5, %zmm3
+
+/* iAbsX = iAbsX&iAbsMask */
+        vpandd __iAbsMask(%rax), %zmm3, %zmm4
+
+/* iRangeMask = (iAbsX>iDomainRange) */
+        vpcmpd    $2, __iDomainRange(%rax), %zmm4, %k1
+        vpandnd   %zmm4, %zmm4, %zmm14{%k1}
+        vpternlogd $254, %zmm15, %zmm26, %zmm14
+
+/* [0..1) */
+        vsubpd    %zmm11, %zmm8, %zmm15
+        vsubpd    %zmm12, %zmm10, %zmm26
+        vptestmd  %zmm14, %zmm14, %k0
+        vpsrlq    $11, %zmm7, %zmm8
+        vpsrlq    $11, %zmm9, %zmm10
+        vmulpd __dbC1(%rax), %zmm26, %zmm26
+        vmulpd __dbC1(%rax), %zmm15, %zmm15
+
+/* NB : including +/- sign for the exponent!! */
+        vpsllq    $52, %zmm10, %zmm13
+        vpsllq    $52, %zmm8, %zmm12
+        kmovw     %k0, %ecx
+
+/* low K bits */
+        vpandq __lbLOWKBITS(%rax), %zmm9, %zmm14
+        vpandq __lbLOWKBITS(%rax), %zmm7, %zmm6
+        vpmovqd   %zmm14, %ymm7
+        vpmovqd   %zmm6, %ymm9
+        vpxord    %zmm2, %zmm2, %zmm2
+        vgatherdpd 13952(%rax,%ymm7,8), %zmm2{%k3}
+        vfmadd213pd %zmm2, %zmm26, %zmm2
+        vpaddq    %zmm13, %zmm2, %zmm2
+        vcvtpd2ps %zmm2, %ymm4
+        vpxord    %zmm11, %zmm11, %zmm11
+        vgatherdpd 13952(%rax,%ymm9,8), %zmm11{%k2}
+        vfmadd213pd %zmm11, %zmm15, %zmm11
+        vpaddq    %zmm12, %zmm11, %zmm3
+        vcvtpd2ps %zmm3, %ymm5
+        vinsertf32x8 $1, %ymm4, %zmm5, %zmm2
+        testl     %ecx, %ecx
+        jne       .LBL_2_3
+
+.LBL_2_2:
+        cfi_remember_state
+        vmovups   1280(%rsp), %zmm26
+        vmovaps   %zmm2, %zmm0
+        movq      %rbp, %rsp
+        cfi_def_cfa_register (%rsp)
+        popq      %rbp
+        cfi_adjust_cfa_offset (-8)
+        cfi_restore (%rbp)
+        ret
+
+.LBL_2_3:
+        cfi_restore_state
+        vmovups   %zmm0, 1088(%rsp)
+        vmovups   %zmm1, 1152(%rsp)
+        vmovups   %zmm2, 1216(%rsp)
+        je        .LBL_2_2
+
+        xorb      %dl, %dl
+        xorl      %eax, %eax
+        kmovw     %k4, 984(%rsp)
+        kmovw     %k5, 976(%rsp)
+        kmovw     %k6, 968(%rsp)
+        kmovw     %k7, 960(%rsp)
+        vmovups   %zmm16, 896(%rsp)
+        vmovups   %zmm17, 832(%rsp)
+        vmovups   %zmm18, 768(%rsp)
+        vmovups   %zmm19, 704(%rsp)
+        vmovups   %zmm20, 640(%rsp)
+        vmovups   %zmm21, 576(%rsp)
+        vmovups   %zmm22, 512(%rsp)
+        vmovups   %zmm23, 448(%rsp)
+        vmovups   %zmm24, 384(%rsp)
+        vmovups   %zmm25, 320(%rsp)
+        vmovups   %zmm27, 256(%rsp)
+        vmovups   %zmm28, 192(%rsp)
+        vmovups   %zmm29, 128(%rsp)
+        vmovups   %zmm30, 64(%rsp)
+        vmovups   %zmm31, (%rsp)
+        movq      %rsi, 1000(%rsp)
+        movq      %rdi, 992(%rsp)
+        movq      %r12, 1032(%rsp)
+        cfi_offset_rel_rsp (12, 1032)
+        movb      %dl, %r12b
+        movq      %r13, 1024(%rsp)
+        cfi_offset_rel_rsp (13, 1024)
+        movl      %ecx, %r13d
+        movq      %r14, 1016(%rsp)
+        cfi_offset_rel_rsp (14, 1016)
+        movl      %eax, %r14d
+        movq      %r15, 1008(%rsp)
+        cfi_offset_rel_rsp (15, 1008)
+        cfi_remember_state
+
+.LBL_2_6:
+        btl       %r14d, %r13d
+        jc        .LBL_2_12
+
+.LBL_2_7:
+        lea       1(%r14), %esi
+        btl       %esi, %r13d
+        jc        .LBL_2_10
+
+.LBL_2_8:
+        incb      %r12b
+        addl      $2, %r14d
+        cmpb      $16, %r12b
+        jb        .LBL_2_6
+
+        kmovw     984(%rsp), %k4
+        kmovw     976(%rsp), %k5
+        kmovw     968(%rsp), %k6
+        kmovw     960(%rsp), %k7
+        vmovups   896(%rsp), %zmm16
+        vmovups   832(%rsp), %zmm17
+        vmovups   768(%rsp), %zmm18
+        vmovups   704(%rsp), %zmm19
+        vmovups   640(%rsp), %zmm20
+        vmovups   576(%rsp), %zmm21
+        vmovups   512(%rsp), %zmm22
+        vmovups   448(%rsp), %zmm23
+        vmovups   384(%rsp), %zmm24
+        vmovups   320(%rsp), %zmm25
+        vmovups   256(%rsp), %zmm27
+        vmovups   192(%rsp), %zmm28
+        vmovups   128(%rsp), %zmm29
+        vmovups   64(%rsp), %zmm30
+        vmovups   (%rsp), %zmm31
+        vmovups   1216(%rsp), %zmm2
+        movq      1000(%rsp), %rsi
+        movq      992(%rsp), %rdi
+        movq      1032(%rsp), %r12
+        cfi_restore (%r12)
+        movq      1024(%rsp), %r13
+        cfi_restore (%r13)
+        movq      1016(%rsp), %r14
+        cfi_restore (%r14)
+        movq      1008(%rsp), %r15
+        cfi_restore (%r15)
+        jmp       .LBL_2_2
+
+.LBL_2_10:
+        cfi_restore_state
+        movzbl    %r12b, %r15d
+        vmovss    1156(%rsp,%r15,8), %xmm1
+        vzeroupper
+        vmovss    1092(%rsp,%r15,8), %xmm0
+        call      powf@PLT
+        vmovss    %xmm0, 1220(%rsp,%r15,8)
+        jmp       .LBL_2_8
+
+.LBL_2_12:
+        movzbl    %r12b, %r15d
+        vmovss    1152(%rsp,%r15,8), %xmm1
+        vzeroupper
+        vmovss    1088(%rsp,%r15,8), %xmm0
+        call      powf@PLT
+        vmovss    %xmm0, 1216(%rsp,%r15,8)
+        jmp       .LBL_2_7
+#endif
+END (_ZGVeN16vv_powf_skx)
+
+	.section .rodata, "a"
+.L_2il0floatpacket.23:
+	.long	0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff
+	.type	.L_2il0floatpacket.23,@object
+.L_2il0floatpacket.24:
+	.long	0xffffffff,0xffffffff
+	.type	.L_2il0floatpacket.24,@object
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_powf4_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_powf4_core.S
new file mode 100644
index 0000000000..f88b9ca6d4
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_powf4_core.S
@@ -0,0 +1,38 @@
+/* Multiple versions of vectorized powf.
+   Copyright (C) 2014-2015 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+#include <init-arch.h>
+
+	.text
+ENTRY (_ZGVbN4vv_powf)
+        .type   _ZGVbN4vv_powf, @gnu_indirect_function
+        cmpl    $0, KIND_OFFSET+__cpu_features(%rip)
+        jne     1f
+        call    __init_cpu_features
+1:      leaq    _ZGVbN4vv_powf_sse4(%rip), %rax
+        testl   $bit_SSE4_1, __cpu_features+CPUID_OFFSET+index_SSE4_1(%rip)
+        jz      2f
+        ret
+2:      leaq    _ZGVbN4vv_powf_sse2(%rip), %rax
+        ret
+END (_ZGVbN4vv_powf)
+libmvec_hidden_def (_ZGVbN4vv_powf)
+
+#define _ZGVbN4vv_powf _ZGVbN4vv_powf_sse2
+#include "../svml_s_powf4_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_powf4_core_sse4.S b/sysdeps/x86_64/fpu/multiarch/svml_s_powf4_core_sse4.S
new file mode 100644
index 0000000000..6068f51c46
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_powf4_core_sse4.S
@@ -0,0 +1,374 @@
+/* Function powf vectorized with SSE4.
+   Copyright (C) 2014-2015 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+#include "svml_s_powf_data.h"
+
+	.text
+ENTRY (_ZGVbN4vv_powf_sse4)
+/*
+   ALGORITHM DESCRIPTION:
+
+     We are using the next identity: pow(x,y) = 2^(y * log2(x)).
+
+     1) log2(x) calculation
+        Here we use the following formula.
+        Let |x|=2^k1*X1, where k1 is integer, 1<=X1<2.
+        Let C ~= 1/ln(2),
+        Rcp1 ~= 1/X1,   X2=Rcp1*X1,
+        Rcp2 ~= 1/X2,   X3=Rcp2*X2,
+        Rcp3 ~= 1/X3,   Rcp3C ~= C/X3.
+        Then
+          log2|x| = k1 + log2(1/Rcp1) + log2(1/Rcp2) + log2(C/Rcp3C) +
+                    log2(X1*Rcp1*Rcp2*Rcp3C/C),
+        where X1*Rcp1*Rcp2*Rcp3C = C*(1+q), q is very small.
+
+        The values of Rcp1, log2(1/Rcp1), Rcp2, log2(1/Rcp2),
+        Rcp3C, log2(C/Rcp3C) are taken from tables.
+        Values of Rcp1, Rcp2, Rcp3C are such that RcpC=Rcp1*Rcp2*Rcp3C
+        is exactly represented in target precision.
+
+        log2(X1*Rcp1*Rcp2*Rcp3C/C) = log2(1+q) = ln(1+q)/ln2 =
+             = 1/(ln2)*q - 1/(2ln2)*q^2 + 1/(3ln2)*q^3 - ... =
+             = 1/(C*ln2)*cq - 1/(2*C^2*ln2)*cq^2 + 1/(3*C^3*ln2)*cq^3 - ... =
+             = (1 + a1)*cq + a2*cq^2 + a3*cq^3 + ...,
+        where
+             cq=X1*Rcp1*Rcp2*Rcp3C-C,
+             a1=1/(C*ln(2))-1 is small,
+             a2=1/(2*C^2*ln2),
+             a3=1/(3*C^3*ln2),
+                  ...
+        Log2 result is split by three parts: HH+HL+HLL
+
+     2) Calculation of y*log2(x)
+        Split y into YHi+YLo.
+        Get high PH and medium PL parts of y*log2|x|.
+        Get low PLL part of y*log2|x|.
+        Now we have PH+PL+PLL ~= y*log2|x|.
+
+     3) Calculation of 2^(y*log2(x))
+        Let's represent PH+PL+PLL in the form N + j/2^expK + Z,
+        where expK=7 in this implementation, N and j are integers,
+        0<=j<=2^expK-1, |Z|<2^(-expK-1). Hence
+        2^(PH+PL+PLL) ~= 2^N * 2^(j/2^expK) * 2^Z,
+        where 2^(j/2^expK) is stored in a table, and
+        2^Z ~= 1 + B1*Z + B2*Z^2 ... + B5*Z^5.
+        We compute 2^(PH+PL+PLL) as follows:
+        Break PH into PHH + PHL, where PHH = N + j/2^expK.
+        Z = PHL + PL + PLL
+        Exp2Poly = B1*Z + B2*Z^2 ... + B5*Z^5
+        Get 2^(j/2^expK) from table in the form THI+TLO.
+        Now we have 2^(PH+PL+PLL) ~= 2^N * (THI + TLO) * (1 + Exp2Poly).
+        Get significand of 2^(PH+PL+PLL) in the form ResHi+ResLo:
+        ResHi := THI
+        ResLo := THI * Exp2Poly + TLO
+        Get exponent ERes of the result:
+        Res := ResHi + ResLo:
+        Result := ex(Res) + N.  */
+
+        pushq     %rbp
+        cfi_adjust_cfa_offset (8)
+        cfi_rel_offset (%rbp, 0)
+        movq      %rsp, %rbp
+        cfi_def_cfa_register (%rbp)
+        andq      $-64, %rsp
+        subq      $256, %rsp
+        movaps    %xmm0, %xmm3
+        movhlps   %xmm0, %xmm3
+        movaps    %xmm1, %xmm5
+        movups    %xmm8, 112(%rsp)
+        movaps    %xmm5, %xmm2
+        cvtps2pd  %xmm3, %xmm8
+        cvtps2pd  %xmm5, %xmm7
+        movups    %xmm9, 96(%rsp)
+        movaps    %xmm0, %xmm4
+        cvtps2pd  %xmm0, %xmm9
+        movq      __svml_spow_data@GOTPCREL(%rip), %rdx
+        movups    %xmm10, 176(%rsp)
+        movups    %xmm13, 48(%rsp)
+        movups _ExpMask(%rdx), %xmm6
+
+/* preserve mantissa, set input exponent to 2^(-10) */
+        movaps    %xmm6, %xmm10
+        andps     %xmm8, %xmm6
+        andps     %xmm9, %xmm10
+
+/* exponent bits selection */
+        psrlq     $20, %xmm9
+        orps _Two10(%rdx), %xmm6
+        psrlq     $20, %xmm8
+        orps _Two10(%rdx), %xmm10
+
+/* reciprocal approximation good to at least 11 bits */
+        cvtpd2ps  %xmm6, %xmm13
+        cvtpd2ps  %xmm10, %xmm1
+        movlhps   %xmm13, %xmm13
+        movhlps   %xmm5, %xmm2
+        movlhps   %xmm1, %xmm1
+        movups    %xmm12, 208(%rsp)
+        rcpps     %xmm13, %xmm12
+        movups    %xmm11, 80(%rsp)
+        cvtps2pd  %xmm2, %xmm11
+        rcpps     %xmm1, %xmm2
+        movups    %xmm14, 144(%rsp)
+        cvtps2pd  %xmm12, %xmm14
+        movups    %xmm15, 160(%rsp)
+        cvtps2pd  %xmm2, %xmm15
+        shufps    $221, %xmm8, %xmm9
+
+/* round reciprocal to nearest integer, will have 1+9 mantissa bits */
+        roundpd   $0, %xmm14, %xmm14
+
+/* biased exponent in DP format */
+        pshufd    $238, %xmm9, %xmm8
+        roundpd   $0, %xmm15, %xmm15
+        cvtdq2pd  %xmm8, %xmm1
+        mulpd     %xmm15, %xmm10
+        mulpd     %xmm14, %xmm6
+        cvtdq2pd  %xmm9, %xmm2
+        subpd _One(%rdx), %xmm10
+        subpd _One(%rdx), %xmm6
+
+/* table lookup */
+        movaps    %xmm14, %xmm8
+        movaps    %xmm15, %xmm9
+        psrlq     $40, %xmm8
+        psrlq     $40, %xmm9
+        movd      %xmm8, %r8d
+        movd      %xmm9, %eax
+        psubd _NMINNORM(%rdx), %xmm4
+        movdqu _ABSMASK(%rdx), %xmm3
+        pextrd    $2, %xmm8, %r9d
+        pand      %xmm5, %xmm3
+        movups _Threshold(%rdx), %xmm8
+        pextrd    $2, %xmm9, %ecx
+        movaps    %xmm8, %xmm9
+        cmpltpd   %xmm15, %xmm9
+        cmpltpd   %xmm14, %xmm8
+        andps _Bias(%rdx), %xmm9
+        movaps    %xmm10, %xmm14
+        andps _Bias(%rdx), %xmm8
+        movaps    %xmm6, %xmm15
+        orps _Bias1(%rdx), %xmm9
+        orps _Bias1(%rdx), %xmm8
+        subpd     %xmm9, %xmm2
+        subpd     %xmm8, %xmm1
+        mulpd     %xmm10, %xmm14
+        mulpd     %xmm6, %xmm15
+        mulpd _L2(%rdx), %xmm2
+        mulpd _L2(%rdx), %xmm1
+        movups _poly_coeff_3(%rdx), %xmm9
+        movaps    %xmm9, %xmm8
+        mulpd     %xmm10, %xmm8
+        mulpd     %xmm6, %xmm9
+        addpd _poly_coeff_4(%rdx), %xmm8
+        addpd _poly_coeff_4(%rdx), %xmm9
+        mulpd     %xmm14, %xmm8
+        mulpd     %xmm15, %xmm9
+
+/* reconstruction */
+        addpd     %xmm8, %xmm10
+        addpd     %xmm9, %xmm6
+        movslq    %eax, %rax
+        movslq    %r8d, %r8
+        movslq    %ecx, %rcx
+        movslq    %r9d, %r9
+        movsd     _Log2Rcp_lookup(%rdx,%rax), %xmm13
+        movsd     _Log2Rcp_lookup(%rdx,%r8), %xmm12
+        movhpd    _Log2Rcp_lookup(%rdx,%rcx), %xmm13
+        movhpd    _Log2Rcp_lookup(%rdx,%r9), %xmm12
+        addpd     %xmm10, %xmm13
+        addpd     %xmm6, %xmm12
+        addpd     %xmm13, %xmm2
+        addpd     %xmm12, %xmm1
+        mulpd     %xmm7, %xmm2
+        mulpd     %xmm11, %xmm1
+        movups __dbInvLn2(%rdx), %xmm11
+        movdqa    %xmm4, %xmm12
+        movaps    %xmm11, %xmm10
+        mulpd     %xmm2, %xmm10
+        mulpd     %xmm1, %xmm11
+
+/* to round down; if dR is an integer we will get R = 1, which is ok */
+        movaps    %xmm10, %xmm8
+        movaps    %xmm11, %xmm9
+        subpd __dbHALF(%rdx), %xmm8
+        subpd __dbHALF(%rdx), %xmm9
+        addpd __dbShifter(%rdx), %xmm8
+        addpd __dbShifter(%rdx), %xmm9
+        movaps    %xmm8, %xmm6
+        movaps    %xmm9, %xmm7
+        subpd __dbShifter(%rdx), %xmm6
+        subpd __dbShifter(%rdx), %xmm7
+
+/* [0..1) */
+        subpd     %xmm6, %xmm10
+        subpd     %xmm7, %xmm11
+        mulpd __dbC1(%rdx), %xmm10
+        mulpd __dbC1(%rdx), %xmm11
+
+/* hi bits */
+        shufps    $221, %xmm1, %xmm2
+        movdqu _NMAXVAL(%rdx), %xmm1
+        pcmpgtd   %xmm1, %xmm12
+        pcmpeqd   %xmm1, %xmm4
+        por       %xmm4, %xmm12
+        movdqa    %xmm3, %xmm1
+        movdqu _INF(%rdx), %xmm4
+        pcmpgtd   %xmm4, %xmm1
+        pcmpeqd   %xmm4, %xmm3
+
+/* iAbsX = iAbsX&iAbsMask */
+        pand __iAbsMask(%rdx), %xmm2
+        por       %xmm3, %xmm1
+
+/* iRangeMask = (iAbsX>iDomainRange) */
+        pcmpgtd __iDomainRange(%rdx), %xmm2
+        por       %xmm1, %xmm12
+        movups __lbLOWKBITS(%rdx), %xmm3
+        por       %xmm2, %xmm12
+
+/* low K bits */
+        movaps    %xmm3, %xmm2
+        andps     %xmm9, %xmm3
+        andps     %xmm8, %xmm2
+        psrlq     $11, %xmm8
+
+/* dpP= _dbT+lJ*T_ITEM_GRAN */
+        movd      %xmm2, %r10d
+        psrlq     $11, %xmm9
+        movd      %xmm3, %ecx
+
+/* NB : including +/- sign for the exponent!! */
+        psllq     $52, %xmm8
+        psllq     $52, %xmm9
+        pextrw    $4, %xmm2, %r11d
+        pextrw    $4, %xmm3, %r8d
+        movmskps  %xmm12, %eax
+        shll      $3, %r10d
+        shll      $3, %ecx
+        shll      $3, %r11d
+        shll      $3, %r8d
+        movq      13952(%rdx,%r10), %xmm6
+        movq      13952(%rdx,%rcx), %xmm7
+        movhpd    13952(%rdx,%r11), %xmm6
+        movhpd    13952(%rdx,%r8), %xmm7
+        mulpd     %xmm6, %xmm10
+        mulpd     %xmm7, %xmm11
+        addpd     %xmm10, %xmm6
+        addpd     %xmm11, %xmm7
+        paddq     %xmm8, %xmm6
+        paddq     %xmm9, %xmm7
+        cvtpd2ps  %xmm6, %xmm1
+        cvtpd2ps  %xmm7, %xmm4
+        movlhps   %xmm4, %xmm1
+        testl     %eax, %eax
+        jne       .LBL_1_3
+
+.LBL_1_2:
+        cfi_remember_state
+        movups    112(%rsp), %xmm8
+        movaps    %xmm1, %xmm0
+        movups    96(%rsp), %xmm9
+        movups    176(%rsp), %xmm10
+        movups    80(%rsp), %xmm11
+        movups    208(%rsp), %xmm12
+        movups    48(%rsp), %xmm13
+        movups    144(%rsp), %xmm14
+        movups    160(%rsp), %xmm15
+        movq      %rbp, %rsp
+        cfi_def_cfa_register (%rsp)
+        popq      %rbp
+        cfi_adjust_cfa_offset (-8)
+        cfi_restore (%rbp)
+        ret
+
+.LBL_1_3:
+        cfi_restore_state
+        movups    %xmm0, 64(%rsp)
+        movups    %xmm5, 128(%rsp)
+        movups    %xmm1, 192(%rsp)
+        je        .LBL_1_2
+
+        xorb      %cl, %cl
+        xorl      %edx, %edx
+        movq      %rsi, 8(%rsp)
+        movq      %rdi, (%rsp)
+        movq      %r12, 40(%rsp)
+        cfi_offset_rel_rsp (12, 40)
+        movb      %cl, %r12b
+        movq      %r13, 32(%rsp)
+        cfi_offset_rel_rsp (13, 32)
+        movl      %eax, %r13d
+        movq      %r14, 24(%rsp)
+        cfi_offset_rel_rsp (14, 24)
+        movl      %edx, %r14d
+        movq      %r15, 16(%rsp)
+        cfi_offset_rel_rsp (15, 16)
+        cfi_remember_state
+
+.LBL_1_6:
+        btl       %r14d, %r13d
+        jc        .LBL_1_12
+
+.LBL_1_7:
+        lea       1(%r14), %esi
+        btl       %esi, %r13d
+        jc        .LBL_1_10
+
+.LBL_1_8:
+        incb      %r12b
+        addl      $2, %r14d
+        cmpb      $16, %r12b
+        jb        .LBL_1_6
+
+        movq      8(%rsp), %rsi
+        movq      (%rsp), %rdi
+        movq      40(%rsp), %r12
+        cfi_restore (%r12)
+        movq      32(%rsp), %r13
+        cfi_restore (%r13)
+        movq      24(%rsp), %r14
+        cfi_restore (%r14)
+        movq      16(%rsp), %r15
+        cfi_restore (%r15)
+        movups    192(%rsp), %xmm1
+        jmp       .LBL_1_2
+
+.LBL_1_10:
+        cfi_restore_state
+        movzbl    %r12b, %r15d
+        movss     68(%rsp,%r15,8), %xmm0
+        movss     132(%rsp,%r15,8), %xmm1
+
+        call      powf@PLT
+
+        movss     %xmm0, 196(%rsp,%r15,8)
+        jmp       .LBL_1_8
+
+.LBL_1_12:
+        movzbl    %r12b, %r15d
+        movss     64(%rsp,%r15,8), %xmm0
+        movss     128(%rsp,%r15,8), %xmm1
+
+        call      powf@PLT
+
+        movss     %xmm0, 192(%rsp,%r15,8)
+        jmp       .LBL_1_7
+
+END (_ZGVbN4vv_powf_sse4)
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_powf8_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_powf8_core.S
new file mode 100644
index 0000000000..4552e573a9
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_powf8_core.S
@@ -0,0 +1,38 @@
+/* Multiple versions of vectorized powf.
+   Copyright (C) 2014-2015 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+    Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+#include <init-arch.h>
+
+	.text
+ENTRY (_ZGVdN8vv_powf)
+        .type   _ZGVdN8vv_powf, @gnu_indirect_function
+        cmpl    $0, KIND_OFFSET+__cpu_features(%rip)
+        jne     1f
+        call    __init_cpu_features
+1:      leaq    _ZGVdN8vv_powf_avx2(%rip), %rax
+        testl   $bit_AVX2_Usable, __cpu_features+FEATURE_OFFSET+index_AVX2_Usable(%rip)
+        jz      2f
+        ret
+2:      leaq    _ZGVdN8vv_powf_sse_wrapper(%rip), %rax
+        ret
+END (_ZGVdN8vv_powf)
+libmvec_hidden_def (_ZGVdN8vv_powf)
+
+#define _ZGVdN8vv_powf _ZGVdN8vv_powf_sse_wrapper
+#include "../svml_s_powf8_core.S"
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_powf8_core_avx2.S b/sysdeps/x86_64/fpu/multiarch/svml_s_powf8_core_avx2.S
new file mode 100644
index 0000000000..cfb86c7851
--- /dev/null
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_powf8_core_avx2.S
@@ -0,0 +1,357 @@
+/* Function powf vectorized with AVX2.
+   Copyright (C) 2014-2015 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+#include "svml_s_powf_data.h"
+
+	.text
+ENTRY(_ZGVdN8vv_powf_avx2)
+/*
+   ALGORITHM DESCRIPTION:
+
+     We are using the next identity : pow(x,y) = 2^(y * log2(x)).
+
+     1) log2(x) calculation
+        Here we use the following formula.
+        Let |x|=2^k1*X1, where k1 is integer, 1<=X1<2.
+        Let C ~= 1/ln(2),
+        Rcp1 ~= 1/X1,   X2=Rcp1*X1,
+        Rcp2 ~= 1/X2,   X3=Rcp2*X2,
+        Rcp3 ~= 1/X3,   Rcp3C ~= C/X3.
+        Then
+          log2|x| = k1 + log2(1/Rcp1) + log2(1/Rcp2) + log2(C/Rcp3C) +
+                    log2(X1*Rcp1*Rcp2*Rcp3C/C),
+        where X1*Rcp1*Rcp2*Rcp3C = C*(1+q), q is very small.
+
+        The values of Rcp1, log2(1/Rcp1), Rcp2, log2(1/Rcp2),
+        Rcp3C, log2(C/Rcp3C) are taken from tables.
+        Values of Rcp1, Rcp2, Rcp3C are such that RcpC=Rcp1*Rcp2*Rcp3C
+        is exactly represented in target precision.
+
+        log2(X1*Rcp1*Rcp2*Rcp3C/C) = log2(1+q) = ln(1+q)/ln2 =
+             = 1/(ln2)*q - 1/(2ln2)*q^2 + 1/(3ln2)*q^3 - ... =
+             = 1/(C*ln2)*cq - 1/(2*C^2*ln2)*cq^2 + 1/(3*C^3*ln2)*cq^3 - ... =
+             = (1 + a1)*cq + a2*cq^2 + a3*cq^3 + ...,
+        where
+             cq=X1*Rcp1*Rcp2*Rcp3C-C,
+             a1=1/(C*ln(2))-1 is small,
+             a2=1/(2*C^2*ln2),
+             a3=1/(3*C^3*ln2),
+                  ...
+        Log2 result is split by three parts: HH+HL+HLL
+
+     2) Calculation of y*log2(x)
+        Split y into YHi+YLo.
+        Get high PH and medium PL parts of y*log2|x|.
+        Get low PLL part of y*log2|x|.
+        Now we have PH+PL+PLL ~= y*log2|x|.
+
+     3) Calculation of 2^(y*log2(x))
+        Let's represent PH+PL+PLL in the form N + j/2^expK + Z,
+        where expK=7 in this implementation, N and j are integers,
+        0<=j<=2^expK-1, |Z|<2^(-expK-1). Hence
+        2^(PH+PL+PLL) ~= 2^N * 2^(j/2^expK) * 2^Z,
+        where 2^(j/2^expK) is stored in a table, and
+        2^Z ~= 1 + B1*Z + B2*Z^2 ... + B5*Z^5.
+        We compute 2^(PH+PL+PLL) as follows:
+        Break PH into PHH + PHL, where PHH = N + j/2^expK.
+        Z = PHL + PL + PLL
+        Exp2Poly = B1*Z + B2*Z^2 ... + B5*Z^5
+        Get 2^(j/2^expK) from table in the form THI+TLO.
+        Now we have 2^(PH+PL+PLL) ~= 2^N * (THI + TLO) * (1 + Exp2Poly).
+        Get significand of 2^(PH+PL+PLL) in the form ResHi+ResLo:
+        ResHi := THI
+        ResLo := THI * Exp2Poly + TLO
+        Get exponent ERes of the result:
+        Res := ResHi + ResLo:
+        Result := ex(Res) + N.  */
+
+        pushq     %rbp
+        cfi_adjust_cfa_offset (8)
+        cfi_rel_offset (%rbp, 0)
+        movq      %rsp, %rbp
+        cfi_def_cfa_register (%rbp)
+        andq      $-64, %rsp
+        subq      $448, %rsp
+        lea       __VPACK_ODD_ind.6357.0.1(%rip), %rcx
+        vmovups   %ymm14, 320(%rsp)
+
+/* hi bits */
+        lea       __VPACK_ODD_ind.6358.0.1(%rip), %rax
+        vmovups   %ymm12, 256(%rsp)
+        vmovups   %ymm9, 96(%rsp)
+        vmovups   %ymm13, 224(%rsp)
+        vmovups   %ymm15, 352(%rsp)
+        vmovups   %ymm11, 384(%rsp)
+        vmovups   %ymm10, 288(%rsp)
+        vmovups   (%rcx), %ymm10
+        vmovups   %ymm8, 160(%rsp)
+        vmovdqa   %ymm1, %ymm9
+        movq      __svml_spow_data@GOTPCREL(%rip), %rdx
+        vextractf128 $1, %ymm0, %xmm7
+        vcvtps2pd %xmm0, %ymm14
+        vcvtps2pd %xmm7, %ymm12
+        vpsubd _NMINNORM(%rdx), %ymm0, %ymm7
+
+/* preserve mantissa, set input exponent to 2^(-10) */
+        vandpd _ExpMask(%rdx), %ymm14, %ymm3
+        vandpd _ExpMask(%rdx), %ymm12, %ymm13
+
+/* exponent bits selection */
+        vpsrlq    $20, %ymm12, %ymm12
+        vpsrlq    $20, %ymm14, %ymm14
+        vextractf128 $1, %ymm9, %xmm2
+        vcvtps2pd %xmm9, %ymm1
+        vpand _ABSMASK(%rdx), %ymm9, %ymm8
+        vcvtps2pd %xmm2, %ymm6
+        vorpd _Two10(%rdx), %ymm3, %ymm2
+        vorpd _Two10(%rdx), %ymm13, %ymm3
+
+/* reciprocal approximation good to at least 11 bits */
+        vcvtpd2ps %ymm2, %xmm5
+        vcvtpd2ps %ymm3, %xmm15
+        vrcpps    %xmm5, %xmm4
+        vrcpps    %xmm15, %xmm11
+        vcvtps2pd %xmm4, %ymm13
+        vcvtps2pd %xmm11, %ymm4
+        vpermps   %ymm12, %ymm10, %ymm11
+
+/* round reciprocal to nearest integer, will have 1+9 mantissa bits */
+        vroundpd  $0, %ymm13, %ymm12
+        vpermps   %ymm14, %ymm10, %ymm5
+        vroundpd  $0, %ymm4, %ymm14
+        vmovupd _One(%rdx), %ymm4
+
+/* table lookup */
+        vpsrlq    $40, %ymm12, %ymm10
+        vfmsub213pd %ymm4, %ymm12, %ymm2
+        vfmsub213pd %ymm4, %ymm14, %ymm3
+        vcmpgt_oqpd _Threshold(%rdx), %ymm12, %ymm12
+        vxorpd    %ymm4, %ymm4, %ymm4
+        vandpd _Bias(%rdx), %ymm12, %ymm12
+
+/* biased exponent in DP format */
+        vcvtdq2pd %xmm11, %ymm13
+        vpcmpeqd  %ymm11, %ymm11, %ymm11
+        vgatherqpd %ymm11, _Log2Rcp_lookup(%rdx,%ymm10), %ymm4
+        vpsrlq    $40, %ymm14, %ymm10
+        vcmpgt_oqpd _Threshold(%rdx), %ymm14, %ymm14
+        vpcmpeqd  %ymm11, %ymm11, %ymm11
+        vandpd _Bias(%rdx), %ymm14, %ymm14
+        vcvtdq2pd %xmm5, %ymm15
+        vxorpd    %ymm5, %ymm5, %ymm5
+        vgatherqpd %ymm11, _Log2Rcp_lookup(%rdx,%ymm10), %ymm5
+        vorpd _Bias1(%rdx), %ymm12, %ymm11
+        vorpd _Bias1(%rdx), %ymm14, %ymm10
+        vsubpd    %ymm11, %ymm15, %ymm11
+        vsubpd    %ymm10, %ymm13, %ymm14
+        vmovupd _poly_coeff_4(%rdx), %ymm15
+        vmovupd _poly_coeff_3(%rdx), %ymm13
+        vmulpd    %ymm3, %ymm3, %ymm10
+        vfmadd213pd %ymm15, %ymm3, %ymm13
+        vmovdqa   %ymm15, %ymm12
+        vfmadd231pd _poly_coeff_3(%rdx), %ymm2, %ymm12
+        vmulpd    %ymm2, %ymm2, %ymm15
+
+/* reconstruction */
+        vfmadd213pd %ymm3, %ymm10, %ymm13
+        vfmadd213pd %ymm2, %ymm15, %ymm12
+        vaddpd    %ymm5, %ymm13, %ymm13
+        vaddpd    %ymm4, %ymm12, %ymm2
+        vfmadd231pd _L2(%rdx), %ymm14, %ymm13
+        vfmadd132pd _L2(%rdx), %ymm2, %ymm11
+        vmulpd    %ymm6, %ymm13, %ymm2
+        vmulpd    %ymm1, %ymm11, %ymm10
+        vmulpd __dbInvLn2(%rdx), %ymm2, %ymm6
+        vmulpd __dbInvLn2(%rdx), %ymm10, %ymm15
+
+/* to round down; if dR is an integer we will get R = 1, which is ok */
+        vsubpd __dbHALF(%rdx), %ymm6, %ymm3
+        vsubpd __dbHALF(%rdx), %ymm15, %ymm1
+        vaddpd __dbShifter(%rdx), %ymm3, %ymm13
+        vaddpd __dbShifter(%rdx), %ymm1, %ymm14
+        vsubpd __dbShifter(%rdx), %ymm13, %ymm12
+        vmovups   (%rax), %ymm1
+        vsubpd __dbShifter(%rdx), %ymm14, %ymm11
+
+/* [0..1) */
+        vsubpd    %ymm12, %ymm6, %ymm6
+        vpermps   %ymm10, %ymm1, %ymm3
+        vpermps   %ymm2, %ymm1, %ymm10
+        vpcmpgtd _NMAXVAL(%rdx), %ymm7, %ymm4
+        vpcmpgtd _INF(%rdx), %ymm8, %ymm1
+        vpcmpeqd _NMAXVAL(%rdx), %ymm7, %ymm7
+        vpcmpeqd _INF(%rdx), %ymm8, %ymm8
+        vpor      %ymm7, %ymm4, %ymm2
+        vpor      %ymm8, %ymm1, %ymm1
+        vsubpd    %ymm11, %ymm15, %ymm7
+        vinsertf128 $1, %xmm10, %ymm3, %ymm10
+        vpor      %ymm1, %ymm2, %ymm3
+
+/* iAbsX = iAbsX&iAbsMask */
+        vandps __iAbsMask(%rdx), %ymm10, %ymm10
+
+/* iRangeMask = (iAbsX>iDomainRange) */
+        vpcmpgtd __iDomainRange(%rdx), %ymm10, %ymm4
+        vpor      %ymm4, %ymm3, %ymm5
+        vmulpd __dbC1(%rdx), %ymm7, %ymm4
+        vmovmskps %ymm5, %ecx
+        vmulpd __dbC1(%rdx), %ymm6, %ymm5
+
+/* low K bits */
+        vandps __lbLOWKBITS(%rdx), %ymm14, %ymm6
+
+/* dpP= _dbT+lJ*T_ITEM_GRAN */
+        vxorpd    %ymm7, %ymm7, %ymm7
+        vpcmpeqd  %ymm1, %ymm1, %ymm1
+        vandps __lbLOWKBITS(%rdx), %ymm13, %ymm2
+        vxorpd    %ymm10, %ymm10, %ymm10
+        vpcmpeqd  %ymm3, %ymm3, %ymm3
+        vgatherqpd %ymm1, 13952(%rdx,%ymm6,8), %ymm7
+        vgatherqpd %ymm3, 13952(%rdx,%ymm2,8), %ymm10
+        vpsrlq    $11, %ymm14, %ymm14
+        vpsrlq    $11, %ymm13, %ymm13
+        vfmadd213pd %ymm7, %ymm4, %ymm7
+        vfmadd213pd %ymm10, %ymm5, %ymm10
+
+/* NB : including +/- sign for the exponent!! */
+        vpsllq    $52, %ymm14, %ymm8
+        vpsllq    $52, %ymm13, %ymm11
+        vpaddq    %ymm8, %ymm7, %ymm12
+        vpaddq    %ymm11, %ymm10, %ymm1
+        vcvtpd2ps %ymm12, %xmm15
+        vcvtpd2ps %ymm1, %xmm2
+        vinsertf128 $1, %xmm2, %ymm15, %ymm1
+        testl     %ecx, %ecx
+        jne       .LBL_1_3
+
+.LBL_1_2:
+        cfi_remember_state
+        vmovups   160(%rsp), %ymm8
+        vmovups   96(%rsp), %ymm9
+        vmovups   288(%rsp), %ymm10
+        vmovups   384(%rsp), %ymm11
+        vmovups   256(%rsp), %ymm12
+        vmovups   224(%rsp), %ymm13
+        vmovups   320(%rsp), %ymm14
+        vmovups   352(%rsp), %ymm15
+        vmovdqa   %ymm1, %ymm0
+        movq      %rbp, %rsp
+        cfi_def_cfa_register (%rsp)
+        popq      %rbp
+        cfi_adjust_cfa_offset (-8)
+        cfi_restore (%rbp)
+        ret
+
+.LBL_1_3:
+        cfi_restore_state
+        vmovups   %ymm0, 64(%rsp)
+        vmovups   %ymm9, 128(%rsp)
+        vmovups   %ymm1, 192(%rsp)
+        je        .LBL_1_2
+
+        xorb      %dl, %dl
+        xorl      %eax, %eax
+        movq      %rsi, 8(%rsp)
+        movq      %rdi, (%rsp)
+        movq      %r12, 40(%rsp)
+        cfi_offset_rel_rsp (12, 40)
+        movb      %dl, %r12b
+        movq      %r13, 32(%rsp)
+        cfi_offset_rel_rsp (13, 32)
+        movl      %ecx, %r13d
+        movq      %r14, 24(%rsp)
+        cfi_offset_rel_rsp (14, 24)
+        movl      %eax, %r14d
+        movq      %r15, 16(%rsp)
+        cfi_offset_rel_rsp (15, 16)
+        cfi_remember_state
+
+.LBL_1_6:
+        btl       %r14d, %r13d
+        jc        .LBL_1_12
+
+.LBL_1_7:
+        lea       1(%r14), %esi
+        btl       %esi, %r13d
+        jc        .LBL_1_10
+
+.LBL_1_8:
+        incb      %r12b
+        addl      $2, %r14d
+        cmpb      $16, %r12b
+        jb        .LBL_1_6
+
+        movq      8(%rsp), %rsi
+        movq      (%rsp), %rdi
+        movq      40(%rsp), %r12
+        cfi_restore (%r12)
+        movq      32(%rsp), %r13
+        cfi_restore (%r13)
+        movq      24(%rsp), %r14
+        cfi_restore (%r14)
+        movq      16(%rsp), %r15
+        cfi_restore (%r15)
+        vmovups   192(%rsp), %ymm1
+        jmp       .LBL_1_2
+
+.LBL_1_10:
+        cfi_restore_state
+        movzbl    %r12b, %r15d
+        vmovss    68(%rsp,%r15,8), %xmm0
+        vmovss    132(%rsp,%r15,8), %xmm1
+        vzeroupper
+
+        call      powf@PLT
+
+        vmovss    %xmm0, 196(%rsp,%r15,8)
+        jmp       .LBL_1_8
+
+.LBL_1_12:
+        movzbl    %r12b, %r15d
+        vmovss    64(%rsp,%r15,8), %xmm0
+        vmovss    128(%rsp,%r15,8), %xmm1
+        vzeroupper
+
+        call      powf@PLT
+
+        vmovss    %xmm0, 192(%rsp,%r15,8)
+        jmp       .LBL_1_7
+
+END(_ZGVdN8vv_powf_avx2)
+
+	.section .rodata, "a"
+__VPACK_ODD_ind.6357.0.1:
+	.long	1
+	.long	3
+	.long	5
+	.long	7
+	.long	0
+	.long	0
+	.long	0
+	.long	0
+	.space 32, 0x00
+__VPACK_ODD_ind.6358.0.1:
+	.long	1
+	.long	3
+	.long	5
+	.long	7
+	.long	0
+	.long	0
+	.long	0
+	.long	0
diff --git a/sysdeps/x86_64/fpu/svml_s_powf16_core.S b/sysdeps/x86_64/fpu/svml_s_powf16_core.S
new file mode 100644
index 0000000000..efd84c2fff
--- /dev/null
+++ b/sysdeps/x86_64/fpu/svml_s_powf16_core.S
@@ -0,0 +1,25 @@
+/* Function powf vectorized with AVX-512. Wrapper to AVX2 version.
+   Copyright (C) 2014-2015 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+#include "svml_s_wrapper_impl.h"
+
+	.text
+ENTRY (_ZGVeN16vv_powf)
+WRAPPER_IMPL_AVX512_ff _ZGVdN8vv_powf
+END (_ZGVeN16vv_powf)
diff --git a/sysdeps/x86_64/fpu/svml_s_powf4_core.S b/sysdeps/x86_64/fpu/svml_s_powf4_core.S
new file mode 100644
index 0000000000..81f0f530de
--- /dev/null
+++ b/sysdeps/x86_64/fpu/svml_s_powf4_core.S
@@ -0,0 +1,29 @@
+/* Function powf vectorized with SSE2.
+   Copyright (C) 2014-2015 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+#include "svml_s_wrapper_impl.h"
+
+	.text
+ENTRY (_ZGVbN4vv_powf)
+WRAPPER_IMPL_SSE2_ff powf
+END (_ZGVbN4vv_powf)
+
+#ifndef USE_MULTIARCH
+ libmvec_hidden_def (_ZGVbN4vv_powf)
+#endif
diff --git a/sysdeps/x86_64/fpu/svml_s_powf8_core.S b/sysdeps/x86_64/fpu/svml_s_powf8_core.S
new file mode 100644
index 0000000000..8fed6c7c86
--- /dev/null
+++ b/sysdeps/x86_64/fpu/svml_s_powf8_core.S
@@ -0,0 +1,29 @@
+/* Function powf vectorized with AVX2, wrapper version.
+   Copyright (C) 2014-2015 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+#include "svml_s_wrapper_impl.h"
+
+	.text
+ENTRY (_ZGVdN8vv_powf)
+WRAPPER_IMPL_AVX_ff _ZGVbN4vv_powf
+END (_ZGVdN8vv_powf)
+
+#ifndef USE_MULTIARCH
+ libmvec_hidden_def (_ZGVdN8vv_powf)
+#endif
diff --git a/sysdeps/x86_64/fpu/svml_s_powf8_core_avx.S b/sysdeps/x86_64/fpu/svml_s_powf8_core_avx.S
new file mode 100644
index 0000000000..eeeb66d46e
--- /dev/null
+++ b/sysdeps/x86_64/fpu/svml_s_powf8_core_avx.S
@@ -0,0 +1,25 @@
+/* Function powf vectorized in AVX ISA as wrapper to SSE4 ISA version.
+   Copyright (C) 2014-2015 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include <sysdep.h>
+#include "svml_s_wrapper_impl.h"
+
+        .text
+ENTRY(_ZGVcN8vv_powf)
+WRAPPER_IMPL_AVX_ff _ZGVbN4vv_powf
+END(_ZGVcN8vv_powf)
diff --git a/sysdeps/x86_64/fpu/svml_s_powf_data.S b/sysdeps/x86_64/fpu/svml_s_powf_data.S
new file mode 100644
index 0000000000..4a4799ae4f
--- /dev/null
+++ b/sysdeps/x86_64/fpu/svml_s_powf_data.S
@@ -0,0 +1,3759 @@
+/* Data for function powf.
+   Copyright (C) 2014-2015 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#include "svml_s_powf_data.h"
+
+	.section .rodata, "a"
+	.align 64
+
+/* Data table for vector implementations of function powf.
+   The table may contain polynomial, reduction, lookup coefficients and
+   other coefficients obtained through different methods of research
+   and experimental work.  */
+
+	.globl __svml_spow_data
+__svml_spow_data:
+
+/* General purpose constants for H+L multiplication:
+ * NMINNORM */
+float_vector _NMINNORM 0x80800000
+
+/* NMAXVAL */
+float_vector _NMAXVAL 0xfeffffff
+
+/* INF */
+float_vector _INF 0x7f800000
+
+/* ABSMASK */
+float_vector _ABSMASK 0x7fffffff
+
+/* DOMAINRANGE */
+float_vector _DOMAINRANGE 0x42ae9a00
+
+/* Log(2) lookup High+Low table for logarithmic part */
+.if .-__svml_spow_data != _Log_HA_table
+.err
+.endif
+	.quad	0xc086232bdd7a8300
+	.quad	0xbe1ce91eef3fb100
+	.quad	0xc086232fdc7ad828
+	.quad	0xbe1cefcffda73b6a
+	.quad	0xc0862333d97d2ba0
+	.quad	0xbe1cef406748f1ff
+	.quad	0xc0862337d48378e0
+	.quad	0xbe1cef2a9429925a
+	.quad	0xc086233bcd8fb878
+	.quad	0xbe1cf138d17ebecb
+	.quad	0xc086233fc4a3e018
+	.quad	0xbe1ceff2dbbbb29e
+	.quad	0xc0862343b9c1e270
+	.quad	0xbe1cf1a42aae437b
+	.quad	0xc0862347acebaf68
+	.quad	0xbe1cef3b152048af
+	.quad	0xc086234b9e2333f0
+	.quad	0xbe1cef20e127805e
+	.quad	0xc086234f8d6a5a30
+	.quad	0xbe1cf00ad6052cf4
+	.quad	0xc08623537ac30980
+	.quad	0xbe1cefc4642ee597
+	.quad	0xc0862357662f2660
+	.quad	0xbe1cf1f277d36e16
+	.quad	0xc086235b4fb092a0
+	.quad	0xbe1ceed009e8d8e6
+	.quad	0xc086235f37492d28
+	.quad	0xbe1cf1e4038cb362
+	.quad	0xc08623631cfad250
+	.quad	0xbe1cf0b0873b8557
+	.quad	0xc086236700c75b98
+	.quad	0xbe1cf15bb3227c0b
+	.quad	0xc086236ae2b09fe0
+	.quad	0xbe1cf151ef8ca9ed
+	.quad	0xc086236ec2b87358
+	.quad	0xbe1cefe1dc2cd2ed
+	.quad	0xc0862372a0e0a780
+	.quad	0xbe1cf0d1eec5454f
+	.quad	0xc08623767d2b0b48
+	.quad	0xbe1ceeefd570bbce
+	.quad	0xc086237a57996af0
+	.quad	0xbe1cee99ae91b3a7
+	.quad	0xc086237e302d9028
+	.quad	0xbe1cf0412830fbd1
+	.quad	0xc086238206e94218
+	.quad	0xbe1ceee898588610
+	.quad	0xc0862385dbce4548
+	.quad	0xbe1cee9a1fbcaaea
+	.quad	0xc0862389aede5bc0
+	.quad	0xbe1ceed8e7cc1ad6
+	.quad	0xc086238d801b4500
+	.quad	0xbe1cf10c8d059da6
+	.quad	0xc08623914f86be18
+	.quad	0xbe1ceee6c63a8165
+	.quad	0xc08623951d228180
+	.quad	0xbe1cf0c3592d2ff1
+	.quad	0xc0862398e8f04758
+	.quad	0xbe1cf0026cc4cb1b
+	.quad	0xc086239cb2f1c538
+	.quad	0xbe1cf15d48d8e670
+	.quad	0xc08623a07b28ae60
+	.quad	0xbe1cef359363787c
+	.quad	0xc08623a44196b390
+	.quad	0xbe1cefdf1ab2e82c
+	.quad	0xc08623a8063d8338
+	.quad	0xbe1cefe43c02aa84
+	.quad	0xc08623abc91ec960
+	.quad	0xbe1cf044f5ae35b7
+	.quad	0xc08623af8a3c2fb8
+	.quad	0xbe1cf0b0b4001e1b
+	.quad	0xc08623b349975d98
+	.quad	0xbe1cf1bae76dfbcf
+	.quad	0xc08623b70731f810
+	.quad	0xbe1cef0a72e13a62
+	.quad	0xc08623bac30da1c8
+	.quad	0xbe1cf184007d2b6b
+	.quad	0xc08623be7d2bfb40
+	.quad	0xbe1cf16f4b239e98
+	.quad	0xc08623c2358ea2a0
+	.quad	0xbe1cf0976acada87
+	.quad	0xc08623c5ec3733d0
+	.quad	0xbe1cf066318a16ff
+	.quad	0xc08623c9a1274880
+	.quad	0xbe1ceffaa7148798
+	.quad	0xc08623cd54607820
+	.quad	0xbe1cf23ab02e9b6e
+	.quad	0xc08623d105e45800
+	.quad	0xbe1cefdfef7d4fde
+	.quad	0xc08623d4b5b47b20
+	.quad	0xbe1cf17fece44f2b
+	.quad	0xc08623d863d27270
+	.quad	0xbe1cf18f907d0d7c
+	.quad	0xc08623dc103fccb0
+	.quad	0xbe1cee61fe072c98
+	.quad	0xc08623dfbafe1668
+	.quad	0xbe1cf022dd891e2f
+	.quad	0xc08623e3640eda20
+	.quad	0xbe1ceecc1daf4358
+	.quad	0xc08623e70b73a028
+	.quad	0xbe1cf0173c4fa380
+	.quad	0xc08623eab12deec8
+	.quad	0xbe1cf16a2150c2f4
+	.quad	0xc08623ee553f4a30
+	.quad	0xbe1cf1bf980b1f4b
+	.quad	0xc08623f1f7a93480
+	.quad	0xbe1cef8b731663c2
+	.quad	0xc08623f5986d2dc0
+	.quad	0xbe1cee9a664d7ef4
+	.quad	0xc08623f9378cb3f0
+	.quad	0xbe1cf1eda2af6400
+	.quad	0xc08623fcd5094320
+	.quad	0xbe1cf1923f9d68d7
+	.quad	0xc086240070e45548
+	.quad	0xbe1cf0747cd3e03a
+	.quad	0xc08624040b1f6260
+	.quad	0xbe1cf22ee855bd6d
+	.quad	0xc0862407a3bbe078
+	.quad	0xbe1cf0d57360c00b
+	.quad	0xc086240b3abb4398
+	.quad	0xbe1ceebc815cd575
+	.quad	0xc086240ed01efdd0
+	.quad	0xbe1cf03bfb970951
+	.quad	0xc086241263e87f50
+	.quad	0xbe1cf16e74768529
+	.quad	0xc0862415f6193658
+	.quad	0xbe1cefec64b8becb
+	.quad	0xc086241986b28f30
+	.quad	0xbe1cf0838d210baa
+	.quad	0xc086241d15b5f448
+	.quad	0xbe1cf0ea86e75b11
+	.quad	0xc0862420a324ce28
+	.quad	0xbe1cf1708d11d805
+	.quad	0xc08624242f008380
+	.quad	0xbe1ceea988c5a417
+	.quad	0xc0862427b94a7910
+	.quad	0xbe1cef166a7bbca5
+	.quad	0xc086242b420411d0
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+	.quad	0xc08626d23d4a4310
+	.quad	0xbe1cefdc455d9d7e
+	.quad	0xc08626d4c5c29ad0
+	.quad	0xbe1ceefc47e8fa64
+	.quad	0xc08626d74d6ddf48
+	.quad	0xbe1cf1872bf033f2
+	.quad	0xc08626d9d44c9210
+	.quad	0xbe1cf19d91087f9d
+	.quad	0xc08626dc5a5f3438
+	.quad	0xbe1cf012d444c6ab
+	.quad	0xc08626dedfa64650
+	.quad	0xbe1cf0ba528ee153
+	.quad	0xc08626e164224880
+	.quad	0xbe1ceeb431709788
+	.quad	0xc08626e3e7d3ba60
+	.quad	0xbe1cf0b9af31a6a5
+	.quad	0xc08626e66abb1b28
+	.quad	0xbe1cf168fb2e135b
+	.quad	0xc08626e8ecd8e990
+	.quad	0xbe1cef9097461c93
+	.quad	0xc08626eb6e2da3d0
+	.quad	0xbe1cee7a434735d8
+	.quad	0xc08626edeeb9c7a8
+	.quad	0xbe1cf235732b86f2
+	.quad	0xc08626f06e7dd280
+	.quad	0xbe1cefe1510b89e6
+	.quad	0xc08626f2ed7a4120
+	.quad	0xbe1cf1f64b9b80ef
+	.quad	0xc08626f56baf9000
+	.quad	0xbe1cf08f320ca339
+	.quad	0xc08626f7e91e3b08
+	.quad	0xbe1cf1b1de2808a1
+	.quad	0xc08626fa65c6bdc0
+	.quad	0xbe1cf1976d778b28
+	.quad	0xc08626fce1a99338
+	.quad	0xbe1ceef40a4f076f
+	.quad	0xc08626ff5cc73600
+	.quad	0xbe1cef3e45869ce3
+	.quad	0xc0862701d7202048
+	.quad	0xbe1ceef601b4c9d6
+	.quad	0xc086270450b4cbc0
+	.quad	0xbe1cf1eaf0b57fd6
+	.quad	0xc0862706c985b1c0
+	.quad	0xbe1cef82a44990f3
+	.quad	0xc086270941934b10
+	.quad	0xbe1ceefe32981f2c
+	.quad	0xc086270bb8de1018
+	.quad	0xbe1cefbf6f5a0445
+	.quad	0xc086270e2f6678d0
+	.quad	0xbe1cf18dba75792c
+	.quad	0xc0862710a52cfcc8
+	.quad	0xbe1cf0da64ce995f
+	.quad	0xc08627131a321318
+	.quad	0xbe1cef04ac0fb802
+	.quad	0xc08627158e763268
+	.quad	0xbe1cee9d4e2ad9bd
+	.quad	0xc086271801f9d0f8
+	.quad	0xbe1cefa9b55407b5
+	.quad	0xc086271a74bd64a0
+	.quad	0xbe1cefe6bd329570
+	.quad	0xc086271ce6c162c8
+	.quad	0xbe1cef0b1205dc85
+	.quad	0xc086271f58064068
+	.quad	0xbe1cef092a785e3f
+	.quad	0xc0862721c88c7210
+	.quad	0xbe1cf050dcdaac30
+	.quad	0xc086272438546be8
+	.quad	0xbe1cf210907ded8b
+	.quad	0xc0862726a75ea1b8
+	.quad	0xbe1cee760be44f99
+	.quad	0xc086272915ab86c0
+	.quad	0xbe1ceeeee07c2bcc
+	.quad	0xc086272b833b8df0
+	.quad	0xbe1cf06874992df5
+	.quad	0xc086272df00f29d0
+	.quad	0xbe1cef8fac5d4899
+	.quad	0xc08627305c26cc70
+	.quad	0xbe1cf1103241cc99
+	.quad	0xc0862732c782e788
+	.quad	0xbe1cf1d35fef83fe
+	.quad	0xc08627353223ec68
+	.quad	0xbe1cef3ec8133e1d
+	.quad	0xc08627379c0a4be8
+	.quad	0xbe1cef7261daccd8
+	.quad	0xc086273a05367688
+	.quad	0xbe1cf18656c50806
+	.quad	0xc086273c6da8dc68
+	.quad	0xbe1cf1c8736e049a
+	.quad	0xc086273ed561ed38
+	.quad	0xbe1cf1f93bff4911
+	.quad	0xc08627413c621848
+	.quad	0xbe1cf188a4ea680c
+	.quad	0xc0862743a2a9cc80
+	.quad	0xbe1cf1d270930c80
+	.quad	0xc086274608397868
+	.quad	0xbe1cf25a328c28e2
+	.quad	0xc08627486d118a28
+	.quad	0xbe1cf106f90aa3b8
+	.quad	0xc086274ad1326f80
+	.quad	0xbe1cee5e9d2e885a
+	.quad	0xc086274d349c95c0
+	.quad	0xbe1cf1c0bac27228
+	.quad	0xc086274f975069f8
+	.quad	0xbe1cf1a1500f9b1c
+	.quad	0xc0862751f94e58c0
+	.quad	0xbe1cefc30663ac44
+	.quad	0xc08627545a96ce48
+	.quad	0xbe1cf17123e427a2
+	.quad	0xc0862756bb2a3678
+	.quad	0xbe1cefb92749fea4
+	.quad	0xc08627591b08fcc0
+	.quad	0xbe1cefa40e1ea74a
+	.quad	0xc086275b7a338c40
+	.quad	0xbe1cee6f4612c3e9
+	.quad	0xc086275dd8aa4fa8
+	.quad	0xbe1cf1c54a053627
+	.quad	0xc0862760366db168
+	.quad	0xbe1ceff5eb503d9e
+	.quad	0xc0862762937e1b70
+	.quad	0xbe1cf02e47f10cee
+	.quad	0xc0862764efdbf768
+	.quad	0xbe1ceeb06e1d0dad
+	.quad	0xc08627674b87ae88
+	.quad	0xbe1cf10aadd6dba5
+	.quad	0xc0862769a681a9c0
+	.quad	0xbe1cf24e9913d30f
+	.quad	0xc086276c00ca51a0
+	.quad	0xbe1cef47b301e312
+	.quad	0xc086276e5a620e48
+	.quad	0xbe1ceeb1cefc2e85
+	.quad	0xc0862770b3494788
+	.quad	0xbe1cf16f1fbbe011
+	.quad	0xc08627730b8064e8
+	.quad	0xbe1ceebdf75174c7
+	.quad	0xc08627756307cd70
+	.quad	0xbe1cf06e3871a0da
+	.quad	0xc0862777b9dfe7f0
+	.quad	0xbe1cef16799fd554
+	.quad	0xc086277a10091ac0
+	.quad	0xbe1cf248dabf5377
+	.quad	0xc086277c6583cc00
+	.quad	0xbe1cf0c78d92a2cd
+	.quad	0xc086277eba506158
+	.quad	0xbe1cf0b911b029f0
+	.quad	0xc08627810e6f4028
+	.quad	0xbe1cefdc24719766
+	.quad	0xc086278361e0cd70
+	.quad	0xbe1cefbb6562b7e7
+	.quad	0xc0862785b4a56dd8
+	.quad	0xbe1cf1e0afb349ec
+	.quad	0xc086278806bd85c0
+	.quad	0xbe1cf008292e52fc
+	.quad	0xc086278a58297918
+	.quad	0xbe1cf053073872bf
+	.quad	0xc086278ca8e9ab88
+	.quad	0xbe1cf17a0a55a947
+	.quad	0xc086278ef8fe8068
+	.quad	0xbe1ceeffb0b60234
+	.quad	0xc086279148685aa0
+	.quad	0xbe1cf162204794a8
+	.quad	0xc086279397279ce0
+	.quad	0xbe1cf24cc8cb48ac
+	.quad	0xc0862795e53ca978
+	.quad	0xbe1cf0c9be68d5c3
+	.quad	0xc086279832a7e258
+	.quad	0xbe1cf172cd3d7388
+	.quad	0xc086279a7f69a930
+	.quad	0xbe1ceea2465fbce5
+	.quad	0xc086279ccb825f40
+	.quad	0xbe1cf0a386d2500f
+	.quad	0xc086279f16f26590
+	.quad	0xbe1cf1e338ddc18a
+	.quad	0xc08627a161ba1cd0
+	.quad	0xbe1cef1f5049867f
+	.quad	0xc08627a3abd9e548
+	.quad	0xbe1cef96c1ea8b1f
+	.quad	0xc08627a5f5521f00
+	.quad	0xbe1cf138f6fd3c26
+	.quad	0xc08627a83e2329b0
+	.quad	0xbe1cf0d4fcbfdf3a
+	.quad	0xc08627aa864d64b0
+	.quad	0xbe1cf24870c12c81
+	.quad	0xc08627accdd12f18
+	.quad	0xbe1cf0ae2a56348d
+	.quad	0xc08627af14aee7a0
+	.quad	0xbe1cee8ca1a9b893
+	.quad	0xc08627b15ae6eca8
+	.quad	0xbe1cf20414d637b0
+	.quad	0xc08627b3a0799c60
+	.quad	0xbe1cf0fc6b7b12d8
+	.quad	0xc08627b5e5675488
+	.quad	0xbe1cf152d93c4a00
+	.quad	0xc08627b829b072a0
+	.quad	0xbe1cf1073f9b77c2
+	.quad	0xc08627ba6d5553d8
+	.quad	0xbe1cee694f97d5a4
+	.quad	0xc08627bcb0565500
+	.quad	0xbe1cf0456b8239d7
+	.quad	0xc08627bef2b3d2b0
+	.quad	0xbe1cf211497127e3
+	.quad	0xc08627c1346e2930
+	.quad	0xbe1cf01856c0384d
+	.quad	0xc08627c37585b468
+	.quad	0xbe1cefa7dd05479e
+	.quad	0xc08627c5b5fad000
+	.quad	0xbe1cef3ae8e50b93
+	.quad	0xc08627c7f5cdd750
+	.quad	0xbe1ceea5f32fdd3a
+	.quad	0xc08627ca34ff2560
+	.quad	0xbe1cef424caeb8d9
+	.quad	0xc08627cc738f14f0
+	.quad	0xbe1cf0194d07a81f
+	.quad	0xc08627ceb17e0070
+	.quad	0xbe1cf20f452000c1
+	.quad	0xc08627d0eecc4210
+	.quad	0xbe1cf00e356218e4
+	.quad	0xc08627d32b7a33a0
+	.quad	0xbe1cef30484b4bcb
+	.quad	0xc08627d567882eb0
+	.quad	0xbe1ceeea11a6641b
+	.quad	0xc08627d7a2f68c80
+	.quad	0xbe1cf13492d5bd7b
+	.quad	0xc08627d9ddc5a618
+	.quad	0xbe1ceeb7048fad96
+	.quad	0xc08627dc17f5d418
+	.quad	0xbe1ceef0666f0477
+	.quad	0xc08627de51876ee8
+	.quad	0xbe1cf060d4b8b5c2
+	.quad	0xc08627e08a7acea8
+	.quad	0xbe1cf0b2a4b6ff8c
+	.quad	0xc08627e2c2d04b28
+	.quad	0xbe1cf0e34809a875
+	.quad	0xc08627e4fa883bf0
+	.quad	0xbe1cf16bf74a3522
+	.quad	0xc08627e731a2f848
+	.quad	0xbe1cee6a24623d57
+	.quad	0xc08627e96820d718
+	.quad	0xbe1cefc7b4f1528e
+	.quad	0xc08627eb9e022f18
+	.quad	0xbe1cf163051f3548
+	.quad	0xc08627edd34756b8
+	.quad	0xbe1cef36b3366305
+	.quad	0xc08627f007f0a408
+	.quad	0xbe1cf18134625550
+	.quad	0xc08627f23bfe6cf0
+	.quad	0xbe1cf0ec32ec1a11
+	.quad	0xc08627f46f710700
+	.quad	0xbe1ceeb3b64f3edc
+	.quad	0xc08627f6a248c778
+	.quad	0xbe1cf0cd15805bc8
+	.quad	0xc08627f8d4860368
+	.quad	0xbe1cf20db3bddebe
+	.quad	0xc08627fb06290f90
+	.quad	0xbe1cf25188430e25
+	.quad	0xc08627fd37324070
+	.quad	0xbe1ceea1713490f9
+	.quad	0xc08627ff67a1ea28
+	.quad	0xbe1cf159521d234c
+	.quad	0xc0862801977860b8
+	.quad	0xbe1cf24dfe50783b
+	.quad	0xc0862803c6b5f7d0
+	.quad	0xbe1ceef2ef89a60b
+	.quad	0xc0862805f55b02c8
+	.quad	0xbe1cee7fc919d62c
+	.quad	0xc08628082367d4c0
+	.quad	0xbe1cf215a7fb513a
+	.quad	0xc086280a50dcc0a8
+	.quad	0xbe1cf0e4401c5ed4
+	.quad	0xc086280c7dba1910
+	.quad	0xbe1cf04ec734d256
+	.quad	0xc086280eaa003050
+	.quad	0xbe1cf010ad787fea
+	.quad	0xc0862810d5af5880
+	.quad	0xbe1cee622478393d
+	.quad	0xc086281300c7e368
+	.quad	0xbe1cf01c7482564f
+	.quad	0xc08628152b4a22a0
+	.quad	0xbe1cf0de20d33536
+	.quad	0xc086281755366778
+	.quad	0xbe1cef2edae5837d
+	.quad	0xc08628197e8d02f0
+	.quad	0xbe1cf0a345318cc9
+	.quad	0xc086281ba74e45d8
+	.quad	0xbe1cf20085aa34b8
+	.quad	0xc086281dcf7a80c0
+	.quad	0xbe1cef5fa845ad83
+	.quad	0xc086281ff71203e0
+	.quad	0xbe1cf050d1df69c4
+	.quad	0xc08628221e151f48
+	.quad	0xbe1ceffe43c035b9
+	.quad	0xc0862824448422b8
+	.quad	0xbe1cf14f3018d3c2
+	.quad	0xc08628266a5f5dc0
+	.quad	0xbe1cef0a5fbae83d
+	.quad	0xc08628288fa71f98
+	.quad	0xbe1ceff8a95b72a1
+	.quad	0xc086282ab45bb750
+	.quad	0xbe1cef073aa9849b
+	.quad	0xc086282cd87d73a8
+	.quad	0xbe1cef69b3835c02
+	.quad	0xc086282efc0ca328
+	.quad	0xbe1cf0bc139379a9
+	.quad	0xc08628311f099420
+	.quad	0xbe1cef247a9ec596
+	.quad	0xc086283341749490
+	.quad	0xbe1cef74bbcc488a
+	.quad	0xc0862835634df248
+	.quad	0xbe1cef4bc42e7b8e
+	.quad	0xc08628378495fad0
+	.quad	0xbe1cf136d4d5a810
+	.quad	0xc0862839a54cfb80
+	.quad	0xbe1cf0d290b24dd8
+	.quad	0xc086283bc5734168
+	.quad	0xbe1ceeebde8e0065
+	.quad	0xc086283de5091950
+	.quad	0xbe1cf1a09f60aa1e
+	.quad	0xc0862840040ecfe0
+	.quad	0xbe1cf0803947a234
+	.quad	0xc08628422284b168
+	.quad	0xbe1cf0abf7638127
+	.quad	0xc0862844406b0a08
+	.quad	0xbe1cf0f73ee12058
+	.quad	0xc08628465dc225a0
+	.quad	0xbe1cf2079971b26c
+	.quad	0xc08628487a8a4fe0
+	.quad	0xbe1cee74957564b1
+	.quad	0xc086284a96c3d420
+	.quad	0xbe1ceee77c1b7d43
+	.quad	0xc086284cb26efd90
+	.quad	0xbe1cf23addba6e09
+	.quad	0xc086284ecd8c1730
+	.quad	0xbe1cf199f4a1da60
+	.quad	0xc0862850e81b6bb0
+	.quad	0xbe1cf09fdea81393
+	.quad	0xc0862853021d4588
+	.quad	0xbe1cf176adb417f7
+	.quad	0xc08628551b91ef00
+	.quad	0xbe1cf0f64f84a8da
+	.quad	0xc08628573479b220
+	.quad	0xbe1ceec34cf49523
+	.quad	0xc08628594cd4d8a8
+	.quad	0xbe1cf16d60fbe0bb
+	.quad	0xc086285b64a3ac40
+	.quad	0xbe1cee8de7acfc7b
+	.quad	0xc086285d7be67630
+	.quad	0xbe1ceee6256cce8d
+	.quad	0xc086285f929d7fa0
+	.quad	0xbe1cee7d66a3d8a5
+	.quad	0xc0862861a8c91170
+	.quad	0xbe1cf0bef8265792
+	.quad	0xc0862863be697458
+	.quad	0xbe1cf097f890c6f8
+	.quad	0xc0862865d37ef0c8
+	.quad	0xbe1cf09502d5c3fc
+	.quad	0xc0862867e809cf00
+	.quad	0xbe1ceeffb239dac7
+	.quad	0xc0862869fc0a56f8
+	.quad	0xbe1cf1fbfff95c98
+	.quad	0xc086286c0f80d090
+	.quad	0xbe1cefa57ad3eef7
+	.quad	0xc086286e226d8348
+	.quad	0xbe1cf22c58b9183d
+	.quad	0xc086287034d0b690
+	.quad	0xbe1ceff262d0a248
+	.quad	0xc086287246aab180
+	.quad	0xbe1cefa7bc194186
+	.quad	0xc086287457fbbb08
+	.quad	0xbe1cf06782d784d9
+	.quad	0xc086287668c419e0
+	.quad	0xbe1cf1d44d0eaa07
+	.quad	0xc086287879041490
+	.quad	0xbe1cf034803c8a48
+	.quad	0xc086287a88bbf158
+	.quad	0xbe1cf08e84916b6f
+	.quad	0xc086287c97ebf650
+	.quad	0xbe1cf0c4d3dc1bc7
+	.quad	0xc086287ea6946958
+	.quad	0xbe1cefb1e4625943
+	.quad	0xc0862880b4b59010
+	.quad	0xbe1cf143efdd1fd0
+	.quad	0xc0862882c24faff8
+	.quad	0xbe1cee9896d016da
+	.quad	0xc0862884cf630e38
+	.quad	0xbe1cf2186072f2cc
+	.quad	0xc0862886dbefeff0
+	.quad	0xbe1cef9217633d34
+	.quad	0xc0862888e7f699e0
+	.quad	0xbe1cf05603549486
+	.quad	0xc086288af37750b0
+	.quad	0xbe1cef50fff513d3
+	.quad	0xc086288cfe7258c0
+	.quad	0xbe1cf127713b32d0
+	.quad	0xc086288f08e7f650
+	.quad	0xbe1cf05015520f3d
+	.quad	0xc086289112d86d58
+	.quad	0xbe1cf12eb458b26f
+	.quad	0xc08628931c4401a8
+	.quad	0xbe1cf22eae2887ed
+	.quad	0xc0862895252af6e0
+	.quad	0xbe1cefdd6656dd2d
+	.quad	0xc08628972d8d9058
+	.quad	0xbe1cf1048ea4e646
+	.quad	0xc0862899356c1150
+	.quad	0xbe1ceec4501167e9
+	.quad	0xc086289b3cc6bcb8
+	.quad	0xbe1cf0ad52becc3f
+	.quad	0xc086289d439dd568
+	.quad	0xbe1cf0daa4e00e35
+	.quad	0xc086289f49f19df8
+	.quad	0xbe1cf00b80de8d6a
+	.quad	0xc08628a14fc258c8
+	.quad	0xbe1cf1bcf2ea8464
+	.quad	0xc08628a355104818
+	.quad	0xbe1cf0435e2782b0
+	.quad	0xc08628a559dbade0
+	.quad	0xbe1cf0e3e1a5f56c
+	.quad	0xc08628a75e24cbf8
+	.quad	0xbe1cefed9d5a721d
+	.quad	0xc08628a961ebe3f8
+	.quad	0xbe1cf0d2d74321e2
+	.quad	0xc08628ab65313750
+	.quad	0xbe1cf24200eb55e9
+	.quad	0xc08628ad67f50740
+	.quad	0xbe1cf23e9d7cf979
+	.quad	0xc08628af6a3794d0
+	.quad	0xbe1cf23a088f421c
+	.quad	0xc08628b16bf920e0
+	.quad	0xbe1cef2c1de1ab32
+	.quad	0xc08628b36d39ec08
+	.quad	0xbe1cf1abc231f7b2
+	.quad	0xc08628b56dfa36d0
+	.quad	0xbe1cf2074d5ba303
+	.quad	0xc08628b76e3a4180
+	.quad	0xbe1cf05cd5eed880
+	.rept	48
+	.byte	0
+	.endr
+
+/* Log(2) lookup table for logarithmic part */
+.if .-__svml_spow_data != _Log_LA_table
+.err
+.endif
+	.quad	0x8000000000000000
+	.quad	0xbf5ff802a9ab10e6
+	.quad	0xbf6ff00aa2b10bc0
+	.quad	0xbf77ee11ebd82e94
+	.quad	0xbf7fe02a6b106789
+	.quad	0xbf83e7295d25a7d9
+	.quad	0xbf87dc475f810a77
+	.quad	0xbf8bcf712c74384c
+	.quad	0xbf8fc0a8b0fc03e4
+	.quad	0xbf91d7f7eb9eebe7
+	.quad	0xbf93cea44346a575
+	.quad	0xbf95c45a51b8d389
+	.quad	0xbf97b91b07d5b11b
+	.quad	0xbf99ace7551cc514
+	.quad	0xbf9b9fc027af9198
+	.quad	0xbf9d91a66c543cc4
+	.quad	0xbf9f829b0e783300
+	.quad	0xbfa0b94f7c196176
+	.quad	0xbfa1b0d98923d980
+	.quad	0xbfa2a7ec2214e873
+	.quad	0xbfa39e87b9febd60
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+	.quad	0x3faeea31c006b87c
+	.quad	0x3fae624c4a0b5e1b
+	.quad	0x3fadda8adc67ee4e
+	.quad	0x3fad52ed6405d86f
+	.quad	0x3faccb73cdddb2cc
+	.quad	0x3fac441e06f72a9e
+	.quad	0x3fabbcebfc68f420
+	.quad	0x3fab35dd9b58baad
+	.quad	0x3faaaef2d0fb10fc
+	.quad	0x3faa282b8a936171
+	.quad	0x3fa9a187b573de7c
+	.quad	0x3fa91b073efd7314
+	.quad	0x3fa894aa149fb343
+	.quad	0x3fa80e7023d8ccc4
+	.quad	0x3fa788595a3577ba
+	.quad	0x3fa70265a550e777
+	.quad	0x3fa67c94f2d4bb58
+	.quad	0x3fa5f6e73078efb8
+	.quad	0x3fa5715c4c03ceef
+	.quad	0x3fa4ebf43349e26f
+	.quad	0x3fa466aed42de3ea
+	.quad	0x3fa3e18c1ca0ae92
+	.quad	0x3fa35c8bfaa1306b
+	.quad	0x3fa2d7ae5c3c5bae
+	.quad	0x3fa252f32f8d183f
+	.quad	0x3fa1ce5a62bc353a
+	.quad	0x3fa149e3e4005a8d
+	.quad	0x3fa0c58fa19dfaaa
+	.quad	0x3fa0415d89e74444
+	.quad	0x3f9f7a9b16782856
+	.quad	0x3f9e72bf2813ce51
+	.quad	0x3f9d6b2725979802
+	.quad	0x3f9c63d2ec14aaf2
+	.quad	0x3f9b5cc258b718e6
+	.quad	0x3f9a55f548c5c43f
+	.quad	0x3f994f6b99a24475
+	.quad	0x3f98492528c8cabf
+	.quad	0x3f974321d3d006d3
+	.quad	0x3f963d6178690bd6
+	.quad	0x3f9537e3f45f3565
+	.quad	0x3f9432a925980cc1
+	.quad	0x3f932db0ea132e22
+	.quad	0x3f9228fb1fea2e28
+	.quad	0x3f912487a5507f70
+	.quad	0x3f90205658935847
+	.quad	0x3f8e38ce3033310c
+	.quad	0x3f8c317384c75f06
+	.quad	0x3f8a2a9c6c170462
+	.quad	0x3f882448a388a2aa
+	.quad	0x3f861e77e8b53fc6
+	.quad	0x3f841929f96832f0
+	.quad	0x3f82145e939ef1e9
+	.quad	0x3f8010157588de71
+	.quad	0x3f7c189cbb0e27fb
+	.quad	0x3f78121214586b54
+	.quad	0x3f740c8a747878e2
+	.quad	0x3f70080559588b35
+	.quad	0x3f680904828985c0
+	.quad	0x3f60040155d5889e
+	.quad	0x3f50020055655889
+	.quad	0x0000000000000000
+	.rept	56
+	.byte	0
+	.endr
+
+/* Polynomial coefficients for log part:
+ * coeff4 */
+double_vector _poly_coeff_1 0x3fc9999cacdb4d0a
+
+/* coeff3 */
+double_vector _poly_coeff_2 0xbfd0000148058ee1
+
+/* coeff2 */
+double_vector _poly_coeff_3 0x3fd55555555543c5
+
+/* coeff1 */
+double_vector _poly_coeff_4 0xbfdffffffffff81f
+
+/* General purpose constants for log part: ExpMask */
+double_vector _ExpMask 0x000fffffffffffff
+
+/* Two10 */
+double_vector _Two10 0x3f50000000000000
+
+/* MinNorm */
+double_vector _MinNorm 0x0010000000000000
+
+/* MaxNorm */
+double_vector _MaxNorm 0x7fefffffffffffff
+
+/* HalfMask */
+double_vector _HalfMask 0xfffffffffc000000
+
+/* One */
+double_vector _One 0x3ff0000000000000
+
+/* L2H */
+double_vector _L2H 0x3fe62e42fefa0000
+
+/* L2L */
+double_vector _L2L 0x3d7cf79abc9e0000
+
+/* Threshold */
+double_vector _Threshold 0x4086a00000000000
+
+/* Bias */
+double_vector _Bias 0x408ff80000000000
+
+/* Bias1 */
+double_vector _Bias1 0x408ff00000000000
+
+/* L2L */
+double_vector _L2 0x3fe62e42fefa39ef
+
+/* dInfs = DP infinity, +/- == */
+.if .-__svml_spow_data != _dInfs
+.err
+.endif
+	.quad	0x7ff0000000000000
+	.quad	0xfff0000000000000
+	.rept	48
+	.byte	0
+	.endr
+
+/* dOnes = DP one, +/- == */
+.if .-__svml_spow_data != _dOnes
+.err
+.endif
+	.quad	0x3ff0000000000000
+	.quad	0xbff0000000000000
+	.rept	48
+	.byte	0
+	.endr
+
+/* dZeros = DP zero +/- == */
+.if .-__svml_spow_data != _dZeros
+.err
+.endif
+	.quad	0x0000000000000000
+	.quad	0x8000000000000000
+	.rept	48
+	.byte	0
+	.endr
+.if .-__svml_spow_data != __dbT
+.err
+.endif
+	.quad	0x3feffffffc27dd9e
+	.quad	0x3ff00162f1a4047d
+	.quad	0x3ff002c603f68252
+	.quad	0x3ff00429350e12af
+	.quad	0x3ff0058c84ed6032
+	.quad	0x3ff006eff39715b2
+	.quad	0x3ff00853810dde41
+	.quad	0x3ff009b72d54652f
+	.quad	0x3ff00b1af86d5604
+	.quad	0x3ff00c7ee25b5c86
+	.quad	0x3ff00de2eb2124b3
+	.quad	0x3ff00f4712c15ac8
+	.quad	0x3ff010ab593eab39
+	.quad	0x3ff0120fbe9bc2ba
+	.quad	0x3ff0137442db4e38
+	.quad	0x3ff014d8e5fffada
+	.quad	0x3ff0163da80c7604
+	.quad	0x3ff017a289036d56
+	.quad	0x3ff0190788e78eab
+	.quad	0x3ff01a6ca7bb8818
+	.quad	0x3ff01bd1e58207ef
+	.quad	0x3ff01d37423dbcbc
+	.quad	0x3ff01e9cbdf15549
+	.quad	0x3ff02002589f8099
+	.quad	0x3ff02168124aedec
+	.quad	0x3ff022cdeaf64cbc
+	.quad	0x3ff02433e2a44cc1
+	.quad	0x3ff02599f9579ded
+	.quad	0x3ff027002f12f06d
+	.quad	0x3ff0286683d8f4ac
+	.quad	0x3ff029ccf7ac5b4d
+	.quad	0x3ff02b338a8fd532
+	.quad	0x3ff02c9a3c861379
+	.quad	0x3ff02e010d91c778
+	.quad	0x3ff02f67fdb5a2c4
+	.quad	0x3ff030cf0cf4572d
+	.quad	0x3ff032363b5096bc
+	.quad	0x3ff0339d88cd13bc
+	.quad	0x3ff03504f56c80ae
+	.quad	0x3ff0366c81319053
+	.quad	0x3ff037d42c1ef5a2
+	.quad	0x3ff0393bf63763d5
+	.quad	0x3ff03aa3df7d8e5f
+	.quad	0x3ff03c0be7f428eb
+	.quad	0x3ff03d740f9de766
+	.quad	0x3ff03edc567d7df7
+	.quad	0x3ff04044bc95a0fe
+	.quad	0x3ff041ad41e9051d
+	.quad	0x3ff04315e67a5f2a
+	.quad	0x3ff0447eaa4c643e
+	.quad	0x3ff045e78d61c9ac
+	.quad	0x3ff047508fbd4502
+	.quad	0x3ff048b9b1618c0b
+	.quad	0x3ff04a22f25154cd
+	.quad	0x3ff04b8c528f558b
+	.quad	0x3ff04cf5d21e44c4
+	.quad	0x3ff04e5f7100d935
+	.quad	0x3ff04fc92f39c9d4
+	.quad	0x3ff051330ccbcdd5
+	.quad	0x3ff0529d09b99ca8
+	.quad	0x3ff054072605edfb
+	.quad	0x3ff0557161b379b3
+	.quad	0x3ff056dbbcc4f7f8
+	.quad	0x3ff05846373d212a
+	.quad	0x3ff059b0d11eade5
+	.quad	0x3ff05b1b8a6c5706
+	.quad	0x3ff05c866328d5a2
+	.quad	0x3ff05df15b56e30a
+	.quad	0x3ff05f5c72f938cf
+	.quad	0x3ff060c7aa1290bd
+	.quad	0x3ff0623300a5a4db
+	.quad	0x3ff0639e76b52f6e
+	.quad	0x3ff0650a0c43eaf6
+	.quad	0x3ff06675c1549232
+	.quad	0x3ff067e195e9e01a
+	.quad	0x3ff0694d8a068fe7
+	.quad	0x3ff06ab99dad5d0c
+	.quad	0x3ff06c25d0e10338
+	.quad	0x3ff06d9223a43e58
+	.quad	0x3ff06efe95f9ca95
+	.quad	0x3ff0706b27e46455
+	.quad	0x3ff071d7d966c83a
+	.quad	0x3ff07344aa83b324
+	.quad	0x3ff074b19b3de22f
+	.quad	0x3ff0761eab9812b4
+	.quad	0x3ff0778bdb950247
+	.quad	0x3ff078f92b376ebc
+	.quad	0x3ff07a669a821621
+	.quad	0x3ff07bd42977b6c4
+	.quad	0x3ff07d41d81b0f2b
+	.quad	0x3ff07eafa66ede1e
+	.quad	0x3ff0801d9475e2a0
+	.quad	0x3ff0818ba232dbee
+	.quad	0x3ff082f9cfa88985
+	.quad	0x3ff084681cd9ab21
+	.quad	0x3ff085d689c900b6
+	.quad	0x3ff0874516794a79
+	.quad	0x3ff088b3c2ed48d9
+	.quad	0x3ff08a228f27bc86
+	.quad	0x3ff08b917b2b6667
+	.quad	0x3ff08d0086fb07a6
+	.quad	0x3ff08e6fb29961a8
+	.quad	0x3ff08fdefe09360d
+	.quad	0x3ff0914e694d46b6
+	.quad	0x3ff092bdf46855c0
+	.quad	0x3ff0942d9f5d2582
+	.quad	0x3ff0959d6a2e7893
+	.quad	0x3ff0970d54df11c8
+	.quad	0x3ff0987d5f71b432
+	.quad	0x3ff099ed89e9231e
+	.quad	0x3ff09b5dd448221a
+	.quad	0x3ff09cce3e9174ec
+	.quad	0x3ff09e3ec8c7df9d
+	.quad	0x3ff09faf72ee2670
+	.quad	0x3ff0a1203d070de5
+	.quad	0x3ff0a29127155abd
+	.quad	0x3ff0a402311bd1f0
+	.quad	0x3ff0a5735b1d38bb
+	.quad	0x3ff0a6e4a51c5493
+	.quad	0x3ff0a8560f1beb2c
+	.quad	0x3ff0a9c7991ec278
+	.quad	0x3ff0ab394327a0a7
+	.quad	0x3ff0acab0d394c25
+	.quad	0x3ff0ae1cf7568b9d
+	.quad	0x3ff0af8f018225f7
+	.quad	0x3ff0b1012bbee259
+	.quad	0x3ff0b273760f8825
+	.quad	0x3ff0b3e5e076defc
+	.quad	0x3ff0b5586af7aebc
+	.quad	0x3ff0b6cb1594bf84
+	.quad	0x3ff0b83de050d9ab
+	.quad	0x3ff0b9b0cb2ec5ca
+	.quad	0x3ff0bb23d6314cb7
+	.quad	0x3ff0bc97015b3783
+	.quad	0x3ff0be0a4caf4f81
+	.quad	0x3ff0bf7db8305e3f
+	.quad	0x3ff0c0f143e12d8a
+	.quad	0x3ff0c264efc4876c
+	.quad	0x3ff0c3d8bbdd362e
+	.quad	0x3ff0c54ca82e0455
+	.quad	0x3ff0c6c0b4b9bca6
+	.quad	0x3ff0c834e1832a24
+	.quad	0x3ff0c9a92e8d180e
+	.quad	0x3ff0cb1d9bda51e1
+	.quad	0x3ff0cc92296da35b
+	.quad	0x3ff0ce06d749d876
+	.quad	0x3ff0cf7ba571bd6a
+	.quad	0x3ff0d0f093e81eab
+	.quad	0x3ff0d265a2afc8f1
+	.quad	0x3ff0d3dad1cb892b
+	.quad	0x3ff0d550213e2c8c
+	.quad	0x3ff0d6c5910a8081
+	.quad	0x3ff0d83b213352b8
+	.quad	0x3ff0d9b0d1bb711b
+	.quad	0x3ff0db26a2a5a9d4
+	.quad	0x3ff0dc9c93f4cb4a
+	.quad	0x3ff0de12a5aba423
+	.quad	0x3ff0df88d7cd0344
+	.quad	0x3ff0e0ff2a5bb7cd
+	.quad	0x3ff0e2759d5a9121
+	.quad	0x3ff0e3ec30cc5edd
+	.quad	0x3ff0e562e4b3f0df
+	.quad	0x3ff0e6d9b9141745
+	.quad	0x3ff0e850adefa265
+	.quad	0x3ff0e9c7c34962db
+	.quad	0x3ff0eb3ef924297d
+	.quad	0x3ff0ecb64f82c75e
+	.quad	0x3ff0ee2dc6680dd6
+	.quad	0x3ff0efa55dd6ce75
+	.quad	0x3ff0f11d15d1db0c
+	.quad	0x3ff0f294ee5c05ab
+	.quad	0x3ff0f40ce77820a2
+	.quad	0x3ff0f5850128fe7a
+	.quad	0x3ff0f6fd3b717200
+	.quad	0x3ff0f87596544e3f
+	.quad	0x3ff0f9ee11d4667f
+	.quad	0x3ff0fb66adf48e46
+	.quad	0x3ff0fcdf6ab7995c
+	.quad	0x3ff0fe5848205bc4
+	.quad	0x3ff0ffd14631a9c2
+	.quad	0x3ff1014a64ee57d9
+	.quad	0x3ff102c3a4593ac9
+	.quad	0x3ff1043d04752792
+	.quad	0x3ff105b68544f373
+	.quad	0x3ff1073026cb73e9
+	.quad	0x3ff108a9e90b7eb2
+	.quad	0x3ff10a23cc07e9c6
+	.quad	0x3ff10b9dcfc38b63
+	.quad	0x3ff10d17f44139fe
+	.quad	0x3ff10e923983cc53
+	.quad	0x3ff1100c9f8e1955
+	.quad	0x3ff111872662f83e
+	.quad	0x3ff11301ce054081
+	.quad	0x3ff1147c9677c9d2
+	.quad	0x3ff115f77fbd6c23
+	.quad	0x3ff1177289d8ffa9
+	.quad	0x3ff118edb4cd5cd4
+	.quad	0x3ff11a69009d5c54
+	.quad	0x3ff11be46d4bd71a
+	.quad	0x3ff11d5ffadba653
+	.quad	0x3ff11edba94fa36e
+	.quad	0x3ff1205778aaa817
+	.quad	0x3ff121d368ef8e3b
+	.quad	0x3ff1234f7a213008
+	.quad	0x3ff124cbac4267e5
+	.quad	0x3ff12647ff56107f
+	.quad	0x3ff127c4735f04bd
+	.quad	0x3ff1294108601fcb
+	.quad	0x3ff12abdbe5c3d0f
+	.quad	0x3ff12c3a95563832
+	.quad	0x3ff12db78d50ed19
+	.quad	0x3ff12f34a64f37ed
+	.quad	0x3ff130b1e053f513
+	.quad	0x3ff1322f3b62012e
+	.quad	0x3ff133acb77c3927
+	.quad	0x3ff1352a54a57a1f
+	.quad	0x3ff136a812e0a17c
+	.quad	0x3ff13825f2308ce0
+	.quad	0x3ff139a3f2981a2e
+	.quad	0x3ff13b22141a278a
+	.quad	0x3ff13ca056b99356
+	.quad	0x3ff13e1eba793c33
+	.quad	0x3ff13f9d3f5c0103
+	.quad	0x3ff1411be564c0e7
+	.quad	0x3ff1429aac965b40
+	.quad	0x3ff1441994f3afae
+	.quad	0x3ff145989e7f9e13
+	.quad	0x3ff14717c93d068e
+	.quad	0x3ff14897152ec980
+	.quad	0x3ff14a168257c787
+	.quad	0x3ff14b9610bae185
+	.quad	0x3ff14d15c05af897
+	.quad	0x3ff14e95913aee1e
+	.quad	0x3ff15015835da3b8
+	.quad	0x3ff1519596c5fb46
+	.quad	0x3ff15315cb76d6e5
+	.quad	0x3ff15496217318f6
+	.quad	0x3ff1561698bda417
+	.quad	0x3ff1579731595b27
+	.quad	0x3ff15917eb492145
+	.quad	0x3ff15a98c68fd9d1
+	.quad	0x3ff15c19c330686b
+	.quad	0x3ff15d9ae12db0ef
+	.quad	0x3ff15f1c208a977f
+	.quad	0x3ff1609d814a007b
+	.quad	0x3ff1621f036ed081
+	.quad	0x3ff163a0a6fbec71
+	.quad	0x3ff165226bf4396d
+	.quad	0x3ff166a4525a9cd3
+	.quad	0x3ff168265a31fc44
+	.quad	0x3ff169a8837d3da3
+	.quad	0x3ff16b2ace3f4710
+	.quad	0x3ff16cad3a7afeeb
+	.quad	0x3ff16e2fc8334bd8
+	.quad	0x3ff16fb2776b14b8
+	.quad	0x3ff17135482540ad
+	.quad	0x3ff172b83a64b71a
+	.quad	0x3ff1743b4e2c5fa4
+	.quad	0x3ff175be837f222d
+	.quad	0x3ff17741da5fe6da
+	.quad	0x3ff178c552d1960f
+	.quad	0x3ff17a48ecd71873
+	.quad	0x3ff17bcca87356e9
+	.quad	0x3ff17d5085a93a9b
+	.quad	0x3ff17ed4847bacec
+	.quad	0x3ff18058a4ed9787
+	.quad	0x3ff181dce701e451
+	.quad	0x3ff183614abb7d75
+	.quad	0x3ff184e5d01d4d5b
+	.quad	0x3ff1866a772a3ead
+	.quad	0x3ff187ef3fe53c58
+	.quad	0x3ff189742a513185
+	.quad	0x3ff18af9367109a1
+	.quad	0x3ff18c7e6447b059
+	.quad	0x3ff18e03b3d8119c
+	.quad	0x3ff18f8925251997
+	.quad	0x3ff1910eb831b4ba
+	.quad	0x3ff192946d00cfb6
+	.quad	0x3ff1941a4395577c
+	.quad	0x3ff195a03bf2393e
+	.quad	0x3ff19726561a626d
+	.quad	0x3ff198ac9210c0c1
+	.quad	0x3ff19a32efd8422c
+	.quad	0x3ff19bb96f73d4e5
+	.quad	0x3ff19d4010e66763
+	.quad	0x3ff19ec6d432e85c
+	.quad	0x3ff1a04db95c46cc
+	.quad	0x3ff1a1d4c06571ed
+	.quad	0x3ff1a35be9515937
+	.quad	0x3ff1a4e33422ec69
+	.quad	0x3ff1a66aa0dd1b81
+	.quad	0x3ff1a7f22f82d6bc
+	.quad	0x3ff1a979e0170e9a
+	.quad	0x3ff1ab01b29cb3dd
+	.quad	0x3ff1ac89a716b786
+	.quad	0x3ff1ae11bd880ada
+	.quad	0x3ff1af99f5f39f5d
+	.quad	0x3ff1b122505c66d5
+	.quad	0x3ff1b2aaccc5534b
+	.quad	0x3ff1b4336b315705
+	.quad	0x3ff1b5bc2ba3648e
+	.quad	0x3ff1b7450e1e6eb3
+	.quad	0x3ff1b8ce12a56880
+	.quad	0x3ff1ba57393b4544
+	.quad	0x3ff1bbe081e2f88e
+	.quad	0x3ff1bd69ec9f762f
+	.quad	0x3ff1bef37973b23b
+	.quad	0x3ff1c07d2862a105
+	.quad	0x3ff1c206f96f3724
+	.quad	0x3ff1c390ec9c696f
+	.quad	0x3ff1c51b01ed2cfe
+	.quad	0x3ff1c6a53964772e
+	.quad	0x3ff1c82f93053d99
+	.quad	0x3ff1c9ba0ed2761e
+	.quad	0x3ff1cb44accf16dc
+	.quad	0x3ff1cccf6cfe1634
+	.quad	0x3ff1ce5a4f626acb
+	.quad	0x3ff1cfe553ff0b83
+	.quad	0x3ff1d1707ad6ef85
+	.quad	0x3ff1d2fbc3ed0e37
+	.quad	0x3ff1d4872f445f44
+	.quad	0x3ff1d612bcdfda99
+	.quad	0x3ff1d79e6cc27863
+	.quad	0x3ff1d92a3eef3111
+	.quad	0x3ff1dab63368fd56
+	.quad	0x3ff1dc424a32d624
+	.quad	0x3ff1ddce834fb4b0
+	.quad	0x3ff1df5adec29273
+	.quad	0x3ff1e0e75c8e6927
+	.quad	0x3ff1e273fcb632c5
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+	.quad	0x3fffef619c219f69
+	.quad	0x3ffff2261294c314
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+	.quad	0x3ffff7afb7aef4b0
+	.quad	0x3ffffa74e660a715
+	.quad	0x3ffffd3a52872e44
+	.quad	0x3ffffffffc27dd9e
+	.rept	56
+	.byte	0
+	.endr
+
+/* Other general purpose constants:
+ * _dbInvLn2 */
+double_vector __dbInvLn2 0x40a71547652b82fe
+
+/* _dbShifter */
+double_vector __dbShifter 0x4338000000000000
+
+/* _dbHALF */
+double_vector __dbHALF 0x3fe0000000000000
+
+/* _dbC1 = 2^(1/2^K)-1 */
+double_vector __dbC1 0x3f362f3904051fa1
+
+/* _lbLOWKBITS = 2^K-1 */
+double_vector __lbLOWKBITS 0x00000000000007ff
+
+/* _iAbsMask */
+float_vector __iAbsMask 0x7fffffff
+
+/* _iDomainRange */
+float_vector __iDomainRange 0x4059fe36
+	.type	__svml_spow_data,@object
+	.size __svml_spow_data,.-__svml_spow_data
diff --git a/sysdeps/x86_64/fpu/svml_s_powf_data.h b/sysdeps/x86_64/fpu/svml_s_powf_data.h
new file mode 100644
index 0000000000..d847368e4b
--- /dev/null
+++ b/sysdeps/x86_64/fpu/svml_s_powf_data.h
@@ -0,0 +1,76 @@
+/* Offsets for data table for function powf.
+   Copyright (C) 2014-2015 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifndef S_POWF_DATA_H
+#define S_POWF_DATA_H
+
+#define _Log2Rcp_lookup                -4218496
+#define _NMINNORM                     	0
+#define _NMAXVAL                      	64
+#define _INF                          	128
+#define _ABSMASK                      	192
+#define _DOMAINRANGE                  	256
+#define _Log_HA_table                 	320
+#define _Log_LA_table                 	8576
+#define _poly_coeff_1                 	12736
+#define _poly_coeff_2                 	12800
+#define _poly_coeff_3                 	12864
+#define _poly_coeff_4                 	12928
+#define _ExpMask                      	12992
+#define _Two10                        	13056
+#define _MinNorm                      	13120
+#define _MaxNorm                      	13184
+#define _HalfMask                     	13248
+#define _One                          	13312
+#define _L2H                          	13376
+#define _L2L                          	13440
+#define _Threshold                    	13504
+#define _Bias                         	13568
+#define _Bias1                        	13632
+#define _L2                           	13696
+#define _dInfs                        	13760
+#define _dOnes                        	13824
+#define _dZeros                       	13888
+#define __dbT                         	13952
+#define __dbInvLn2                    	30400
+#define __dbShifter                   	30464
+#define __dbHALF                      	30528
+#define __dbC1                        	30592
+#define __lbLOWKBITS                  	30656
+#define __iAbsMask                    	30720
+#define __iDomainRange                	30784
+
+.macro double_vector offset value
+.if .-__svml_spow_data != \offset
+.err
+.endif
+.rept 8
+.quad \value
+.endr
+.endm
+
+.macro float_vector offset value
+.if .-__svml_spow_data != \offset
+.err
+.endif
+.rept 16
+.long \value
+.endr
+.endm
+
+#endif
diff --git a/sysdeps/x86_64/fpu/svml_s_wrapper_impl.h b/sysdeps/x86_64/fpu/svml_s_wrapper_impl.h
index d5b62eea42..f88e30f054 100644
--- a/sysdeps/x86_64/fpu/svml_s_wrapper_impl.h
+++ b/sysdeps/x86_64/fpu/svml_s_wrapper_impl.h
@@ -44,6 +44,38 @@
         ret
 .endm
 
+/* 2 argument SSE2 ISA version as wrapper to scalar.  */
+.macro WRAPPER_IMPL_SSE2_ff callee
+        subq      $56, %rsp
+        cfi_adjust_cfa_offset(56)
+        movaps    %xmm0, (%rsp)
+        movaps    %xmm1, 16(%rsp)
+        call      \callee@PLT
+        movss     %xmm0, 32(%rsp)
+        movss     4(%rsp), %xmm0
+        movss     20(%rsp), %xmm1
+        call      \callee@PLT
+        movss     %xmm0, 36(%rsp)
+        movss     8(%rsp), %xmm0
+        movss     24(%rsp), %xmm1
+        call      \callee@PLT
+        movss     %xmm0, 40(%rsp)
+        movss     12(%rsp), %xmm0
+        movss     28(%rsp), %xmm1
+        call      \callee@PLT
+        movss     32(%rsp), %xmm3
+        movss     36(%rsp), %xmm2
+        movss     40(%rsp), %xmm1
+        movss     %xmm0, 44(%rsp)
+        unpcklps  %xmm1, %xmm3
+        unpcklps  %xmm0, %xmm2
+        unpcklps  %xmm2, %xmm3
+        movaps    %xmm3, %xmm0
+        addq      $56, %rsp
+        cfi_adjust_cfa_offset(-56)
+        ret
+.endm
+
 /* AVX/AVX2 ISA version as wrapper to SSE ISA version.  */
 .macro WRAPPER_IMPL_AVX callee
         pushq     	%rbp
@@ -70,6 +102,34 @@
         ret
 .endm
 
+/* 2 argument AVX/AVX2 ISA version as wrapper to SSE ISA version.  */
+.macro WRAPPER_IMPL_AVX_ff callee
+        pushq     %rbp
+        cfi_adjust_cfa_offset (8)
+        cfi_rel_offset (%rbp, 0)
+        movq      %rsp, %rbp
+        cfi_def_cfa_register (%rbp)
+        andq      $-32, %rsp
+        subq      $64, %rsp
+        vextractf128 $1, %ymm0, 16(%rsp)
+        vextractf128 $1, %ymm1, (%rsp)
+        vzeroupper
+        call      HIDDEN_JUMPTARGET(\callee)
+        vmovaps   %xmm0, 32(%rsp)
+        vmovaps   16(%rsp), %xmm0
+        vmovaps   (%rsp), %xmm1
+        call      HIDDEN_JUMPTARGET(\callee)
+        vmovaps   %xmm0, %xmm1
+        vmovaps   32(%rsp), %xmm0
+        vinsertf128 $1, %xmm1, %ymm0, %ymm0
+        movq      %rbp, %rsp
+        cfi_def_cfa_register (%rsp)
+        popq      %rbp
+        cfi_adjust_cfa_offset (-8)
+        cfi_restore (%rbp)
+        ret
+.endm
+
 /* AVX512 ISA version as wrapper to AVX2 ISA version.  */
 .macro WRAPPER_IMPL_AVX512 callee
         pushq	%rbp
@@ -109,3 +169,65 @@
         cfi_restore (%rbp)
         ret
 .endm
+
+/* 2 argument AVX512 ISA version as wrapper to AVX2 ISA version.  */
+.macro WRAPPER_IMPL_AVX512_ff callee
+        pushq     %rbp
+        cfi_adjust_cfa_offset (8)
+        cfi_rel_offset (%rbp, 0)
+        movq      %rsp, %rbp
+        cfi_def_cfa_register (%rbp)
+        andq      $-64, %rsp
+        subq      $128, %rsp
+/* Below is encoding for vmovaps %zmm0, (%rsp).  */
+        .byte	0x62
+        .byte	0xf1
+        .byte	0x7c
+        .byte	0x48
+        .byte	0x29
+        .byte	0x04
+        .byte	0x24
+/* Below is encoding for vmovaps %zmm1, 64(%rsp).  */
+        .byte	0x62
+        .byte	0xf1
+        .byte	0x7c
+        .byte	0x48
+        .byte	0x29
+        .byte	0x4c
+        .byte	0x24
+/* Below is encoding for vmovaps (%rsp), %ymm0.  */
+        .byte	0xc5
+        .byte	0xfc
+        .byte	0x28
+        .byte	0x04
+        .byte	0x24
+/* Below is encoding for vmovaps 64(%rsp), %ymm1.  */
+        .byte	0xc5
+        .byte	0xfc
+        .byte	0x28
+        .byte	0x4c
+        .byte	0x24
+        .byte	0x40
+        call      HIDDEN_JUMPTARGET(\callee)
+/* Below is encoding for vmovaps 32(%rsp), %ymm0.  */
+        .byte	0xc5
+        .byte	0xfc
+        .byte	0x28
+        .byte	0x44
+        .byte	0x24
+        .byte	0x20
+/* Below is encoding for vmovaps 96(%rsp), %ymm1.  */
+        .byte	0xc5
+        .byte	0xfc
+        .byte	0x28
+        .byte	0x4c
+        .byte	0x24
+        .byte	0x60
+        call      HIDDEN_JUMPTARGET(\callee)
+        movq      %rbp, %rsp
+        cfi_def_cfa_register (%rsp)
+        popq      %rbp
+        cfi_adjust_cfa_offset (-8)
+        cfi_restore (%rbp)
+        ret
+.endm
diff --git a/sysdeps/x86_64/fpu/test-float-vlen16-wrappers.c b/sysdeps/x86_64/fpu/test-float-vlen16-wrappers.c
index 19c249a4f0..00a1074f2c 100644
--- a/sysdeps/x86_64/fpu/test-float-vlen16-wrappers.c
+++ b/sysdeps/x86_64/fpu/test-float-vlen16-wrappers.c
@@ -26,3 +26,4 @@ VECTOR_WRAPPER (WRAPPER_NAME (cosf), _ZGVeN16v_cosf)
 VECTOR_WRAPPER (WRAPPER_NAME (sinf), _ZGVeN16v_sinf)
 VECTOR_WRAPPER (WRAPPER_NAME (logf), _ZGVeN16v_logf)
 VECTOR_WRAPPER (WRAPPER_NAME (expf), _ZGVeN16v_expf)
+VECTOR_WRAPPER_ff (WRAPPER_NAME (powf), _ZGVeN16vv_powf)
diff --git a/sysdeps/x86_64/fpu/test-float-vlen16.c b/sysdeps/x86_64/fpu/test-float-vlen16.c
index 09514c4f40..86b8c33632 100644
--- a/sysdeps/x86_64/fpu/test-float-vlen16.c
+++ b/sysdeps/x86_64/fpu/test-float-vlen16.c
@@ -22,6 +22,7 @@
 #define TEST_VECTOR_sinf 1
 #define TEST_VECTOR_logf 1
 #define TEST_VECTOR_expf 1
+#define TEST_VECTOR_powf 1
 
 #define REQUIRE_AVX512F
 
diff --git a/sysdeps/x86_64/fpu/test-float-vlen4-wrappers.c b/sysdeps/x86_64/fpu/test-float-vlen4-wrappers.c
index 55bd026f3b..7d41e46c4a 100644
--- a/sysdeps/x86_64/fpu/test-float-vlen4-wrappers.c
+++ b/sysdeps/x86_64/fpu/test-float-vlen4-wrappers.c
@@ -26,3 +26,4 @@ VECTOR_WRAPPER (WRAPPER_NAME (cosf), _ZGVbN4v_cosf)
 VECTOR_WRAPPER (WRAPPER_NAME (sinf), _ZGVbN4v_sinf)
 VECTOR_WRAPPER (WRAPPER_NAME (logf), _ZGVbN4v_logf)
 VECTOR_WRAPPER (WRAPPER_NAME (expf), _ZGVbN4v_expf)
+VECTOR_WRAPPER_ff (WRAPPER_NAME (powf), _ZGVbN4vv_powf)
diff --git a/sysdeps/x86_64/fpu/test-float-vlen4.c b/sysdeps/x86_64/fpu/test-float-vlen4.c
index df31593507..3e74118be0 100644
--- a/sysdeps/x86_64/fpu/test-float-vlen4.c
+++ b/sysdeps/x86_64/fpu/test-float-vlen4.c
@@ -22,5 +22,6 @@
 #define TEST_VECTOR_sinf 1
 #define TEST_VECTOR_logf 1
 #define TEST_VECTOR_expf 1
+#define TEST_VECTOR_powf 1
 
 #include "libm-test.c"
diff --git a/sysdeps/x86_64/fpu/test-float-vlen8-avx2-wrappers.c b/sysdeps/x86_64/fpu/test-float-vlen8-avx2-wrappers.c
index 637949b61c..ed1c893157 100644
--- a/sysdeps/x86_64/fpu/test-float-vlen8-avx2-wrappers.c
+++ b/sysdeps/x86_64/fpu/test-float-vlen8-avx2-wrappers.c
@@ -29,3 +29,4 @@ VECTOR_WRAPPER (WRAPPER_NAME (cosf), _ZGVdN8v_cosf)
 VECTOR_WRAPPER (WRAPPER_NAME (sinf), _ZGVdN8v_sinf)
 VECTOR_WRAPPER (WRAPPER_NAME (logf), _ZGVdN8v_logf)
 VECTOR_WRAPPER (WRAPPER_NAME (expf), _ZGVdN8v_expf)
+VECTOR_WRAPPER_ff (WRAPPER_NAME (powf), _ZGVdN8vv_powf)
diff --git a/sysdeps/x86_64/fpu/test-float-vlen8-avx2.c b/sysdeps/x86_64/fpu/test-float-vlen8-avx2.c
index e550f4d0c8..f0aaec17a5 100644
--- a/sysdeps/x86_64/fpu/test-float-vlen8-avx2.c
+++ b/sysdeps/x86_64/fpu/test-float-vlen8-avx2.c
@@ -25,6 +25,7 @@
 #define TEST_VECTOR_sinf 1
 #define TEST_VECTOR_logf 1
 #define TEST_VECTOR_expf 1
+#define TEST_VECTOR_powf 1
 
 #define REQUIRE_AVX2
 
diff --git a/sysdeps/x86_64/fpu/test-float-vlen8-wrappers.c b/sysdeps/x86_64/fpu/test-float-vlen8-wrappers.c
index 3b0a63d594..37bf7020f9 100644
--- a/sysdeps/x86_64/fpu/test-float-vlen8-wrappers.c
+++ b/sysdeps/x86_64/fpu/test-float-vlen8-wrappers.c
@@ -26,3 +26,4 @@ VECTOR_WRAPPER (WRAPPER_NAME (cosf), _ZGVcN8v_cosf)
 VECTOR_WRAPPER (WRAPPER_NAME (sinf), _ZGVcN8v_sinf)
 VECTOR_WRAPPER (WRAPPER_NAME (logf), _ZGVcN8v_logf)
 VECTOR_WRAPPER (WRAPPER_NAME (expf), _ZGVcN8v_expf)
+VECTOR_WRAPPER_ff (WRAPPER_NAME (powf), _ZGVcN8vv_powf)
diff --git a/sysdeps/x86_64/fpu/test-float-vlen8.c b/sysdeps/x86_64/fpu/test-float-vlen8.c
index db5b2e592b..ef2aedc845 100644
--- a/sysdeps/x86_64/fpu/test-float-vlen8.c
+++ b/sysdeps/x86_64/fpu/test-float-vlen8.c
@@ -22,5 +22,6 @@
 #define TEST_VECTOR_sinf 1
 #define TEST_VECTOR_logf 1
 #define TEST_VECTOR_expf 1
+#define TEST_VECTOR_powf 1
 
 #include "libm-test.c"