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author | Andrew Senkevich <andrew.senkevich@intel.com> | 2015-06-08 14:07:59 +0300 |
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committer | Andrew Senkevich <andrew.senkevich@intel.com> | 2015-06-08 14:07:59 +0300 |
commit | 5fe2a126d115e6b3220886f416b6b544252f8589 (patch) | |
tree | 2d0b7b7fb57135bc5885bcc0a771c9e99a52c734 /sysdeps/x86_64/multiarch/init-arch.c | |
parent | 3ac3ff325d4042c8a8e20821195938601994d8f8 (diff) | |
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This patch adds detection of availability for AVX512F and AVX512DQ ISAs.
* sysdeps/x86_64/multiarch/init-arch.h (bit_AVX512F_Usable,
bit_AVX512DQ_Usable, bit_Opmask_state, bit_ZMM0_15_state,
bit_ZMM16_31_state): New macro.
* sysdeps/x86_64/multiarch/init-arch.c (__init_cpu_features):
Check and set bit_AVX512F_Usable, bit_AVX512DQ_Usable.
Diffstat (limited to 'sysdeps/x86_64/multiarch/init-arch.c')
-rw-r--r-- | sysdeps/x86_64/multiarch/init-arch.c | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/sysdeps/x86_64/multiarch/init-arch.c b/sysdeps/x86_64/multiarch/init-arch.c index 7dec21884d..aaad5fa841 100644 --- a/sysdeps/x86_64/multiarch/init-arch.c +++ b/sysdeps/x86_64/multiarch/init-arch.c @@ -179,6 +179,23 @@ __init_cpu_features (void) if (CPUID_AVX2) __cpu_features.feature[index_AVX2_Usable] |= bit_AVX2_Usable | bit_AVX_Fast_Unaligned_Load; + /* Check if OPMASK state, upper 256-bit of ZMM0-ZMM15 and + ZMM16-ZMM31 state are enabled. */ + if ((xcrlow & (bit_Opmask_state | bit_ZMM0_15_state + | bit_ZMM16_31_state)) == + (bit_Opmask_state | bit_ZMM0_15_state | bit_ZMM16_31_state)) + { + /* Determine if AVX512F is usable. */ + if (CPUID_AVX512F) + { + __cpu_features.feature[index_AVX512F_Usable] + |= bit_AVX512F_Usable; + /* Determine if AVX512DQ is usable. */ + if (CPUID_AVX512DQ) + __cpu_features.feature[index_AVX512DQ_Usable] + |= bit_AVX512DQ_Usable; + } + } /* Determine if FMA is usable. */ if (CPUID_FMA) __cpu_features.feature[index_FMA_Usable] |= bit_FMA_Usable; |