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| author | Andrew Senkevich <andrew.senkevich@intel.com> | 2015-06-17 15:53:00 +0300 |
|---|---|---|
| committer | Andrew Senkevich <andrew.senkevich@intel.com> | 2015-06-17 15:53:00 +0300 |
| commit | 774488f88aeed6b838fe29c3c7561433c242a3c9 (patch) | |
| tree | 25aaaa25ca25b0ce8855e23fd9b23f1c1f388820 /sysdeps/x86/fpu | |
| parent | 6af25acc7b6313fd8934c3b2f0eb3da5a1c6eb6b (diff) | |
| download | glibc-774488f88aeed6b838fe29c3c7561433c242a3c9.tar glibc-774488f88aeed6b838fe29c3c7561433c242a3c9.tar.gz glibc-774488f88aeed6b838fe29c3c7561433c242a3c9.tar.bz2 glibc-774488f88aeed6b838fe29c3c7561433c242a3c9.zip | |
Vector logf for x86_64 and tests.
Here is implementation of vectorized logf containing SSE, AVX,
AVX2 and AVX512 versions according to Vector ABI
<https://groups.google.com/forum/#!topic/x86-64-abi/LmppCfN1rZ4>.
* sysdeps/unix/sysv/linux/x86_64/libmvec.abilist: New symbols added.
* sysdeps/x86/fpu/bits/math-vector.h: Added SIMD declaration and asm
redirections for logf.
* sysdeps/x86_64/fpu/Makefile (libmvec-support): Added new files.
* sysdeps/x86_64/fpu/Versions: New versions added.
* sysdeps/x86_64/fpu/libm-test-ulps: Regenerated.
* sysdeps/x86_64/fpu/multiarch/Makefile (libmvec-sysdep_routines): Added
build of SSE, AVX2 and AVX512 IFUNC versions.
* sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core.S: New file.
* sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core_avx512.S: New file.
* sysdeps/x86_64/fpu/multiarch/svml_s_logf4_core.S: New file.
* sysdeps/x86_64/fpu/multiarch/svml_s_logf4_core_sse4.S: New file.
* sysdeps/x86_64/fpu/multiarch/svml_s_logf8_core.S: New file.
* sysdeps/x86_64/fpu/multiarch/svml_s_logf8_core_avx2.S: New file.
* sysdeps/x86_64/fpu/svml_s_logf16_core.S: New file.
* sysdeps/x86_64/fpu/svml_s_logf4_core.S: New file.
* sysdeps/x86_64/fpu/svml_s_logf8_core.S: New file.
* sysdeps/x86_64/fpu/svml_s_logf8_core_avx.S: New file.
* sysdeps/x86_64/fpu/svml_s_logf_data.S: New file.
* sysdeps/x86_64/fpu/svml_s_logf_data.h: New file.
* sysdeps/x86_64/fpu/test-float-vlen16-wrappers.c: Vector logf tests.
* sysdeps/x86_64/fpu/test-float-vlen16.c: Likewise.
* sysdeps/x86_64/fpu/test-float-vlen4-wrappers.c: Likewise.
* sysdeps/x86_64/fpu/test-float-vlen4.c: Likewise.
* sysdeps/x86_64/fpu/test-float-vlen8-avx2-wrappers.c: Likewise.
* sysdeps/x86_64/fpu/test-float-vlen8-avx2.c: Likewise.
* sysdeps/x86_64/fpu/test-float-vlen8-wrappers.c: Likewise.
* sysdeps/x86_64/fpu/test-float-vlen8.c: Likewise.
* NEWS: Mention addition of x86_64 vector logf.
Diffstat (limited to 'sysdeps/x86/fpu')
| -rw-r--r-- | sysdeps/x86/fpu/bits/math-vector.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/sysdeps/x86/fpu/bits/math-vector.h b/sysdeps/x86/fpu/bits/math-vector.h index ed85622560..5c3e492ef9 100644 --- a/sysdeps/x86/fpu/bits/math-vector.h +++ b/sysdeps/x86/fpu/bits/math-vector.h @@ -38,6 +38,8 @@ # define __DECL_SIMD_sinf __DECL_SIMD_x86_64 # undef __DECL_SIMD_log # define __DECL_SIMD_log __DECL_SIMD_x86_64 +# undef __DECL_SIMD_logf +# define __DECL_SIMD_logf __DECL_SIMD_x86_64 /* Workaround to exclude unnecessary symbol aliases in libmvec while GCC creates the vector names based on scalar asm name. @@ -47,6 +49,10 @@ __asm__ ("_ZGVbN2v___log_finite = _ZGVbN2v_log"); __asm__ ("_ZGVcN4v___log_finite = _ZGVcN4v_log"); __asm__ ("_ZGVdN4v___log_finite = _ZGVdN4v_log"); __asm__ ("_ZGVeN8v___log_finite = _ZGVeN8v_log"); +__asm__ ("_ZGVbN4v___logf_finite = _ZGVbN4v_logf"); +__asm__ ("_ZGVcN8v___logf_finite = _ZGVcN8v_logf"); +__asm__ ("_ZGVdN8v___logf_finite = _ZGVdN8v_logf"); +__asm__ ("_ZGVeN16v___logf_finite = _ZGVeN16v_logf"); # endif #endif |