diff options
author | Alistair Francis <alistair.francis@wdc.com> | 2020-02-10 10:36:21 -0800 |
---|---|---|
committer | Alistair Francis <alistair.francis@wdc.com> | 2020-08-27 08:17:42 -0700 |
commit | 5b6113d62efabb123db433b14adddd4a5fb6b7ec (patch) | |
tree | 1959bde3e74c6e491bbce89f0f8e1806647c9225 /sysdeps/riscv | |
parent | 07598d76006faec6c60a9d86bda44dcb81b3a743 (diff) | |
download | glibc-5b6113d62efabb123db433b14adddd4a5fb6b7ec.tar glibc-5b6113d62efabb123db433b14adddd4a5fb6b7ec.tar.gz glibc-5b6113d62efabb123db433b14adddd4a5fb6b7ec.tar.bz2 glibc-5b6113d62efabb123db433b14adddd4a5fb6b7ec.zip |
RISC-V: Support the 32-bit ABI implementation
This patch adds the ABI implementation for 32-bit RISC-V. It contains
the Linux-specific and RISC-V architecture code.
Reviewed-by: Maciej W. Rozycki <macro@wdc.com>
Diffstat (limited to 'sysdeps/riscv')
-rw-r--r-- | sysdeps/riscv/bits/wordsize.h | 9 | ||||
-rw-r--r-- | sysdeps/riscv/nptl/bits/pthreadtypes-arch.h | 26 | ||||
-rw-r--r-- | sysdeps/riscv/nptl/bits/struct_rwlock.h | 27 | ||||
-rw-r--r-- | sysdeps/riscv/nptl/pthread-offsets.h | 17 | ||||
-rw-r--r-- | sysdeps/riscv/sfp-machine.h | 27 | ||||
-rw-r--r-- | sysdeps/riscv/sys/asm.h | 7 |
6 files changed, 91 insertions, 22 deletions
diff --git a/sysdeps/riscv/bits/wordsize.h b/sysdeps/riscv/bits/wordsize.h index faccc71828..4929dcf873 100644 --- a/sysdeps/riscv/bits/wordsize.h +++ b/sysdeps/riscv/bits/wordsize.h @@ -22,8 +22,9 @@ # error unsupported ABI #endif -#if __riscv_xlen == 64 -# define __WORDSIZE_TIME64_COMPAT32 1 -#else -# error "rv32i-based targets are not supported" +#define __WORDSIZE_TIME64_COMPAT32 1 + +#if __WORDSIZE == 32 +# define __WORDSIZE32_SIZE_ULONG 0 +# define __WORDSIZE32_PTRDIFF_LONG 0 #endif diff --git a/sysdeps/riscv/nptl/bits/pthreadtypes-arch.h b/sysdeps/riscv/nptl/bits/pthreadtypes-arch.h index c3c72d6c10..8a602e864a 100644 --- a/sysdeps/riscv/nptl/bits/pthreadtypes-arch.h +++ b/sysdeps/riscv/nptl/bits/pthreadtypes-arch.h @@ -21,18 +21,22 @@ #include <bits/endian.h> -#if __riscv_xlen == 64 -# define __SIZEOF_PTHREAD_ATTR_T 56 -# define __SIZEOF_PTHREAD_MUTEX_T 40 -# define __SIZEOF_PTHREAD_MUTEXATTR_T 4 -# define __SIZEOF_PTHREAD_COND_T 48 -# define __SIZEOF_PTHREAD_CONDATTR_T 4 -# define __SIZEOF_PTHREAD_RWLOCK_T 56 -# define __SIZEOF_PTHREAD_RWLOCKATTR_T 8 -# define __SIZEOF_PTHREAD_BARRIER_T 32 -# define __SIZEOF_PTHREAD_BARRIERATTR_T 4 +#define __SIZEOF_PTHREAD_MUTEXATTR_T 4 +#define __SIZEOF_PTHREAD_COND_T 48 +#define __SIZEOF_PTHREAD_CONDATTR_T 4 +#define __SIZEOF_PTHREAD_RWLOCKATTR_T 8 +#define __SIZEOF_PTHREAD_BARRIERATTR_T 4 + +#if __WORDSIZE == 64 +# define __SIZEOF_PTHREAD_ATTR_T 56 +# define __SIZEOF_PTHREAD_MUTEX_T 40 +# define __SIZEOF_PTHREAD_RWLOCK_T 56 +# define __SIZEOF_PTHREAD_BARRIER_T 32 #else -# error "rv32i-based systems are not supported" +# define __SIZEOF_PTHREAD_ATTR_T 32 +# define __SIZEOF_PTHREAD_MUTEX_T 32 +# define __SIZEOF_PTHREAD_RWLOCK_T 48 +# define __SIZEOF_PTHREAD_BARRIER_T 20 #endif #define __LOCK_ALIGNMENT diff --git a/sysdeps/riscv/nptl/bits/struct_rwlock.h b/sysdeps/riscv/nptl/bits/struct_rwlock.h index acfaa75e1b..dc467d42c7 100644 --- a/sysdeps/riscv/nptl/bits/struct_rwlock.h +++ b/sysdeps/riscv/nptl/bits/struct_rwlock.h @@ -15,7 +15,7 @@ You should have received a copy of the GNU Lesser General Public License along with the GNU C Library; if not, see - <http://www.gnu.org/licenses/>. */ + <https://www.gnu.org/licenses/>. */ #ifndef _RWLOCK_INTERNAL_H #define _RWLOCK_INTERNAL_H @@ -32,14 +32,37 @@ struct __pthread_rwlock_arch_t unsigned int __writers_futex; unsigned int __pad3; unsigned int __pad4; +#if __WORDSIZE == 64 int __cur_writer; int __shared; unsigned long int __pad1; unsigned long int __pad2; unsigned int __flags; +#else +# if __BYTE_ORDER == __BIG_ENDIAN + unsigned char __pad1; + unsigned char __pad2; + unsigned char __shared; + unsigned char __flags; +# else + unsigned char __flags; + unsigned char __shared; + unsigned char __pad1; + unsigned char __pad2; +# endif + int __cur_writer; +#endif }; -#define __PTHREAD_RWLOCK_INITIALIZER(__flags) \ +#if __WORDSIZE == 64 +# define __PTHREAD_RWLOCK_INITIALIZER(__flags) \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, __flags +#elif __BYTE_ORDER == __BIG_ENDIAN +# define __PTHREAD_RWLOCK_INITIALIZER(__flags) \ + 0, 0, 0, 0, 0, 0, 0, 0, 0, __flags, 0 +#else +# define __PTHREAD_RWLOCK_INITIALIZER(__flags) \ + 0, 0, 0, 0, 0, 0, __flags, 0, 0, 0, 0 +#endif #endif diff --git a/sysdeps/riscv/nptl/pthread-offsets.h b/sysdeps/riscv/nptl/pthread-offsets.h index 31f0587bec..d76c6cfb95 100644 --- a/sysdeps/riscv/nptl/pthread-offsets.h +++ b/sysdeps/riscv/nptl/pthread-offsets.h @@ -1,3 +1,16 @@ -#define __PTHREAD_MUTEX_KIND_OFFSET 16 +#if __WORDSIZE == 64 +# define __PTHREAD_MUTEX_KIND_OFFSET 16 +#else +# define __PTHREAD_MUTEX_KIND_OFFSET 12 +#endif -#define __PTHREAD_RWLOCK_FLAGS_OFFSET 48 + +#if __WORDSIZE == 64 +# define __PTHREAD_RWLOCK_FLAGS_OFFSET 48 +#else +# if __BYTE_ORDER == __BIG_ENDIAN +# define __PTHREAD_RWLOCK_FLAGS_OFFSET 27 +# else +# define __PTHREAD_RWLOCK_FLAGS_OFFSET 24 +# endif +#endif diff --git a/sysdeps/riscv/sfp-machine.h b/sysdeps/riscv/sfp-machine.h index 08a84fd701..bbeb9b37cf 100644 --- a/sysdeps/riscv/sfp-machine.h +++ b/sysdeps/riscv/sfp-machine.h @@ -22,7 +22,32 @@ #if __riscv_xlen == 32 -# error "rv32i-based targets are not supported" +# define _FP_W_TYPE_SIZE 32 +# define _FP_W_TYPE unsigned long +# define _FP_WS_TYPE signed long +# define _FP_I_TYPE long + +# define _FP_MUL_MEAT_S(R, X, Y) \ + _FP_MUL_MEAT_1_wide (_FP_WFRACBITS_S, R, X, Y, umul_ppmm) +# define _FP_MUL_MEAT_D(R, X, Y) \ + _FP_MUL_MEAT_2_wide (_FP_WFRACBITS_D, R, X, Y, umul_ppmm) +# define _FP_MUL_MEAT_Q(R, X, Y) \ + _FP_MUL_MEAT_4_wide (_FP_WFRACBITS_Q, R, X, Y, umul_ppmm) + +# define _FP_MUL_MEAT_DW_S(R, X, Y) \ + _FP_MUL_MEAT_DW_1_wide (_FP_WFRACBITS_S, R, X, Y, umul_ppmm) +# define _FP_MUL_MEAT_DW_D(R, X, Y) \ + _FP_MUL_MEAT_DW_2_wide (_FP_WFRACBITS_D, R, X, Y, umul_ppmm) +# define _FP_MUL_MEAT_DW_Q(R, X, Y) \ + _FP_MUL_MEAT_DW_4_wide (_FP_WFRACBITS_Q, R, X, Y, umul_ppmm) + +# define _FP_DIV_MEAT_S(R, X, Y) _FP_DIV_MEAT_1_udiv_norm (S, R, X, Y) +# define _FP_DIV_MEAT_D(R, X, Y) _FP_DIV_MEAT_2_udiv (D, R, X, Y) +# define _FP_DIV_MEAT_Q(R, X, Y) _FP_DIV_MEAT_4_udiv (Q, R, X, Y) + +# define _FP_NANFRAC_S _FP_QNANBIT_S +# define _FP_NANFRAC_D _FP_QNANBIT_D, 0 +# define _FP_NANFRAC_Q _FP_QNANBIT_Q, 0, 0, 0 #else diff --git a/sysdeps/riscv/sys/asm.h b/sysdeps/riscv/sys/asm.h index bd2de17e17..8292ec77b0 100644 --- a/sysdeps/riscv/sys/asm.h +++ b/sysdeps/riscv/sys/asm.h @@ -22,11 +22,14 @@ /* Macros to handle different pointer/register sizes for 32/64-bit code. */ #if __riscv_xlen == 64 # define PTRLOG 3 -# define SZREG 8 +# define SZREG 8 # define REG_S sd # define REG_L ld #elif __riscv_xlen == 32 -# error "rv32i-based targets are not supported" +# define PTRLOG 2 +# define SZREG 4 +# define REG_S sw +# define REG_L lw #else # error __riscv_xlen must equal 32 or 64 #endif |