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authorPalmer Dabbelt <palmer@dabbelt.com>2017-12-26 20:51:24 -0800
committerPalmer Dabbelt <palmer@dabbelt.com>2018-01-29 10:25:29 -0800
commitc776fa113da1f0d0cf83418e8937c0a8a4d83d3e (patch)
tree5aa9172a85e80592e4fb4f05c4bf53444612338f /sysdeps/riscv/bits
parentba9e25a62bd662ce8c7ed6c8d1c072110f1ffae5 (diff)
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RISC-V: ABI Implementation
This patch contains code that needs to directly know about the RISC-V ABI, which is specified in a work-in-progress psABI document: https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md This is meant to contain all the RISC-V code that needs to explicitly name registers or manage in-memory structure layout. This does not contain any of the Linux-specific code. 2018-01-29 Palmer Dabbelt <palmer@sifive.com> * sysdeps/riscv/__longjmp.S: New file. * sysdeps/riscv/backtrace.c: Likewise. * sysdeps/riscv/bits/endian.h: Likewise. * sysdeps/riscv/bits/setjmp.h: Likewise. * sysdeps/riscv/bits/wordsize.h: Likewise. * sysdeps/riscv/bsd-_setjmp.c: Likewise. * sysdeps/riscv/bsd-setjmp.c: Likewise. * sysdeps/riscv/dl-trampoline.S: Likewise. * sysdeps/riscv/gccframe.h: Likewise. * sysdeps/riscv/jmpbuf-offsets.h: Likewise. * sysdeps/riscv/jmpbuf-unwind.h: Likewise. * sysdeps/riscv/machine-gmon.h: Likewise. * sysdeps/riscv/memusage.h: Likewise. * sysdeps/riscv/setjmp.S: Likewise. * sysdeps/riscv/sys/asm.h: Likewise. * sysdeps/riscv/tls-macros.h: Likewise.
Diffstat (limited to 'sysdeps/riscv/bits')
-rw-r--r--sysdeps/riscv/bits/endian.h5
-rw-r--r--sysdeps/riscv/bits/link.h56
-rw-r--r--sysdeps/riscv/bits/setjmp.h39
-rw-r--r--sysdeps/riscv/bits/wordsize.h29
4 files changed, 129 insertions, 0 deletions
diff --git a/sysdeps/riscv/bits/endian.h b/sysdeps/riscv/bits/endian.h
new file mode 100644
index 0000000000..4aaf559d4f
--- /dev/null
+++ b/sysdeps/riscv/bits/endian.h
@@ -0,0 +1,5 @@
+#ifndef _ENDIAN_H
+# error "Never use <bits/endian.h> directly; include <endian.h> instead."
+#endif
+
+#define __BYTE_ORDER __LITTLE_ENDIAN
diff --git a/sysdeps/riscv/bits/link.h b/sysdeps/riscv/bits/link.h
new file mode 100644
index 0000000000..cedc4ad9b2
--- /dev/null
+++ b/sysdeps/riscv/bits/link.h
@@ -0,0 +1,56 @@
+/* Machine-specific declarations for dynamic linker interface. RISC-V version.
+ Copyright (C) 2005-2018 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library. If not, see
+ <http://www.gnu.org/licenses/>. */
+
+#ifndef _LINK_H
+# error "Never include <bits/link.h> directly; use <link.h> instead."
+#endif
+
+typedef struct La_riscv_regs
+{
+ unsigned long int lr_reg[8]; /* a0 - a7 */
+ double lr_fpreg[8]; /* fa0 - fa7 */
+ unsigned long int lr_ra;
+ unsigned long int lr_sp;
+} La_riscv_regs;
+
+/* Return values for calls from PLT on RISC-V. */
+typedef struct La_riscv_retval
+{
+ unsigned long int lrv_a0;
+ unsigned long int lrv_a1;
+ double lrv_fa0;
+ double lrv_fa1;
+} La_riscv_retval;
+
+__BEGIN_DECLS
+
+extern ElfW(Addr) la_riscv_gnu_pltenter (ElfW(Sym) *__sym, unsigned int __ndx,
+ uintptr_t *__refcook,
+ uintptr_t *__defcook,
+ La_riscv_regs *__regs,
+ unsigned int *__flags,
+ const char *__symname,
+ long int *__framesizep);
+extern unsigned int la_riscv_gnu_pltexit (ElfW(Sym) *__sym, unsigned int __ndx,
+ uintptr_t *__refcook,
+ uintptr_t *__defcook,
+ const La_riscv_regs *__inregs,
+ La_riscv_retval *__outregs,
+ const char *__symname);
+
+__END_DECLS
diff --git a/sysdeps/riscv/bits/setjmp.h b/sysdeps/riscv/bits/setjmp.h
new file mode 100644
index 0000000000..988ad6b1d6
--- /dev/null
+++ b/sysdeps/riscv/bits/setjmp.h
@@ -0,0 +1,39 @@
+/* Define the machine-dependent type `jmp_buf'. RISC-V version.
+ Copyright (C) 2011-2018 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library. If not, see
+ <http://www.gnu.org/licenses/>. */
+
+#ifndef _RISCV_BITS_SETJMP_H
+#define _RISCV_BITS_SETJMP_H
+
+typedef struct __jmp_buf_internal_tag
+ {
+ /* Program counter. */
+ long int __pc;
+ /* Callee-saved registers. */
+ long int __regs[12];
+ /* Stack pointer. */
+ long int __sp;
+
+ /* Callee-saved floating point registers. */
+#if defined __riscv_float_abi_double
+ double __fpregs[12];
+#elif !defined __riscv_float_abi_soft
+# error unsupported FLEN
+#endif
+ } __jmp_buf[1];
+
+#endif /* _RISCV_BITS_SETJMP_H */
diff --git a/sysdeps/riscv/bits/wordsize.h b/sysdeps/riscv/bits/wordsize.h
new file mode 100644
index 0000000000..67a16ba622
--- /dev/null
+++ b/sysdeps/riscv/bits/wordsize.h
@@ -0,0 +1,29 @@
+/* Determine the wordsize from the preprocessor defines. RISC-V version.
+ Copyright (C) 2002-2018 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library. If not, see
+ <http://www.gnu.org/licenses/>. */
+
+#if __riscv_xlen == (__SIZEOF_POINTER__ * 8)
+# define __WORDSIZE __riscv_xlen
+#else
+# error unsupported ABI
+#endif
+
+#if __riscv_xlen == 64
+# define __WORDSIZE_TIME64_COMPAT32 1
+#else
+# error "rv32i-based targets are not supported"
+#endif