Update.

2001-04-03  Ulrich Drepper  <drepper@redhat.com>

	* misc/dirname.c (dirname): Handle multiple slashes correctly.

2001-04-03  Martin Schwidefsky  <schwidefsky@de.ibm.com>

	* sysdeps/s390/s390-64/initfini.c: Fix __gmon_start__ GOT access.

2001-04-03  Martin Schwidefsky  <schwidefsky@de.ibm.com>

	* sysdeps/s390/s390-32/bcopy.S: Optimize for speed.
	* sysdeps/s390/s390-64/bcopy.S: Likewise.
	* sysdeps/s390/s390-32/mempcy.S: Likewise.
	* sysdeps/s390/s390-64/memcpy.S: Likewise.

2001-04-02  Bruno Haible  <haible@clisp.cons.org>

	* manual/message.texi (Advanced gettext functions): More specific
	syntax in the plural formula examples.

2001-04-02  Franz Sirl  <Franz.Sirl-kernel@lauterbach.com>

	* sysdeps/powerpc/atomicity.h: Silence warnings.
	* sysdeps/powerpc/dl-machine.h: Likewise.
	* sysdeps/powerpc/register-dump.h: Likewise.
	* sysdeps/powerpc/fpu/s_lrint.c: Likewise.

2001-04-02  Andreas Jaeger  <aj@suse.de>

	* misc/tst-dirname.c (main): Add more tests, derived from a bug
	report by Michael Kerrisk <mtk16@ext.canterbury.ac.nz>.

2001-04-01  Andreas Jaeger  <aj@suse.de>

	* debug/xtrace.sh (pcprofileso): Use SLIBDIR since libpcprofile.so
	is installed there.
	* malloc/memusage.sh (memusageso): Likewise for libmemusage.so.

2001-04-01  H.J. Lu  <hjl@gnu.org>

	* posix/annexc.c (macrofile): Renamed from TMPFILE and set to
	tmpnam (NULL).
	* stdlib/isomac.c (macrofile): Likewise.

2001-03-30  Thorsten Kukuk  <kukuk@suse.de>

	* inet/rcmd.c: Allow AF_UNSPEC as parameter.
	* nis/ypclnt.c (yp_all): Print error message only at last try,
	check for protocoll error only if we don't have a network error.

4 files changed, 147 insertions, 147 deletions

diff --git a/sysdeps/powerpc/atomicity.h b/sysdeps/powerpc/atomicity.h
index 2924b181f5..6942dfecd1 100644
--- a/sysdeps/powerpc/atomicity.h
+++ b/sysdeps/powerpc/atomicity.h
@@ -33,11 +33,11 @@ __attribute__ ((unused))
 exchange_and_add (volatile uint32_t *mem, int val)
 {
   int tmp, result;
-  __asm__ ("\
-0:	lwarx	%0,0,%2
-	add%I3	%1,%0,%3
-	stwcx.	%1,0,%2
-	bne-	0b
+  __asm__ ("\n\
+0:	lwarx	%0,0,%2	\n\
+	add%I3	%1,%0,%3	\n\
+	stwcx.	%1,0,%2	\n\
+	bne-	0b	\n\
 " : "=&b"(result), "=&r"(tmp) : "r" (mem), "Ir"(val) : "cr0", "memory");
   return result;
 }
@@ -47,11 +47,11 @@ __attribute__ ((unused))
 atomic_add (volatile uint32_t *mem, int val)
 {
   int tmp;
-  __asm__ ("\
-0:	lwarx	%0,0,%1
-	add%I2	%0,%0,%2
-	stwcx.	%0,0,%1
-	bne-	0b
+  __asm__ ("\n\
+0:	lwarx	%0,0,%1	\n\
+	add%I2	%0,%0,%2	\n\
+	stwcx.	%0,0,%1	\n\
+	bne-	0b	\n\
 " : "=&b"(tmp) : "r" (mem), "Ir"(val) : "cr0", "memory");
 }
 
@@ -60,14 +60,14 @@ __attribute__ ((unused))
 compare_and_swap (volatile long int *p, long int oldval, long int newval)
 {
   int result;
-  __asm__ ("\
-0:	lwarx	%0,0,%1
-	sub%I2c.	%0,%0,%2
-	cntlzw	%0,%0
-	bne-	1f
-	stwcx.	%3,0,%1
-	bne-	0b
-1:
+  __asm__ ("\n\
+0:	lwarx	%0,0,%1	\n\
+	sub%I2c.	%0,%0,%2	\n\
+	cntlzw	%0,%0	\n\
+	bne-	1f	\n\
+	stwcx.	%3,0,%1	\n\
+	bne-	0b	\n\
+1:	\n\
 " : "=&b"(result) : "r"(p), "Ir"(oldval), "r"(newval) : "cr0", "memory");
   return result >> 5;
 }
@@ -77,10 +77,10 @@ __attribute__ ((unused))
 always_swap (volatile long int *p, long int newval)
 {
   long int result;
-  __asm__ ("\
-0:	lwarx	%0,0,%1
-	stwcx.	%2,0,%1
-	bne-	0b
+  __asm__ ("\n\
+0:	lwarx	%0,0,%1	\n\
+	stwcx.	%2,0,%1	\n\
+	bne-	0b	\n\
 " : "=&r"(result) : "r"(p), "r"(newval) : "cr0", "memory");
   return result;
 }
@@ -90,13 +90,13 @@ __attribute__ ((unused))
 test_and_set (volatile long int *p, long int newval)
 {
   int result;
-  __asm__ ("\
-0:	lwarx	%0,0,%1
-	cmpwi	%0,0
-	bne-	1f
-	stwcx.	%2,0,%1
-	bne-	0b
-1:
+  __asm__ ("\n\
+0:	lwarx	%0,0,%1	\n\
+	cmpwi	%0,0	\n\
+	bne-	1f	\n\
+	stwcx.	%2,0,%1	\n\
+	bne-	0b	\n\
+1:	\n\
 " : "=&r"(result) : "r"(p), "r"(newval) : "cr0", "memory");
   return result;
 }
diff --git a/sysdeps/powerpc/dl-machine.h b/sysdeps/powerpc/dl-machine.h
index 961aafbd62..80db704835 100644
--- a/sysdeps/powerpc/dl-machine.h
+++ b/sysdeps/powerpc/dl-machine.h
@@ -102,101 +102,101 @@ elf_machine_load_address (void)
 /* This code is used in dl-runtime.c to call the `fixup' function
    and then redirect to the address it returns.  It is called
    from code built in the PLT by elf_machine_runtime_setup.  */
-#define ELF_MACHINE_RUNTIME_TRAMPOLINE asm ("\
-	.section \".text\"
-	.align 2
-	.globl _dl_runtime_resolve
-	.type _dl_runtime_resolve,@function
-_dl_runtime_resolve:
- # We need to save the registers used to pass parameters, and register 0,
- # which is used by _mcount; the registers are saved in a stack frame.
-	stwu 1,-64(1)
-	stw 0,12(1)
-	stw 3,16(1)
-	stw 4,20(1)
- # The code that calls this has put parameters for `fixup' in r12 and r11.
-	mr 3,12
-	stw 5,24(1)
-	mr 4,11
-	stw 6,28(1)
-	mflr 0
- # We also need to save some of the condition register fields.
-	stw 7,32(1)
-	stw 0,48(1)
-	stw 8,36(1)
-	mfcr 0
-	stw 9,40(1)
-	stw 10,44(1)
-	stw 0,8(1)
-	bl fixup@local
- # 'fixup' returns the address we want to branch to.
-	mtctr 3
- # Put the registers back...
-	lwz 0,48(1)
-	lwz 10,44(1)
-	lwz 9,40(1)
-	mtlr 0
-	lwz 8,36(1)
-	lwz 0,8(1)
-	lwz 7,32(1)
-	lwz 6,28(1)
-	mtcrf 0xFF,0
-	lwz 5,24(1)
-	lwz 4,20(1)
-	lwz 3,16(1)
-	lwz 0,12(1)
- # ...unwind the stack frame, and jump to the PLT entry we updated.
-	addi 1,1,64
-	bctr
-	.size	 _dl_runtime_resolve,.-_dl_runtime_resolve
-
-	.align 2
-	.globl _dl_prof_resolve
-	.type _dl_prof_resolve,@function
-_dl_prof_resolve:
- # We need to save the registers used to pass parameters, and register 0,
- # which is used by _mcount; the registers are saved in a stack frame.
-	stwu 1,-64(1)
-        stw 0,12(1)
-	stw 3,16(1)
-	stw 4,20(1)
- # The code that calls this has put parameters for `fixup' in r12 and r11.
-	mr 3,12
-	stw 5,24(1)
-	mr 4,11
-	stw 6,28(1)
-	mflr 5
- # We also need to save some of the condition register fields.
-	stw 7,32(1)
-	stw 5,48(1)
-	stw 8,36(1)
-	mfcr 0
-	stw 9,40(1)
-	stw 10,44(1)
-	stw 0,8(1)
-	bl profile_fixup@local
- # 'fixup' returns the address we want to branch to.
-	mtctr 3
- # Put the registers back...
-	lwz 0,48(1)
-	lwz 10,44(1)
-	lwz 9,40(1)
-	mtlr 0
-	lwz 8,36(1)
-	lwz 0,8(1)
-	lwz 7,32(1)
-	lwz 6,28(1)
-	mtcrf 0xFF,0
-	lwz 5,24(1)
-	lwz 4,20(1)
-	lwz 3,16(1)
-        lwz 0,12(1)
- # ...unwind the stack frame, and jump to the PLT entry we updated.
-	addi 1,1,64
-	bctr
-	.size	 _dl_prof_resolve,.-_dl_prof_resolve
- # Undo '.section text'.
-	.previous
+#define ELF_MACHINE_RUNTIME_TRAMPOLINE asm ("\n\
+	.section \".text\"	\n\
+	.align 2	\n\
+	.globl _dl_runtime_resolve	\n\
+	.type _dl_runtime_resolve,@function	\n\
+_dl_runtime_resolve:	\n\
+ # We need to save the registers used to pass parameters, and register 0,\n\
+ # which is used by _mcount; the registers are saved in a stack frame.\n\
+	stwu 1,-64(1)	\n\
+	stw 0,12(1)	\n\
+	stw 3,16(1)	\n\
+	stw 4,20(1)	\n\
+ # The code that calls this has put parameters for `fixup' in r12 and r11.\n\
+	mr 3,12	\n\
+	stw 5,24(1)	\n\
+	mr 4,11	\n\
+	stw 6,28(1)	\n\
+	mflr 0	\n\
+ # We also need to save some of the condition register fields.\n\
+	stw 7,32(1)	\n\
+	stw 0,48(1)	\n\
+	stw 8,36(1)	\n\
+	mfcr 0	\n\
+	stw 9,40(1)	\n\
+	stw 10,44(1)	\n\
+	stw 0,8(1)	\n\
+	bl fixup@local	\n\
+ # 'fixup' returns the address we want to branch to.\n\
+	mtctr 3	\n\
+ # Put the registers back...\n\
+	lwz 0,48(1)	\n\
+	lwz 10,44(1)	\n\
+	lwz 9,40(1)	\n\
+	mtlr 0	\n\
+	lwz 8,36(1)	\n\
+	lwz 0,8(1)	\n\
+	lwz 7,32(1)	\n\
+	lwz 6,28(1)	\n\
+	mtcrf 0xFF,0	\n\
+	lwz 5,24(1)	\n\
+	lwz 4,20(1)	\n\
+	lwz 3,16(1)	\n\
+	lwz 0,12(1)	\n\
+ # ...unwind the stack frame, and jump to the PLT entry we updated.\n\
+	addi 1,1,64	\n\
+	bctr	\n\
+	.size	 _dl_runtime_resolve,.-_dl_runtime_resolve	\n\
+	\n\
+	.align 2	\n\
+	.globl _dl_prof_resolve	\n\
+	.type _dl_prof_resolve,@function	\n\
+_dl_prof_resolve:	\n\
+ # We need to save the registers used to pass parameters, and register 0,\n\
+ # which is used by _mcount; the registers are saved in a stack frame.\n\
+	stwu 1,-64(1)	\n\
+        stw 0,12(1)	\n\
+	stw 3,16(1)	\n\
+	stw 4,20(1)	\n\
+ # The code that calls this has put parameters for `fixup' in r12 and r11.\n\
+	mr 3,12	\n\
+	stw 5,24(1)	\n\
+	mr 4,11	\n\
+	stw 6,28(1)	\n\
+	mflr 5	\n\
+ # We also need to save some of the condition register fields.\n\
+	stw 7,32(1)	\n\
+	stw 5,48(1)	\n\
+	stw 8,36(1)	\n\
+	mfcr 0	\n\
+	stw 9,40(1)	\n\
+	stw 10,44(1)	\n\
+	stw 0,8(1)	\n\
+	bl profile_fixup@local	\n\
+ # 'fixup' returns the address we want to branch to.\n\
+	mtctr 3	\n\
+ # Put the registers back...\n\
+	lwz 0,48(1)	\n\
+	lwz 10,44(1)	\n\
+	lwz 9,40(1)	\n\
+	mtlr 0	\n\
+	lwz 8,36(1)	\n\
+	lwz 0,8(1)	\n\
+	lwz 7,32(1)	\n\
+	lwz 6,28(1)	\n\
+	mtcrf 0xFF,0	\n\
+	lwz 5,24(1)	\n\
+	lwz 4,20(1)	\n\
+	lwz 3,16(1)	\n\
+        lwz 0,12(1)	\n\
+ # ...unwind the stack frame, and jump to the PLT entry we updated.\n\
+	addi 1,1,64	\n\
+	bctr	\n\
+	.size	 _dl_prof_resolve,.-_dl_prof_resolve	\n\
+ # Undo '.section text'.\n\
+	.previous	\n\
 ");
 
 /* The actual _start code is in dl-start.S.  Use a really
diff --git a/sysdeps/powerpc/fpu/s_lrint.c b/sysdeps/powerpc/fpu/s_lrint.c
index a060598859..ce8df3193e 100644
--- a/sysdeps/powerpc/fpu/s_lrint.c
+++ b/sysdeps/powerpc/fpu/s_lrint.c
@@ -32,12 +32,12 @@ __lrint (double x)
 weak_alias (__lrint, lrint)
 
 /* This code will also work for a 'float' argument.  */
-asm ("\
-        .globl __lrintf
-        .globl lrintf
-        .weak lrintf
-	.set __lrintf,__lrint
-	.set lrintf,__lrint
+asm ("\n\
+	.globl __lrintf	\n\
+	.globl lrintf	\n\
+	.weak lrintf	\n\
+	.set __lrintf,__lrint	\n\
+	.set lrintf,__lrint	\n\
 ");
 
 #ifdef NO_LONG_DOUBLE
diff --git a/sysdeps/powerpc/register-dump.h b/sysdeps/powerpc/register-dump.h
index f1d3985e32..5cea8f8775 100644
--- a/sysdeps/powerpc/register-dump.h
+++ b/sysdeps/powerpc/register-dump.h
@@ -22,23 +22,23 @@
 
 /* This prints out the information in the following form: */
 static const char dumpform[] = "\
-Register dump:
-fp0-3:   0000030%0000031% 0000032%0000033% 0000034%0000035% 0000036%0000037%
-fp4-7:   0000038%0000039% 000003a%000003b% 000003c%000003d% 000003e%000003f%
-fp8-11:  0000040%0000041% 0000042%0000043% 0000044%0000045% 0000046%0000047%
-fp12-15: 0000048%0000049% 000004a%000004b% 000004c%000004d% 000004e%000004f%
-fp16-19: 0000050%0000051% 0000052%0000053% 0000054%0000055% 0000056%0000057%
-fp20-23: 0000058%0000059% 000005a%000005b% 000005c%000005d% 000005e%000005f%
-fp24-27: 0000060%0000061% 0000062%0000063% 0000064%0000065% 0000066%0000067%
-fp28-31: 0000068%0000069% 000006a%000006b% 000006c%000006d% 000006e%000006f%
-r0 =0000000% sp =0000001% r2 =0000002% r3 =0000003%  trap=0000028%
-r4 =0000004% r5 =0000005% r6 =0000006% r7 =0000007%   sr0=0000020% sr1=0000021%
-r8 =0000008% r9 =0000009% r10=000000a% r11=000000b%   dar=0000029% dsi=000002a%
-r12=000000c% r13=000000d% r14=000000e% r15=000000f%   r3*=0000022%
-r16=0000010% r17=0000011% r18=0000012% r19=0000013%
-r20=0000014% r21=0000015% r22=0000016% r23=0000017%    lr=0000024% xer=0000025%
-r24=0000018% r25=0000019% r26=000001a% r27=000001b%    mq=0000027% ctr=0000023%
-r28=000001c% r29=000001d% r30=000001e% r31=000001f%  fscr=0000071% ccr=0000026%
+Register dump:\n\
+fp0-3:   0000030%0000031% 0000032%0000033% 0000034%0000035% 0000036%0000037%\n\
+fp4-7:   0000038%0000039% 000003a%000003b% 000003c%000003d% 000003e%000003f%\n\
+fp8-11:  0000040%0000041% 0000042%0000043% 0000044%0000045% 0000046%0000047%\n\
+fp12-15: 0000048%0000049% 000004a%000004b% 000004c%000004d% 000004e%000004f%\n\
+fp16-19: 0000050%0000051% 0000052%0000053% 0000054%0000055% 0000056%0000057%\n\
+fp20-23: 0000058%0000059% 000005a%000005b% 000005c%000005d% 000005e%000005f%\n\
+fp24-27: 0000060%0000061% 0000062%0000063% 0000064%0000065% 0000066%0000067%\n\
+fp28-31: 0000068%0000069% 000006a%000006b% 000006c%000006d% 000006e%000006f%\n\
+r0 =0000000% sp =0000001% r2 =0000002% r3 =0000003%  trap=0000028%\n\
+r4 =0000004% r5 =0000005% r6 =0000006% r7 =0000007%   sr0=0000020% sr1=0000021%\n\
+r8 =0000008% r9 =0000009% r10=000000a% r11=000000b%   dar=0000029% dsi=000002a%\n\
+r12=000000c% r13=000000d% r14=000000e% r15=000000f%   r3*=0000022%\n\
+r16=0000010% r17=0000011% r18=0000012% r19=0000013%\n\
+r20=0000014% r21=0000015% r22=0000016% r23=0000017%    lr=0000024% xer=0000025%\n\
+r24=0000018% r25=0000019% r26=000001a% r27=000001b%    mq=0000027% ctr=0000023%\n\
+r28=000001c% r29=000001d% r30=000001e% r31=000001f%  fscr=0000071% ccr=0000026%\n\
 ";
 
 /* Most of the fields are self-explanatory.  'sr0' is the next