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| author | Wainer dos Santos Moschetta <wainersm@linux.vnet.ibm.com> | 2017-04-11 14:18:35 -0300 |
|---|---|---|
| committer | Tulio Magno Quites Machado Filho <tuliom@linux.vnet.ibm.com> | 2017-04-11 17:13:55 -0300 |
| commit | 18e0054bf7c57cb5e6b90961be167164d58b1098 (patch) | |
| tree | 5d1a44b43a9f36e2f6c6b30b7f88003137efeea3 /sysdeps/powerpc/powerpc64/power4/memset.S | |
| parent | f0748b70a84fc9f08507b58841356e45ea516076 (diff) | |
| download | glibc-18e0054bf7c57cb5e6b90961be167164d58b1098.tar glibc-18e0054bf7c57cb5e6b90961be167164d58b1098.tar.gz glibc-18e0054bf7c57cb5e6b90961be167164d58b1098.tar.bz2 glibc-18e0054bf7c57cb5e6b90961be167164d58b1098.zip | |
powerpc: refactor memset IFUNC.
Clean up the IFUNC implementations for powerpc in order to remove
unneeded macro definitions.
Tested on ppc64le with and without --disable-multi-arch flag.
* sysdeps/powerpc/powerpc64/multiarch/memset-power4.S: Define the
implementation-specific function name and remove unneeded macros
definition.
* sysdeps/powerpc/powerpc64/multiarch/memset-power6.S: Likewise.
* sysdeps/powerpc/powerpc64/multiarch/memset-power7.S: Likewise.
* sysdeps/powerpc/powerpc64/multiarch/memset-power8.S: Likewise.
* sysdeps/powerpc/powerpc64/multiarch/memset-ppc64.S: Likewise.
* sysdeps/powerpc/powerpc64/memset.S: Set a default function name if
not defined and pass as parameter to macros accordingly.
* sysdeps/powerpc/powerpc64/power4/memset.S: Likewise.
* sysdeps/powerpc/powerpc64/power6/memset.S: Likewise.
* sysdeps/powerpc/powerpc64/power7/memset.S: Likewise.
* sysdeps/powerpc/powerpc64/power8/memset.S: Likewise.
Diffstat (limited to 'sysdeps/powerpc/powerpc64/power4/memset.S')
| -rw-r--r-- | sysdeps/powerpc/powerpc64/power4/memset.S | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/sysdeps/powerpc/powerpc64/power4/memset.S b/sysdeps/powerpc/powerpc64/power4/memset.S index 6686005474..a57214e0b0 100644 --- a/sysdeps/powerpc/powerpc64/power4/memset.S +++ b/sysdeps/powerpc/powerpc64/power4/memset.S @@ -25,8 +25,11 @@ cache line (256 bits). There is a special case for setting cache lines to 0, to take advantage of the dcbz instruction. */ +#ifndef MEMSET +# define MEMSET memset +#endif .machine power4 -EALIGN (memset, 5, 0) +EALIGN (MEMSET, 5, 0) CALL_MCOUNT 3 #define rTMP r0 @@ -232,7 +235,7 @@ L(medium_27f): L(medium_28t): std rCHR, -8(rMEMP) blr -END_GEN_TB (memset,TB_TOCLESS) +END_GEN_TB (MEMSET,TB_TOCLESS) libc_hidden_builtin_def (memset) /* Copied from bzero.S to prevent the linker from inserting a stub |