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authorAnton Blanchard <anton@samba.org>2013-01-07 11:20:53 -0600
committerRyan S. Arnold <rsa@linux.vnet.ibm.com>2013-01-07 11:20:53 -0600
commit2ccdea26f290f6990606f4a43de5272afa1a784d (patch)
tree4b31e4613c48117cafa62f6404a1f207bb123832 /sysdeps/powerpc/powerpc32/bits
parent375607b9cc9ddf46a379bab6bf2998c54099d6b5 (diff)
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Fix spelling errors in sysdeps/powerpc files.
Diffstat (limited to 'sysdeps/powerpc/powerpc32/bits')
-rw-r--r--sysdeps/powerpc/powerpc32/bits/atomic.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/sysdeps/powerpc/powerpc32/bits/atomic.h b/sysdeps/powerpc/powerpc32/bits/atomic.h
index 2f441ed985..3e3a1effe5 100644
--- a/sysdeps/powerpc/powerpc32/bits/atomic.h
+++ b/sysdeps/powerpc/powerpc32/bits/atomic.h
@@ -21,7 +21,7 @@
This is a hint to the hardware to expect additional updates adjacent
to the lock word or not. If we are acquiring a Mutex, the hint
should be true. Otherwise we releasing a Mutex or doing a simple
- atomic operation. In that case we don't expect addtional updates
+ atomic operation. In that case we don't expect additional updates
adjacent to the lock word after the Store Conditional and the hint
should be false. */
@@ -35,7 +35,7 @@
/*
* The 32-bit exchange_bool is different on powerpc64 because the subf
- * does signed 64-bit arthmatic while the lwarx is 32-bit unsigned
+ * does signed 64-bit arithmetic while the lwarx is 32-bit unsigned
* (a load word and zero (high 32) form). So powerpc64 has a slightly
* different version in sysdeps/powerpc/powerpc64/bits/atomic.h.
*/