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author | Ulrich Drepper <drepper@redhat.com> | 2007-03-26 20:16:39 +0000 |
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committer | Ulrich Drepper <drepper@redhat.com> | 2007-03-26 20:16:39 +0000 |
commit | fa6e3bc38aaf82c80759f5dbdc9ec0d60ce7ee51 (patch) | |
tree | eb6cb888ca49ac0cb0c90745aa57ae7e2e20aa2b /sysdeps/powerpc/bits | |
parent | c7693af7ef36972aa266030da26211db21fc82fb (diff) | |
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* sysdeps/powerpc/bits/atomic.h
[!MUTEX_HINT_ACQ]: Define MUTEX_HINT_ACQ.
[!MUTEX_HINT_REL]: Define MUTEX_HINT_REL.
(__arch_compare_and_exchange_val_32_acq): Add MUTEX_HINT_ACQ to lwarx.
(__arch_compare_and_exchange_val_32_rel): Add MUTEX_HINT_REL to lwarx.
(__arch_atomic_exchange_val_32_acq): Add MUTEX_HINT_ACQ to lwarx.
(__arch_atomic_exchange_rel_32_rel): Add MUTEX_HINT_REL to lwarx.
* sysdeps/powerpc/powerpc32/bits/atomic.h [_ARCH_PWR6 || _ARCH_PWR6X]:
Define MUTEX_HINT_ACQ as ",1" and MUTEX_HINT_REL as ",0".
(__arch_compare_and_exchange_bool_32_acq): Add MUTEX_HINT_ACQ to lwarx.
(__arch_compare_and_exchange_bool_32_rel): Add MUTEX_HINT_REL to lwarx.
* sysdeps/powerpc/powerpc64/bits/atomic.h [_ARCH_PWR6 || _ARCH_PWR6D]:
Define MUTEX_HINT_ACQ as ",1" and MUTEX_HINT_REL as ",0".
(__arch_compare_and_exchange_bool_32_acq): Add MUTEX_HINT_ACQ to lwarx.
(__arch_compare_and_exchange_bool_32_rel): Add MUTEX_HINT_REL to lwarx.
(__arch_compare_and_exchange_bool_64_acq): Add MUTEX_HINT_ACQ to lwarx.
(__arch_compare_and_exchange_bool_64_rel): Add MUTEX_HINT_REL to lwarx.
(__arch_compare_and_exchange_val_64_acq): Add MUTEX_HINT_ACQ to lwarx.
(__arch_compare_and_exchange_val_64_rel): Add MUTEX_HINT_REL to lwarx.
(__arch_atomic_exchange_val_64_acq): Add MUTEX_HINT_ACQ to lwarx.
(__arch_atomic_exchange_rel_64_rel): Add MUTEX_HINT_REL to lwarx.
2007-03-20 Jakub Jelinek <jakub@redhat.com>
Diffstat (limited to 'sysdeps/powerpc/bits')
-rw-r--r-- | sysdeps/powerpc/bits/atomic.h | 15 |
1 files changed, 11 insertions, 4 deletions
diff --git a/sysdeps/powerpc/bits/atomic.h b/sysdeps/powerpc/bits/atomic.h index 31f27e9e10..d71f64e0ac 100644 --- a/sysdeps/powerpc/bits/atomic.h +++ b/sysdeps/powerpc/bits/atomic.h @@ -70,6 +70,13 @@ typedef uintmax_t uatomic_max_t; # endif #endif +#ifndef MUTEX_HINT_ACQ +# define MUTEX_HINT_ACQ +#endif +#ifndef MUTEX_HINT_REL +# define MUTEX_HINT_REL +#endif + #define atomic_full_barrier() __asm ("sync" ::: "memory") #define atomic_write_barrier() __asm ("eieio" ::: "memory") @@ -78,7 +85,7 @@ typedef uintmax_t uatomic_max_t; __typeof (*(mem)) __tmp; \ __typeof (mem) __memp = (mem); \ __asm __volatile ( \ - "1: lwarx %0,0,%1\n" \ + "1: lwarx %0,0,%1" MUTEX_HINT_ACQ "\n" \ " cmpw %0,%2\n" \ " bne 2f\n" \ " stwcx. %3,0,%1\n" \ @@ -95,7 +102,7 @@ typedef uintmax_t uatomic_max_t; __typeof (*(mem)) __tmp; \ __typeof (mem) __memp = (mem); \ __asm __volatile (__ARCH_REL_INSTR "\n" \ - "1: lwarx %0,0,%1\n" \ + "1: lwarx %0,0,%1" MUTEX_HINT_REL "\n" \ " cmpw %0,%2\n" \ " bne 2f\n" \ " stwcx. %3,0,%1\n" \ @@ -111,7 +118,7 @@ typedef uintmax_t uatomic_max_t; ({ \ __typeof (*mem) __val; \ __asm __volatile ( \ - "1: lwarx %0,0,%2\n" \ + "1: lwarx %0,0,%2" MUTEX_HINT_ACQ "\n" \ " stwcx. %3,0,%2\n" \ " bne- 1b\n" \ " " __ARCH_ACQ_INSTR \ @@ -125,7 +132,7 @@ typedef uintmax_t uatomic_max_t; ({ \ __typeof (*mem) __val; \ __asm __volatile (__ARCH_REL_INSTR "\n" \ - "1: lwarx %0,0,%2\n" \ + "1: lwarx %0,0,%2" MUTEX_HINT_REL "\n" \ " stwcx. %3,0,%2\n" \ " bne- 1b" \ : "=&r" (__val), "=m" (*mem) \ |