Update

2002-09-10  Hartvig Ekner  <hartvige@mips.com>

	* sysdeps/mips/memcpy.S: New file.
	* sysdeps/mips/memset.S: New file.
	* sysdeps/mips/fpu/e_sqrt.c:  New file.
	* sysdeps/mips/fpu/e_sqrtf.c: New file.

	* fpu/fclrexcpt.c: Cleaned up the FPU exception stuff - was not
	functional before. Also removed all SHLIB_COMPAT stuff.
	* fpu/fegetenv.c: Likewise.
	* fpu/fesetenv.c:: Likewise.
	* fpu/feupdateenv.c: Likewise.
	* fpu/fgetexcptflg.c: Likewise.
	* fpu/fraiseexcpt.c: Likewise.

	* sysdeps/mips/fpu/fsetexcptflg.c: New file.

1 files changed, 4 insertions, 12 deletions

diff --git a/sysdeps/mips/fpu/fraiseexcpt.c b/sysdeps/mips/fpu/fraiseexcpt.c
index e3323ddb40..7f3d977787 100644
--- a/sysdeps/mips/fpu/fraiseexcpt.c
+++ b/sysdeps/mips/fpu/fraiseexcpt.c
@@ -21,19 +21,18 @@
 #include <fenv.h>
 #include <fenv_libc.h>
 #include <fpu_control.h>
-#include <shlib-compat.h>
 
 int
-__feraiseexcept (int excepts)
+feraiseexcept (int excepts)
 {
   fpu_control_t cw;
 
   /* Get current state.  */
   _FPU_GETCW (cw);
 
-  /* Set flag bits (which are accumulative), and *also* set the cause
-     bits.  The setting of the cause bits is what actually causes the
-     hardware to generate the exception, if the corresponding enable
+  /* Set flag bits (which are accumulative), and *also* set the 
+     cause bits. The setting of the cause bits is what actually causes
+     the hardware to generate the exception, if the corresponding enable
      bit is set as well.  */
 
   excepts &= FE_ALL_EXCEPT;
@@ -44,10 +43,3 @@ __feraiseexcept (int excepts)
 
   return 0;
 }
-
-#if SHLIB_COMPAT (libm, GLIBC_2_1, GLIBC_2_2)
-strong_alias (__feraiseexcept, __old_feraiseexcept)
-compat_symbol (libm, __old_feraiseexcept, feraiseexcept, GLIBC_2_1);
-#endif
-libm_hidden_ver (__feraiseexcept, feraiseexcept)
-versioned_symbol (libm, __feraiseexcept, feraiseexcept, GLIBC_2_2);