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authorMaciej W. Rozycki <macro@codesourcery.com>2014-05-16 22:46:53 +0100
committerMaciej W. Rozycki <macro@codesourcery.com>2014-05-16 23:10:29 +0100
commitdeb0f7f6a825f2a90220bc4e1053d70876efb150 (patch)
treea2f6d99748c0f9e56a9cb3d61b3faf22e8873743 /sysdeps/mach/hppa/machine-lock.h
parent79520f4bd611602f5bdb2b50979cf75bb5ac2968 (diff)
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ARM: soft-fp NaN representation correction
Commit 7d92b78723848ae616709eb8f0191ea067025b18 [Fix ARM NAN fraction bits.] removed all the bits set from NANFRAC macros and, when propagated to libgcc, regressed gcc.dg/torture/builtin-math-7.c on soft-fp arm-eabi targets, currently ARMv6-M (`-march=armv6-m -mthumb') only. This is because when used to construct a NaN in the semi-raw mode, they now build an infinity instead. Consequently operations such as (Inf - Inf) now produce Inf rather than NaN. The change worked for the original test case, posted with PR libgcc/60166, because division is made in the canonical mode, where the quiet bit is set separately, from the fp class. This change brings the quiet bit back to these macros, making semi-raw mode calculations produce the expected results again.
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