LoongArch: Add soft float support.

11 files changed, 85 insertions, 12 deletions

diff --git a/sysdeps/loongarch/Makefile b/sysdeps/loongarch/Makefile
index 41c3449670..746d4c2c8f 100644
--- a/sysdeps/loongarch/Makefile
+++ b/sysdeps/loongarch/Makefile
@@ -5,11 +5,3 @@ endif
 # LoongArch's assembler also needs to know about PIC as it changes the
 # definition of some assembler macros.
 ASFLAGS-.os += $(pic-ccflag)
-
-abi-variants := lp64
-
-ifeq (,$(filter $(default-abi),$(abi-variants)))
-$(error Unknown ABI $(default-abi), must be one of $(abi-variants))
-endif
-
-abi-lp64-condition    := defined __loongarch_lp64
diff --git a/sysdeps/loongarch/__longjmp.S b/sysdeps/loongarch/__longjmp.S
index 4207376f5e..d6a99fcbc8 100644
--- a/sysdeps/loongarch/__longjmp.S
+++ b/sysdeps/loongarch/__longjmp.S
@@ -41,6 +41,7 @@ ENTRY (__longjmp)
 	REG_L s7, a0, 11*SZREG
 	REG_L s8, a0, 12*SZREG
 
+#ifndef __loongarch_soft_float
 	FREG_L $f24, a0, 13*SZREG + 0*SZFREG
 	FREG_L $f25, a0, 13*SZREG + 1*SZFREG
 	FREG_L $f26, a0, 13*SZREG + 2*SZFREG
@@ -49,6 +50,7 @@ ENTRY (__longjmp)
 	FREG_L $f29, a0, 13*SZREG + 5*SZFREG
 	FREG_L $f30, a0, 13*SZREG + 6*SZFREG
 	FREG_L $f31, a0, 13*SZREG + 7*SZFREG
+#endif
 
 	sltui	a0,a1,1
 	ADD	a0, a0, a1	 # a0 = (a1 == 0) ? 1 : a1
diff --git a/sysdeps/loongarch/bits/setjmp.h b/sysdeps/loongarch/bits/setjmp.h
index 42f8fa7657..8b323ad2b6 100644
--- a/sysdeps/loongarch/bits/setjmp.h
+++ b/sysdeps/loongarch/bits/setjmp.h
@@ -31,8 +31,11 @@ typedef struct __jmp_buf_internal_tag
   long int __fp;
   /* Callee-saved registers.  */
   long int __regs[9];
+
+#ifndef __loongarch_soft_float
   /* Callee-saved floating point registers.  */
   double __fpregs[8];
+#endif
 
 } __jmp_buf[1];
 
diff --git a/sysdeps/loongarch/dl-trampoline.S b/sysdeps/loongarch/dl-trampoline.S
index ad8ab0fda7..9a8f580971 100644
--- a/sysdeps/loongarch/dl-trampoline.S
+++ b/sysdeps/loongarch/dl-trampoline.S
@@ -21,8 +21,11 @@
 
 /* Assembler veneer called from the PLT header code for lazy loading.
    The PLT header passes its own args in t0-t2.  */
-
-# define FRAME_SIZE (-((-10 * SZREG - 8 * SZFREG) & ALMASK))
+#ifdef __loongarch_soft_float
+#define FRAME_SIZE (-((-10 * SZREG) & ALMASK))
+#else
+#define FRAME_SIZE (-((-10 * SZREG - 8 * SZFREG) & ALMASK))
+#endif
 
 ENTRY (_dl_runtime_resolve)
 
@@ -39,6 +42,7 @@ ENTRY (_dl_runtime_resolve)
 	REG_S	a6, sp, 7*SZREG
 	REG_S	a7, sp, 8*SZREG
 
+#ifndef __loongarch_soft_float
 	FREG_S	fa0, sp, 10*SZREG + 0*SZFREG
 	FREG_S	fa1, sp, 10*SZREG + 1*SZFREG
 	FREG_S	fa2, sp, 10*SZREG + 2*SZFREG
@@ -47,6 +51,7 @@ ENTRY (_dl_runtime_resolve)
 	FREG_S	fa5, sp, 10*SZREG + 5*SZFREG
 	FREG_S	fa6, sp, 10*SZREG + 6*SZFREG
 	FREG_S	fa7, sp, 10*SZREG + 7*SZFREG
+#endif
 
 	/* Update .got.plt and obtain runtime address of callee */
 	SLLI	a1, t1, 1
@@ -67,6 +72,7 @@ ENTRY (_dl_runtime_resolve)
 	REG_L	a6, sp, 7*SZREG
 	REG_L	a7, sp, 8*SZREG
 
+#ifndef __loongarch_soft_float
 	FREG_L	fa0, sp, 10*SZREG + 0*SZFREG
 	FREG_L	fa1, sp, 10*SZREG + 1*SZFREG
 	FREG_L	fa2, sp, 10*SZREG + 2*SZFREG
@@ -75,6 +81,7 @@ ENTRY (_dl_runtime_resolve)
 	FREG_L	fa5, sp, 10*SZREG + 5*SZFREG
 	FREG_L	fa6, sp, 10*SZREG + 6*SZFREG
 	FREG_L	fa7, sp, 10*SZREG + 7*SZFREG
+#endif
 
 	ADDI	sp, sp, FRAME_SIZE
 
diff --git a/sysdeps/loongarch/fpu_control.h b/sysdeps/loongarch/fpu_control.h
index 1cccc933a5..f482395dba 100644
--- a/sysdeps/loongarch/fpu_control.h
+++ b/sysdeps/loongarch/fpu_control.h
@@ -51,6 +51,17 @@
 
 #include <features.h>
 
+#ifdef __loongarch_soft_float
+
+#define _FPU_RESERVED 0xffffffff
+#define _FPU_DEFAULT 0x00000000
+typedef unsigned int fpu_control_t;
+#define _FPU_GETCW(cw) (cw) = 0
+#define _FPU_SETCW(cw) (void) (cw)
+extern fpu_control_t __fpu_control;
+
+#else /* __loongarch_soft_float */
+
 /* Masks for interrupts.  */
 #define _FPU_MASK_V 0x10 /* Invalid operation */
 #define _FPU_MASK_Z 0x08 /* Division by zero  */
@@ -86,4 +97,6 @@ extern void __loongarch_fpu_setcw (fpu_control_t) __THROW;
 /* Default control word set at startup.  */
 extern fpu_control_t __fpu_control;
 
+#endif /* __loongarch_soft_float */
+
 #endif /* fpu_control.h */
diff --git a/sysdeps/loongarch/nofpu/Implies b/sysdeps/loongarch/nofpu/Implies
new file mode 100644
index 0000000000..abcbadb25f
--- /dev/null
+++ b/sysdeps/loongarch/nofpu/Implies
@@ -0,0 +1 @@
+ieee754/soft-fp
diff --git a/sysdeps/loongarch/nofpu/math-tests-exceptions.h b/sysdeps/loongarch/nofpu/math-tests-exceptions.h
new file mode 100644
index 0000000000..b22bb01d0e
--- /dev/null
+++ b/sysdeps/loongarch/nofpu/math-tests-exceptions.h
@@ -0,0 +1,28 @@
+/* Configuration for math tests: support for exceptions.
+   Copyright (C) 2022 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <https://www.gnu.org/licenses/>.  */
+
+#ifndef LOONGARCH_NOFPU_MATH_TESTS_EXCEPTIONS_H
+#define LOONGARCH_NOFPU_MATH_TESTS_EXCEPTIONS_H 1
+
+/* We support setting floating-point exception flags on hard-float
+   targets.  These are not supported on soft-float targets.  */
+#define EXCEPTION_TESTS_float 0
+#define EXCEPTION_TESTS_double        0
+#define EXCEPTION_TESTS_long_double   0
+
+#endif /* math-tests-exceptions.h.  */
diff --git a/sysdeps/loongarch/nofpu/math-tests-rounding.h b/sysdeps/loongarch/nofpu/math-tests-rounding.h
new file mode 100644
index 0000000000..5322e481b9
--- /dev/null
+++ b/sysdeps/loongarch/nofpu/math-tests-rounding.h
@@ -0,0 +1,27 @@
+/* Configuration for math tests: rounding mode support.
+   Copyright (C) 2022 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <https://www.gnu.org/licenses/>.  */
+
+#ifndef LOONGARCH_NOFPU_MATH_TESTS_ROUNDING_H
+#define LOONGARCH_NOFPU_MATH_TESTS_ROUNDING_H 1
+
+/* On soft-float targets we only support the "to nearest" rounding mode.  */
+#define ROUNDING_TESTS_float(MODE)		((MODE) == FE_TONEAREST)
+#define ROUNDING_TESTS_double(MODE)		((MODE) == FE_TONEAREST)
+#define ROUNDING_TESTS_long_double(MODE)	((MODE) == FE_TONEAREST)
+
+#endif /* math-tests-rounding.h.  */
diff --git a/sysdeps/loongarch/preconfigure b/sysdeps/loongarch/preconfigure
index 118963cda6..f2d1a0d87b 100644
--- a/sysdeps/loongarch/preconfigure
+++ b/sysdeps/loongarch/preconfigure
@@ -12,7 +12,6 @@ loongarch*)
     case "$float_abi" in
     soft)
 	abi_flen=0
-	as_fn_error 1 "loongarch does not yet support soft floating-point  ABI!!" "$LINENO" 5
 	;;
     single)
 	as_fn_error 1 "glibc does not yet support the single floating-point ABI!!" "$LINENO" 5
diff --git a/sysdeps/loongarch/preconfigure.ac b/sysdeps/loongarch/preconfigure.ac
index 1aba743c15..67e4357013 100644
--- a/sysdeps/loongarch/preconfigure.ac
+++ b/sysdeps/loongarch/preconfigure.ac
@@ -12,7 +12,6 @@ loongarch*)
     case "$float_abi" in
     soft)
 	abi_flen=0
-	AC_MSG_ERROR([loongarch does not yet support soft floating-point  ABI!!], 1)
 	;;
     single)
 	AC_MSG_ERROR([glibc does not yet support the single floating-point ABI!!], 1)
diff --git a/sysdeps/loongarch/setjmp.S b/sysdeps/loongarch/setjmp.S
index 298bb02a82..9b1cdea48c 100644
--- a/sysdeps/loongarch/setjmp.S
+++ b/sysdeps/loongarch/setjmp.S
@@ -50,6 +50,7 @@ ENTRY (__sigsetjmp)
 	REG_S s7, a0, 11*SZREG
 	REG_S s8, a0, 12*SZREG
 
+#ifndef __loongarch_soft_float
 	FREG_S $f24, a0, 13*SZREG + 0*SZFREG
 	FREG_S $f25, a0, 13*SZREG + 1*SZFREG
 	FREG_S $f26, a0, 13*SZREG + 2*SZFREG
@@ -58,6 +59,7 @@ ENTRY (__sigsetjmp)
 	FREG_S $f29, a0, 13*SZREG + 5*SZFREG
 	FREG_S $f30, a0, 13*SZREG + 6*SZFREG
 	FREG_S $f31, a0, 13*SZREG + 7*SZFREG
+#endif
 
 #if !IS_IN (libc) && IS_IN(rtld)
 	li.w		v0, 0