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authorUlrich Drepper <drepper@redhat.com>2005-01-06 11:32:24 +0000
committerUlrich Drepper <drepper@redhat.com>2005-01-06 11:32:24 +0000
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2004-12-29 Jakub Jelinek <jakub@redhat.com> * sysdeps/ia64/fpu/libm_support.h (__libm_error_support): Use libc_hidden_proto instead of HIDDEN_PROTO. * sysdeps/ia64/fpu/libm-symbols.h (HIDDEN_PROTO): Remove. (__libm_error_support): If ASSEMBLER and in libc, define to HIDDEN_JUMPTARGET(__libm_error_support). 2004-12-28 David Mosberger <davidm@hpl.hp.com> * sysdeps/ia64/fpu/Makefile (duplicated-routines): New macro. (sysdep_routines): Replace libm_ldexp{,f,l} and libm_scalbn{,f,l} with $(duplicated-routines). (libm-sysdep_routines): Likewise, but substitute "s_" prefix for "m_" prefix. 2004-12-27 David Mosberger <davidm@hpl.hp.com> * sysdeps/ia64/fpu/libm-symbols.h: Add include of <sysdep.h> and undefine "ret" macro. Add __libm_error_support hidden definitions. * sysdeps/ia64/fpu/e_lgamma_r.c: Remove CVS-id comment. Add missing portion of copyright statement. * sysdeps/ia64/fpu/e_lgammaf_r.c: Likewise. * sysdeps/ia64/fpu/e_lgammal_r.c: Likewise. * sysdeps/ia64/fpu/w_lgamma.c: Remove CVS-id comment. Add missing portion of copyright statement. (__ieee754_lgamma): Rename from lgamma(). Make lgamma() a weak alias. (__ieee754_gamma): Likewise. * sysdeps/ia64/fpu/w_lgammaf.c: Likewise. * sysdeps/ia64/fpu/w_lgammal.c: Likewise. 2004-12-09 H. J. Lu <hjl@lucon.org> * sysdeps/ia64/fpu/s_nextafterl.c: Remove. * sysdeps/ia64/fpu/s_nexttoward.c: Likewise. * sysdeps/ia64/fpu/s_nexttowardf.c: Likewise. * sysdeps/ia64/fpu/e_atan2l.S: Remove (duplicate of e_atan2l.c). * sysdeps/ia64/fpu/e_expl.S: Likewise. * sysdeps/ia64/fpu/e_logl.c: Remove (conflicts with e_logl.S). 2004-11-18 David Mosberger <davidm@hpl.hp.com> * sysdeps/ia64/fpu/README: New file. * sysdeps/ia64/fpu/gen_import_file_list: New file. * sysdeps/ia64/fpu/import_check: Likewise. * sysdeps/ia64/fpu/import_diffs: Likewise. * sysdeps/ia64/fpu/import_file.awk: Likewise. * sysdeps/ia64/fpu/import_intel_libm: Likewise. * sysdeps/ia64/fpu/libm-symbols.h: Likewise. * sysdeps/ia64/fpu/e_acos.S: Update from Intel libm v2.1+. * sysdeps/ia64/fpu/e_acosf.S: Likewise. * sysdeps/ia64/fpu/e_acosl.S: Likewise. * sysdeps/ia64/fpu/e_asin.S: Likewise. * sysdeps/ia64/fpu/e_asinf.S: Likewise. * sysdeps/ia64/fpu/e_asinl.S: Likewise. * sysdeps/ia64/fpu/e_atan2.S: Likewise. * sysdeps/ia64/fpu/e_atan2f.S: Likewise. * sysdeps/ia64/fpu/e_cosh.S: Likewise. * sysdeps/ia64/fpu/e_coshf.S: Likewise. * sysdeps/ia64/fpu/e_coshl.S: Likewise. * sysdeps/ia64/fpu/e_exp.S: Likewise. * sysdeps/ia64/fpu/e_expf.S: Likewise. * sysdeps/ia64/fpu/e_fmod.S: Likewise. * sysdeps/ia64/fpu/e_fmodf.S: Likewise. * sysdeps/ia64/fpu/e_fmodl.S: Likewise. * sysdeps/ia64/fpu/e_hypot.S: Likewise. * sysdeps/ia64/fpu/e_hypotf.S: Likewise. * sysdeps/ia64/fpu/e_hypotl.S: Likewise. * sysdeps/ia64/fpu/e_log.S: Likewise. * sysdeps/ia64/fpu/e_log2.S: Likewise. * sysdeps/ia64/fpu/e_log2f.S: Likewise. * sysdeps/ia64/fpu/e_log2l.S: Likewise. * sysdeps/ia64/fpu/e_logf.S: Likewise. * sysdeps/ia64/fpu/e_pow.S: Likewise. * sysdeps/ia64/fpu/e_powf.S: Likewise. * sysdeps/ia64/fpu/e_powl.S: Likewise. * sysdeps/ia64/fpu/e_remainder.S: Likewise. * sysdeps/ia64/fpu/e_remainderf.S: Likewise. * sysdeps/ia64/fpu/e_remainderl.S: Likewise. * sysdeps/ia64/fpu/e_scalb.S: Likewise. * sysdeps/ia64/fpu/e_scalbf.S: Likewise. * sysdeps/ia64/fpu/e_scalbl.S: Likewise. * sysdeps/ia64/fpu/e_sinh.S: Likewise. * sysdeps/ia64/fpu/e_sinhf.S: Likewise. * sysdeps/ia64/fpu/e_sinhl.S: Likewise. * sysdeps/ia64/fpu/e_sqrt.S: Likewise. * sysdeps/ia64/fpu/e_sqrtf.S: Likewise. * sysdeps/ia64/fpu/e_sqrtl.S: Likewise. * sysdeps/ia64/fpu/libm_error.c: Likewise. * sysdeps/ia64/fpu/libm_reduce.c: Likewise. * sysdeps/ia64/fpu/libm_support.h: Likewise. * sysdeps/ia64/fpu/s_atan.S: Likewise. * sysdeps/ia64/fpu/s_atanf.S: Likewise. * sysdeps/ia64/fpu/s_atanl.S: Likewise. * sysdeps/ia64/fpu/s_cbrt.S: Likewise. * sysdeps/ia64/fpu/s_cbrtf.S: Likewise. * sysdeps/ia64/fpu/s_cbrtl.S: Likewise. * sysdeps/ia64/fpu/s_ceil.S: Likewise. * sysdeps/ia64/fpu/s_ceilf.S: Likewise. * sysdeps/ia64/fpu/s_ceill.S: Likewise. * sysdeps/ia64/fpu/s_cos.S: Likewise. * sysdeps/ia64/fpu/s_cosf.S: Likewise. * sysdeps/ia64/fpu/s_cosl.S: Likewise. * sysdeps/ia64/fpu/s_expm1.S: Likewise. * sysdeps/ia64/fpu/s_expm1f.S: Likewise. * sysdeps/ia64/fpu/s_expm1l.S: Likewise. * sysdeps/ia64/fpu/s_fabs.S: Likewise. * sysdeps/ia64/fpu/s_fabsf.S: Likewise. * sysdeps/ia64/fpu/s_fabsl.S: Likewise. * sysdeps/ia64/fpu/s_floor.S: Likewise. * sysdeps/ia64/fpu/s_floorf.S: Likewise. * sysdeps/ia64/fpu/s_floorl.S: Likewise. * sysdeps/ia64/fpu/s_frexp.c: Likewise. * sysdeps/ia64/fpu/s_frexpf.c: Likewise. * sysdeps/ia64/fpu/s_frexpl.c: Likewise. * sysdeps/ia64/fpu/s_ilogb.S: Likewise. * sysdeps/ia64/fpu/s_ilogbf.S: Likewise. * sysdeps/ia64/fpu/s_ilogbl.S: Likewise. * sysdeps/ia64/fpu/s_log1p.S: Likewise. * sysdeps/ia64/fpu/s_log1pf.S: Likewise. * sysdeps/ia64/fpu/s_log1pl.S: Likewise. * sysdeps/ia64/fpu/s_logb.S: Likewise. * sysdeps/ia64/fpu/s_logbf.S: Likewise. * sysdeps/ia64/fpu/s_logbl.S: Likewise. * sysdeps/ia64/fpu/s_modf.S: Likewise. * sysdeps/ia64/fpu/s_modff.S: Likewise. * sysdeps/ia64/fpu/s_modfl.S: Likewise. * sysdeps/ia64/fpu/s_nearbyint.S: Likewise. * sysdeps/ia64/fpu/s_nearbyintf.S: Likewise. * sysdeps/ia64/fpu/s_nearbyintl.S: Likewise. * sysdeps/ia64/fpu/s_rint.S: Likewise. * sysdeps/ia64/fpu/s_rintf.S: Likewise. * sysdeps/ia64/fpu/s_rintl.S: Likewise. * sysdeps/ia64/fpu/s_round.S: Likewise. * sysdeps/ia64/fpu/s_roundf.S: Likewise. * sysdeps/ia64/fpu/s_roundl.S: Likewise. * sysdeps/ia64/fpu/s_significand.S: Likewise. * sysdeps/ia64/fpu/s_significandf.S: Likewise. * sysdeps/ia64/fpu/s_significandl.S: Likewise. * sysdeps/ia64/fpu/s_tan.S: Likewise. * sysdeps/ia64/fpu/s_tanf.S: Likewise. * sysdeps/ia64/fpu/s_tanl.S: Likewise. * sysdeps/ia64/fpu/s_trunc.S: Likewise. * sysdeps/ia64/fpu/s_truncf.S: Likewise. * sysdeps/ia64/fpu/s_truncl.S: Likewise. * sysdeps/ia64/fpu/e_acosh.S: New file from Intel libm v2.1+. * sysdeps/ia64/fpu/e_acoshf.S: Likewise. * sysdeps/ia64/fpu/e_acoshl.S: Likewise. * sysdeps/ia64/fpu/e_atanh.S: Likewise. * sysdeps/ia64/fpu/e_atanhf.S: Likewise. * sysdeps/ia64/fpu/e_atanhl.S: Likewise. * sysdeps/ia64/fpu/e_exp10.S: Likewise. * sysdeps/ia64/fpu/e_exp10f.S: Likewise. * sysdeps/ia64/fpu/e_exp10l.S: Likewise. * sysdeps/ia64/fpu/e_exp2.S: Likewise. * sysdeps/ia64/fpu/e_exp2f.S: Likewise. * sysdeps/ia64/fpu/e_exp2l.S: Likewise. * sysdeps/ia64/fpu/e_lgamma_r.S: Likewise. * sysdeps/ia64/fpu/e_lgammaf_r.S: Likewise. * sysdeps/ia64/fpu/e_lgammal_r.S: Likewise. * sysdeps/ia64/fpu/e_logl.S: Likewise. * sysdeps/ia64/fpu/libm_frexp.S: Likewise. * sysdeps/ia64/fpu/libm_frexpf.S: Likewise. * sysdeps/ia64/fpu/libm_frexpl.S: Likewise. * sysdeps/ia64/fpu/s_libm_ldexp.S: Likewise. * sysdeps/ia64/fpu/s_libm_ldexpf.S: Likewise. * sysdeps/ia64/fpu/s_libm_ldexpl.S: Likewise. * sysdeps/ia64/fpu/s_libm_scalbn.S: Likewise. * sysdeps/ia64/fpu/s_libm_scalbnf.S: Likewise. * sysdeps/ia64/fpu/s_libm_scalbnl.S: Likewise. * sysdeps/ia64/fpu/libm_lgamma.S: Likewise. * sysdeps/ia64/fpu/libm_lgammaf.S: Likewise. * sysdeps/ia64/fpu/libm_lgammal.S: Likewise. * sysdeps/ia64/fpu/libm_sincos.S: Likewise. * sysdeps/ia64/fpu/libm_sincos_large.S: Likewise. * sysdeps/ia64/fpu/libm_sincosf.S: Likewise. * sysdeps/ia64/fpu/libm_sincosl.S: Likewise. * sysdeps/ia64/fpu/libm_scalblnf.S: Likewise. * sysdeps/ia64/fpu/s_asinh.S: Likewise. * sysdeps/ia64/fpu/s_asinhf.S: Likewise. * sysdeps/ia64/fpu/s_asinhl.S: Likewise. * sysdeps/ia64/fpu/s_erf.S: Likewise. * sysdeps/ia64/fpu/s_erfc.S: Likewise. * sysdeps/ia64/fpu/s_erfcf.S: Likewise. * sysdeps/ia64/fpu/s_erfcl.S: Likewise. * sysdeps/ia64/fpu/s_erff.S: Likewise. * sysdeps/ia64/fpu/s_erfl.S: Likewise. * sysdeps/ia64/fpu/s_fdim.S: Likewise. * sysdeps/ia64/fpu/s_fdimf.S: Likewise. * sysdeps/ia64/fpu/s_fdiml.S: Likewise. * sysdeps/ia64/fpu/s_fma.S: Likewise. * sysdeps/ia64/fpu/s_fmaf.S: Likewise. * sysdeps/ia64/fpu/s_fmal.S: Likewise. * sysdeps/ia64/fpu/s_fmax.S: Likewise. * sysdeps/ia64/fpu/s_fmaxf.S: Likewise. * sysdeps/ia64/fpu/s_fmaxl.S: Likewise. * sysdeps/ia64/fpu/s_ldexp.c: Likewise. * sysdeps/ia64/fpu/s_ldexpf.c: Likewise. * sysdeps/ia64/fpu/s_ldexpl.c: Likewise. * sysdeps/ia64/fpu/s_nextafter.S: Likewise. * sysdeps/ia64/fpu/s_nextafterf.S: Likewise. * sysdeps/ia64/fpu/s_nextafterl.S: Likewise. * sysdeps/ia64/fpu/s_nexttoward.S: Likewise. * sysdeps/ia64/fpu/s_nexttowardf.S: Likewise. * sysdeps/ia64/fpu/s_nexttowardl.S: Likewise. * sysdeps/ia64/fpu/s_tanh.S: Likewise. * sysdeps/ia64/fpu/s_tanhf.S: Likewise. * sysdeps/ia64/fpu/s_tanhl.S: Likewise. * sysdeps/ia64/fpu/s_scalblnf.c: Likewise. * sysdeps/ia64/fpu/w_lgamma.c: Likewise. * sysdeps/ia64/fpu/w_lgammaf.c: Likewise. * sysdeps/ia64/fpu/w_lgammal.c: Likewise. * sysdeps/ia64/fpu/w_tgamma.S: Likewise. * sysdeps/ia64/fpu/w_tgammaf.S: Likewise. * sysdeps/ia64/fpu/w_tgammal.S: Likewise. * sysdeps/ia64/fpu/e_gamma_r.c: New empty dummy-file. * sysdeps/ia64/fpu/e_gammaf_r.c: Likewise. * sysdeps/ia64/fpu/e_gammal_r.c: Likewise. * sysdeps/ia64/fpu/w_acosh.c: Likewise. * sysdeps/ia64/fpu/w_acoshf.c: Likewise. * sysdeps/ia64/fpu/w_acoshl.c: Likewise. * sysdeps/ia64/fpu/w_atanh.c: Likewise. * sysdeps/ia64/fpu/w_atanhf.c: Likewise. * sysdeps/ia64/fpu/w_atanhl.c: Likewise. * sysdeps/ia64/fpu/w_exp10.c: Likewise. * sysdeps/ia64/fpu/w_exp10f.c: Likewise. * sysdeps/ia64/fpu/w_exp10l.c: Likewise. * sysdeps/ia64/fpu/w_exp2.c: Likewise. * sysdeps/ia64/fpu/w_exp2f.c: Likewise. * sysdeps/ia64/fpu/w_exp2l.c: Likewise. * sysdeps/ia64/fpu/w_expl.c: Likewise. * sysdeps/ia64/fpu/e_expl.S: Likewise. * sysdeps/ia64/fpu/w_lgamma_r.c: Likewise. * sysdeps/ia64/fpu/w_lgammaf_r.c: Likewise. * sysdeps/ia64/fpu/w_lgammal_r.c: Likewise. * sysdeps/ia64/fpu/w_log2.c: Likewise. * sysdeps/ia64/fpu/w_log2f.c: Likewise. * sysdeps/ia64/fpu/w_log2l.c: Likewise. * sysdeps/ia64/fpu/w_sinh.c: Likewise. * sysdeps/ia64/fpu/w_sinhf.c: Likewise. * sysdeps/ia64/fpu/w_sinhl.c: Likewise. * sysdeps/ia64/fpu/libm_atan2_reg.S: Remove. * sysdeps/ia64/fpu/s_ldexp.S: Likewise. * sysdeps/ia64/fpu/s_ldexpf.S: Likewise. * sysdeps/ia64/fpu/s_ldexpl.S: Likewise. * sysdeps/ia64/fpu/s_scalbn.S: Likewise. * sysdeps/ia64/fpu/s_scalbnf.S: Likewise. * sysdeps/ia64/fpu/s_scalbnl.S: Likewise. * sysdeps/ia64/fpu/s_sincos.c: Make it an empty dummy-file. * sysdeps/ia64/fpu/s_sincosf.c: Likewise. * sysdeps/ia64/fpu/s_sincosl.c: Likewise. * sysdeps/ia64/fpu/e_atan2l.S: Add "Not needed" comment. * sysdeps/ia64/fpu/s_copysign.S: Add __libm_copysign{,f,l} alias for use by libm_error.c * sysdeps/ia64/fpu/Makefile (libm-sysdep_routines): Remove libm_atan2_reg, libm_tan, libm_frexp4{f,l}. Mention s_erfc{,f,l}, libm_frexp{,f,l}, libm_ldexp{,f,l}, libm_sincos{,f,l}, libm_sincos_large, libm_lgamma{,f,l}, libm_scalbn{,f,l}, libm_scalblnf. (sysdep_routines): Remove libm_frexp4{,f,l}. Mention libm_frexp{,f,l}, libm_ldexp{,f,l}, and libm_scalbn{,f,l}. (sysdep-CPPFLAGS): Add -include libm-symbols.h, -D__POSIX__, _D_LIB_VERSIONIMF=_LIB_VERSION, -DSIZE_LONG_INT_64, and -DSIZE_LONG_LONG_INT_64.
Diffstat (limited to 'sysdeps/ia64/fpu/s_ceil.S')
-rw-r--r--sysdeps/ia64/fpu/s_ceil.S274
1 files changed, 118 insertions, 156 deletions
diff --git a/sysdeps/ia64/fpu/s_ceil.S b/sysdeps/ia64/fpu/s_ceil.S
index f7e6d2cfa6..d1d2980618 100644
--- a/sysdeps/ia64/fpu/s_ceil.S
+++ b/sysdeps/ia64/fpu/s_ceil.S
@@ -1,10 +1,10 @@
.file "ceil.s"
-// Copyright (C) 2000, 2001, Intel Corporation
+
+// Copyright (c) 2000 - 2003, Intel Corporation
// All rights reserved.
-//
-// Contributed 2/2/2000 by John Harrison, Ted Kubaska, Bob Norin, Shane Story,
-// and Ping Tak Peter Tang of the Computational Software Lab, Intel Corporation.
+//
+// Contributed 2000 by the Intel Numerics Group, Intel Corporation
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are
@@ -20,90 +20,67 @@
// * The name of Intel Corporation may not be used to endorse or promote
// products derived from this software without specific prior written
// permission.
-//
-// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS
+// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS
// CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
-// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
-// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
-// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
+// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
// OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING
-// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
+// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+//
// Intel Corporation is the author of this code, and requests that all
-// problem reports or change requests be submitted to it directly at
-// http://developer.intel.com/opensource.
+// problem reports or change requests be submitted to it directly at
+// http://www.intel.com/software/products/opensource/libraries/num.htm.
//
-
-#include "libm_support.h"
-
-.align 32
-.global ceil#
-
-.section .text
-.proc ceil#
-.align 32
-
// History
//==============================================================
-// 2/02/00: Initial version
-// 6/13/00: Improved speed
-// 6/27/00: Eliminated incorrect invalid flag setting
+// 02/02/00 Initial version
+// 06/13/00 Improved speed
+// 06/27/00 Eliminated incorrect invalid flag setting
+// 05/20/02 Cleaned up namespace and sf0 syntax
+// 01/28/03 Improved performance
+//==============================================================
// API
//==============================================================
// double ceil(double x)
+//==============================================================
-// general input registers:
-
-ceil_GR_FFFF = r14
-ceil_GR_signexp = r15
-ceil_GR_exponent = r16
-ceil_GR_expmask = r17
-ceil_GR_bigexp = r18
-
-
-// predicate registers used:
+// general input registers:
+// r14 - r19
-// p6 ==> Input is NaN, infinity, zero
-// p7 ==> Input is denormal
-// p8 ==> Input is <0
-// p9 ==> Input is >=0
-// p10 ==> Input is already an integer (bigger than largest integer)
-// p11 ==> Input is not a large integer
-// p12 ==> Input is a smaller integer
-// p13 ==> Input is not an even integer, so inexact must be set
-// p14 ==> Input is between -1 and 0, so result will be -0 and inexact
+rSignexp = r14
+rExp = r15
+rExpMask = r16
+rBigexp = r17
+rM1 = r18
+rSignexpM1 = r19
+// floating-point registers:
+// f8 - f13
-// floating-point registers used:
+fXInt = f9
+fNormX = f10
+fTmp = f11
+fAdj = f12
+fPreResult = f13
-CEIL_SIGNED_ZERO = f7
-CEIL_NORM_f8 = f9
-CEIL_FFFF = f10
-CEIL_INEXACT = f11
-CEIL_FLOAT_INT_f8 = f12
-CEIL_INT_f8 = f13
-CEIL_adj = f14
-CEIL_MINUS_ONE = f15
+// predicate registers used:
+// p6 - p10
// Overview of operation
//==============================================================
-
// double ceil(double x)
-// Return an integer value (represented as a double) that is the smallest
+// Return an integer value (represented as a double) that is the smallest
// value not less than x
// This is x rounded toward +infinity to an integral value.
// Inexact is set if x != ceil(x)
-// **************************************************************************
-
-// Set denormal flag for denormal input and
-// and take denormal fault if necessary.
-
-// Is the input an integer value already?
+//==============================================================
// double_extended
// if the exponent is > 1003e => 3F(true) = 63(decimal)
@@ -124,139 +101,124 @@ CEIL_MINUS_ONE = f15
// If we multiply by 2^23, we no longer have a fractional part
// So input is an integer value already.
-// If x is NAN, ZERO, or INFINITY, then return
-
-// qnan snan inf norm unorm 0 -+
-// 1 1 1 0 0 1 11 0xe7
-
-ceil:
+.section .text
+GLOBAL_LIBM_ENTRY(ceil)
{ .mfi
- getf.exp ceil_GR_signexp = f8
- fcvt.fx.trunc.s1 CEIL_INT_f8 = f8
- addl ceil_GR_bigexp = 0x10033, r0
+ getf.exp rSignexp = f8 // Get signexp, recompute if unorm
+ fclass.m p7,p0 = f8, 0x0b // Test x unorm
+ addl rBigexp = 0x10033, r0 // Set exponent at which is integer
}
{ .mfi
- addl ceil_GR_FFFF = -1,r0
- fcmp.lt.s1 p8,p9 = f8,f0
- mov ceil_GR_expmask = 0x1FFFF ;;
+ mov rM1 = -1 // Set all ones
+ fcvt.fx.trunc.s1 fXInt = f8 // Convert to int in significand
+ mov rExpMask = 0x1FFFF // Form exponent mask
}
+;;
-// p7 ==> denorm
{ .mfi
- setf.sig CEIL_FFFF = ceil_GR_FFFF
- fclass.m p7,p0 = f8, 0x0b
- nop.i 999
+ mov rSignexpM1 = 0x2FFFF // Form signexp of -1
+ fcmp.lt.s1 p8,p9 = f8, f0 // Test x < 0
+ nop.i 0
}
-{ .mfi
- nop.m 999
- fnorm CEIL_NORM_f8 = f8
- nop.i 999 ;;
+{ .mfb
+ setf.sig fTmp = rM1 // Make const for setting inexact
+ fnorm.s1 fNormX = f8 // Normalize input
+(p7) br.cond.spnt CEIL_UNORM // Branch if x unorm
}
+;;
-// Form 0 with sign of input in case negative zero is needed
-{ .mfi
- nop.m 999
- fmerge.s CEIL_SIGNED_ZERO = f8, f0
- nop.i 999
-}
+CEIL_COMMON:
+// Return here from CEIL_UNORM
{ .mfi
- nop.m 999
- fsub.s1 CEIL_MINUS_ONE = f0, f1
- nop.i 999 ;;
-}
-
-// p6 ==> NAN, INF, ZERO
-{ .mfb
- nop.m 999
- fclass.m p6,p10 = f8, 0xe7
-(p7) br.cond.spnt L(CEIL_DENORM) ;;
+ nop.m 0
+ fclass.m p6,p0 = f8, 0x1e7 // Test x natval, nan, inf, 0
+ nop.i 0
}
+;;
-L(CEIL_COMMON):
.pred.rel "mutex",p8,p9
-// Set adjustment to add to trunc(x) for result
-// If x>0, adjustment is 1.0
-// If x<=0, adjustment is 0.0
{ .mfi
- and ceil_GR_exponent = ceil_GR_signexp, ceil_GR_expmask
-(p9) fadd.s1 CEIL_adj = f1,f0
- nop.i 999
+ nop.m 0
+(p8) fma.s1 fAdj = f0, f0, f0 // If x < 0, adjustment is 0
+ nop.i 0
}
{ .mfi
- nop.m 999
-(p8) fadd.s1 CEIL_adj = f0,f0
- nop.i 999 ;;
+ nop.m 0
+(p9) fma.s1 fAdj = f1, f1, f0 // If x > 0, adjustment is +1
+ nop.i 0
}
+;;
{ .mfi
-(p10) cmp.ge.unc p10,p11 = ceil_GR_exponent, ceil_GR_bigexp
-(p6) fnorm.d f8 = f8
- nop.i 999 ;;
+ nop.m 0
+ fcvt.xf fPreResult = fXInt // trunc(x)
+ nop.i 0
}
-
-{ .mfi
- nop.m 999
-(p11) fcvt.xf CEIL_FLOAT_INT_f8 = CEIL_INT_f8
- nop.i 999 ;;
+{ .mfb
+ nop.m 0
+(p6) fma.d.s0 f8 = f8, f1, f0 // Result if x natval, nan, inf, 0
+(p6) br.ret.spnt b0 // Exit if x natval, nan, inf, 0
}
+;;
-{ .mfi
- nop.m 999
-(p10) fnorm.d f8 = CEIL_NORM_f8
- nop.i 999 ;;
+{ .mmi
+ and rExp = rSignexp, rExpMask // Get biased exponent
+;;
+ cmp.ge p7,p6 = rExp, rBigexp // Is |x| >= 2^52?
+(p8) cmp.lt.unc p10,p0 = rSignexp, rSignexpM1 // Is -1 < x < 0?
}
+;;
-// Is -1 < x < 0? If so, result will be -0. Special case it with p14 set.
+// If -1 < x < 0, we turn off p6 and compute result as -0
{ .mfi
- nop.m 999
-(p8) fcmp.gt.unc.s1 p14,p0 = CEIL_NORM_f8, CEIL_MINUS_ONE
- nop.i 999 ;;
+(p10) cmp.ne p6,p0 = r0,r0
+(p10) fmerge.s f8 = fNormX, f0
+ nop.i 0
}
+;;
+.pred.rel "mutex",p6,p7
{ .mfi
-(p14) cmp.ne p11,p0 = r0,r0
-(p14) fnorm.d f8 = CEIL_SIGNED_ZERO
- nop.i 999
+ nop.m 0
+(p6) fma.d.s0 f8 = fPreResult, f1, fAdj // Result if !int, |x| < 2^52
+ nop.i 0
}
{ .mfi
- nop.m 999
-(p14) fmpy.s0 CEIL_INEXACT = CEIL_FFFF,CEIL_FFFF
- nop.i 999 ;;
+ nop.m 0
+(p7) fma.d.s0 f8 = fNormX, f1, f0 // Result, if |x| >= 2^52
+(p10) cmp.eq p6,p0 = r0,r0 // If -1 < x < 0, turn on p6 again
}
+;;
{ .mfi
- nop.m 999
-(p11) fadd.d f8 = CEIL_FLOAT_INT_f8,CEIL_adj
- nop.i 999 ;;
-}
-{ .mfi
- nop.m 999
-(p11) fcmp.eq.unc.s1 p12,p13 = CEIL_FLOAT_INT_f8, CEIL_NORM_f8
- nop.i 999 ;;
+ nop.m 0
+(p6) fcmp.eq.unc.s1 p8, p9 = fPreResult, fNormX // Is trunc(x) = x ?
+ nop.i 0
}
+;;
-// Set inexact if result not equal to input
{ .mfi
- nop.m 999
-(p13) fmpy.s0 CEIL_INEXACT = CEIL_FFFF,CEIL_FFFF
- nop.i 999
+ nop.m 0
+(p9) fmpy.s0 fTmp = fTmp, fTmp // Dummy to set inexact
+ nop.i 0
}
-// Set result to input if integer
{ .mfb
- nop.m 999
-(p12) fnorm.d f8 = CEIL_NORM_f8
- br.ret.sptk b0 ;;
+ nop.m 0
+(p8) fma.d.s0 f8 = fNormX, f1, f0 // If x int, result normalized x
+ br.ret.sptk b0 // Exit main path, 0 < |x| < 2^52
}
+;;
+
-// Here if input denorm
-L(CEIL_DENORM):
+CEIL_UNORM:
+// Here if x unorm
{ .mfb
- getf.exp ceil_GR_signexp = CEIL_NORM_f8
- fcvt.fx.trunc.s1 CEIL_INT_f8 = CEIL_NORM_f8
- br.cond.sptk L(CEIL_COMMON) ;;
+ getf.exp rSignexp = fNormX // Get signexp, recompute if unorm
+ fcmp.eq.s0 p7,p0 = f8, f0 // Dummy op to set denormal flag
+ br.cond.sptk CEIL_COMMON // Return to main path
}
+;;
-.endp ceil
-ASM_SIZE_DIRECTIVE(ceil)
+GLOBAL_LIBM_END(ceil)