diff options
author | Ulrich Drepper <drepper@redhat.com> | 1998-05-21 15:40:14 +0000 |
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committer | Ulrich Drepper <drepper@redhat.com> | 1998-05-21 15:40:14 +0000 |
commit | 23f0c99c0eb54cd481167d5927dafc1650bcbca1 (patch) | |
tree | cd1db4054738b46da815bf3a258b143b20063170 /sysdeps/arm/fpu_control.h | |
parent | 32c85e43ed25cc954cb9ba62a6aad7c9338a2a08 (diff) | |
download | glibc-23f0c99c0eb54cd481167d5927dafc1650bcbca1.tar glibc-23f0c99c0eb54cd481167d5927dafc1650bcbca1.tar.gz glibc-23f0c99c0eb54cd481167d5927dafc1650bcbca1.tar.bz2 glibc-23f0c99c0eb54cd481167d5927dafc1650bcbca1.zip |
Update.
1998-05-21 15:27 Ulrich Drepper <drepper@cygnus.com>
* wcsmbs/wcsnrtombs.c: Correct computation of result.
* wcsmbs/wcsrtombs.c: Likewise.
* wcsmbs/Makefile (tests): Add wcsmbs-tst1.c.
* wcsmbs/wcsmbs-tst1.c: New file.
* iconv/loop.c (COUNT_CONVERTED): Correct computation.
* locale/C-ctype.c (_nl_C_LC_CTYPE): Define MB_CUR_MAX for C locale
as 1.
* locale/setlocale.c: Don't make _nl_current_* and _nl_C_* references
weak.
1998-05-21 Philip Blundell <philb@gnu.org>
* sysdeps/arm/fpu_control.h: Replace stub file with real
implementation.
* sysdeps/arm/fpu/bits/fenv.h: New file.
* sysdeps/arm/fpu/fesetround.c: Likewise.
* sysdeps/arm/fpu/fclrexcpt.c: Likewise.
* sysdeps/arm/fpu/fsetexcptflag.c: Likewise.
* sysdeps/arm/fpu/ftestexcpt.c: Likewise.
* sysdeps/arm/fpu/fraiseexcpt.c: Likewise.
* sysdeps/arm/fpu/fegetenv.c: Likewise.
* sysdeps/arm/fpu/fesetenv.c: Likewise.
1998-05-21 16:34 Richard Henderson <rth@cygnus.com>
* elf/dl-load.c (_dl_map_object_from_fd): Get file header with
read instead of mmap.
Diffstat (limited to 'sysdeps/arm/fpu_control.h')
-rw-r--r-- | sysdeps/arm/fpu_control.h | 61 |
1 files changed, 53 insertions, 8 deletions
diff --git a/sysdeps/arm/fpu_control.h b/sysdeps/arm/fpu_control.h index 054085d70a..8a2d338c49 100644 --- a/sysdeps/arm/fpu_control.h +++ b/sysdeps/arm/fpu_control.h @@ -1,5 +1,5 @@ -/* FPU control word definitions. Stub version. - Copyright (C) 1996, 1997 Free Software Foundation, Inc. +/* FPU control word definitions. ARM version. + Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc. This file is part of the GNU C Library. The GNU C Library is free software; you can redistribute it and/or @@ -20,7 +20,54 @@ #ifndef _FPU_CONTROL_H #define _FPU_CONTROL_H -#define _FPU_RESERVED 0xffffffff /* These bits are reserved. */ +/* We have a slight terminology confusion here. On the ARM, the register + * we're interested in is actually the FPU status word - the FPU control + * word is something different (which is implementation-defined and only + * accessible from supervisor mode.) + * + * The FPSR looks like this: + * + * 31-24 23-16 15-8 7-0 + * | system ID | trap enable | system control | exception flags | + * + * We ignore the system ID bits; for interest's sake they are: + * + * 0000 "old" FPE + * 1000 FPPC hardware + * 0001 FPE 400 + * 1001 FPA hardware + * + * The trap enable and exception flags are both structured like this: + * + * 7 - 5 4 3 2 1 0 + * | reserved | INX | UFL | OFL | DVZ | IVO | + * + * where a `1' bit in the enable byte means that the trap can occur, and + * a `1' bit in the flags byte means the exception has occurred. + * + * The exceptions are: + * + * IVO - invalid operation + * DVZ - divide by zero + * OFL - overflow + * UFL - underflow + * INX - inexact (do not use; implementations differ) + * + * The system control byte looks like this: + * + * 7-5 4 3 2 1 0 + * | reserved | AC | EP | SO | NE | ND | + * + * where the bits mean + * + * ND - no denormalised numbers (force them all to zero) + * NE - enable NaN exceptions + * SO - synchronous operation + * EP - use expanded packed-decimal format + * AC - use alternate definition for C flag on compare operations + */ + +#define _FPU_RESERVED 0xfff0e0f0 /* These bits are reserved. */ /* The fdlibm code requires no interrupts for exceptions. Don't change the rounding mode, it would break long double I/O! */ @@ -29,11 +76,9 @@ /* Type of the control word. */ typedef unsigned int fpu_control_t; -/* Macros for accessing the hardware control word. - * On the ARM, we can't do this from user mode (it would trap). - */ -#define _FPU_GETCW(cw) __asm__ ("movnv r0,r0" : "=g" (cw)) -#define _FPU_SETCW(cw) __asm__ ("movnv r0,r0" : : "g" (cw)) +/* Macros for accessing the hardware control word. */ +#define _FPU_GETCW(cw) __asm__ ("rfs %0" : "=r" (cw)) +#define _FPU_SETCW(cw) __asm__ ("wfs %0" : : "r" (cw)) /* Default control word set at startup. */ extern fpu_control_t __fpu_control; |