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authorWilco Dijkstra <wdijkstr@arm.com>2018-02-09 16:59:23 +0000
committerWilco Dijkstra <wdijkstr@arm.com>2018-02-09 16:59:23 +0000
commit3f8d9d58c59fdbe27301d0e18bfd426a5f2edf19 (patch)
tree95b78c1df2253b5f48f278ed16d3692acdcc73de /sysdeps/aarch64
parent1f6676d7da1b7c864e9a5d59fe9162a88bd21952 (diff)
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[AArch64] Use builtins for fpcr/fpsr
Since GCC has support for accessing FPSR/FPCR, use them when possible so that the asm instructions can be removed eventually. Although GCC 5 supports the builtins, it has an optimization bug, so use them from GCC 6 onwards. * sysdeps/aarch64/fpu/fpu_control.h: Use builtins for accessing FPCR/FPSR.
Diffstat (limited to 'sysdeps/aarch64')
-rw-r--r--sysdeps/aarch64/fpu/fpu_control.h15
1 files changed, 11 insertions, 4 deletions
diff --git a/sysdeps/aarch64/fpu/fpu_control.h b/sysdeps/aarch64/fpu/fpu_control.h
index 570e3dca78..d0cc5afc9f 100644
--- a/sysdeps/aarch64/fpu/fpu_control.h
+++ b/sysdeps/aarch64/fpu/fpu_control.h
@@ -21,17 +21,24 @@
/* Macros for accessing the FPCR and FPSR. */
-#define _FPU_GETCW(fpcr) \
+#if __GNUC_PREREQ (6,0)
+# define _FPU_GETCW(fpcr) (fpcr = __builtin_aarch64_get_fpcr ())
+# define _FPU_SETCW(fpcr) __builtin_aarch64_set_fpcr (fpcr)
+# define _FPU_GETFPSR(fpsr) (fpsr = __builtin_aarch64_get_fpsr ())
+# define _FPU_SETFPSR(fpsr) __builtin_aarch64_set_fpsr (fpsr)
+#else
+# define _FPU_GETCW(fpcr) \
__asm__ __volatile__ ("mrs %0, fpcr" : "=r" (fpcr))
-#define _FPU_SETCW(fpcr) \
+# define _FPU_SETCW(fpcr) \
__asm__ __volatile__ ("msr fpcr, %0" : : "r" (fpcr))
-#define _FPU_GETFPSR(fpsr) \
+# define _FPU_GETFPSR(fpsr) \
__asm__ __volatile__ ("mrs %0, fpsr" : "=r" (fpsr))
-#define _FPU_SETFPSR(fpsr) \
+# define _FPU_SETFPSR(fpsr) \
__asm__ __volatile__ ("msr fpsr, %0" : : "r" (fpsr))
+#endif
/* Reserved bits should be preserved when modifying register
contents. These two masks indicate which bits in each of FPCR and