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| author | Joe Ramsay <Joe.Ramsay@arm.com> | 2023-11-03 12:12:19 +0000 |
|---|---|---|
| committer | Szabolcs Nagy <szabolcs.nagy@arm.com> | 2023-11-10 17:07:42 +0000 |
| commit | 9bed498418c163f7c6def447a38b09879e2b4612 (patch) | |
| tree | 1174644f8b373e9664f053a431cbe2d8ba5ba40a /sysdeps/aarch64/fpu/test-double-advsimd-wrappers.c | |
| parent | d1dcb565a1fb5829f9476a1438c30eccc4027d04 (diff) | |
| download | glibc-9bed498418c163f7c6def447a38b09879e2b4612.tar glibc-9bed498418c163f7c6def447a38b09879e2b4612.tar.gz glibc-9bed498418c163f7c6def447a38b09879e2b4612.tar.bz2 glibc-9bed498418c163f7c6def447a38b09879e2b4612.zip | |
aarch64: Add vector implementations of asin routines
Diffstat (limited to 'sysdeps/aarch64/fpu/test-double-advsimd-wrappers.c')
| -rw-r--r-- | sysdeps/aarch64/fpu/test-double-advsimd-wrappers.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/sysdeps/aarch64/fpu/test-double-advsimd-wrappers.c b/sysdeps/aarch64/fpu/test-double-advsimd-wrappers.c index 26d5ecf66f..b5ccd6b1cc 100644 --- a/sysdeps/aarch64/fpu/test-double-advsimd-wrappers.c +++ b/sysdeps/aarch64/fpu/test-double-advsimd-wrappers.c @@ -23,6 +23,7 @@ #define VEC_TYPE float64x2_t +VPCS_VECTOR_WRAPPER (asin_advsimd, _ZGVnN2v_asin) VPCS_VECTOR_WRAPPER (cos_advsimd, _ZGVnN2v_cos) VPCS_VECTOR_WRAPPER (exp_advsimd, _ZGVnN2v_exp) VPCS_VECTOR_WRAPPER (exp10_advsimd, _ZGVnN2v_exp10) |