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| author | Guido Guenther <agx@sigxcpu.org> | 2012-08-27 12:20:25 -0400 |
|---|---|---|
| committer | Mike Frysinger <vapier@gentoo.org> | 2012-08-27 12:41:28 -0400 |
| commit | 89570c6269318b01646448810bcb28342f18ea0b (patch) | |
| tree | 248fb30623f8cb39a500aa1f29152c573b43307d /ports | |
| parent | 563c840564dce77de47b3912a741baa93bdd3b67 (diff) | |
| download | glibc-89570c6269318b01646448810bcb28342f18ea0b.tar glibc-89570c6269318b01646448810bcb28342f18ea0b.tar.gz glibc-89570c6269318b01646448810bcb28342f18ea0b.tar.bz2 glibc-89570c6269318b01646448810bcb28342f18ea0b.zip | |
mips: clear condition bit 23 in fpu too
We've been carrying this in Gentoo for quite a long time to fix some test
failures that people hit.
Original message:
> make[4]: *** [/glibc/glibc-package-2.3/mips-linux/obj/math/test-fpucw.out] Error 1
This test fails since the read back fpu control word is 0x80000 instead
of 0x0. I wonder if this patch is correct:
...
which additionally masks out the condition bit 23 - note that the other
condition bits (25-31) are masked out too?
URL: http://sourceware.org/ml/libc-alpha/2002-10/msg00392.html
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'ports')
| -rw-r--r-- | ports/ChangeLog.mips | 4 | ||||
| -rw-r--r-- | ports/sysdeps/mips/fpu_control.h | 2 |
2 files changed, 5 insertions, 1 deletions
diff --git a/ports/ChangeLog.mips b/ports/ChangeLog.mips index 2d1ca84c8a..8d919d0915 100644 --- a/ports/ChangeLog.mips +++ b/ports/ChangeLog.mips @@ -1,3 +1,7 @@ +2012-08-27 Guido Guenther <agx@sigxcpu.org> + + * sysdeps/mips/fpu_control.h (_FPU_RESERVED): Set bit 23. + 2012-08-22 Joseph Myers <joseph@codesourcery.com> * sysdeps/unix/sysv/linux/mips/kernel-features.h [_MIPS_SIM == diff --git a/ports/sysdeps/mips/fpu_control.h b/ports/sysdeps/mips/fpu_control.h index e9c859a4e3..7307d030ea 100644 --- a/ports/sysdeps/mips/fpu_control.h +++ b/ports/sysdeps/mips/fpu_control.h @@ -85,7 +85,7 @@ extern fpu_control_t __fpu_control; #define _FPU_RC_UP 0x2 #define _FPU_RC_DOWN 0x3 -#define _FPU_RESERVED 0xfe3c0000 /* Reserved bits in cw */ +#define _FPU_RESERVED 0xfebc0000 /* Reserved bits in cw */ /* The fdlibm code requires strict IEEE double precision arithmetic, |