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author | Joseph Myers <joseph@codesourcery.com> | 2013-06-17 17:20:23 +0000 |
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committer | Joseph Myers <joseph@codesourcery.com> | 2013-06-17 17:20:23 +0000 |
commit | 3023a72eb83751a23b01b6cb996fb81fe3abbcb6 (patch) | |
tree | 9dc05fe06ed6a8dd31c1809666bc0f568ea5fdab /ports/sysdeps | |
parent | 12086fb4835639d1762622d80980a7500799b63e (diff) | |
download | glibc-3023a72eb83751a23b01b6cb996fb81fe3abbcb6.tar glibc-3023a72eb83751a23b01b6cb996fb81fe3abbcb6.tar.gz glibc-3023a72eb83751a23b01b6cb996fb81fe3abbcb6.tar.bz2 glibc-3023a72eb83751a23b01b6cb996fb81fe3abbcb6.zip |
Make ARM feenableexcept detect failure (bug 14907).
Diffstat (limited to 'ports/sysdeps')
-rw-r--r-- | ports/sysdeps/arm/feenablxcpt.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/ports/sysdeps/arm/feenablxcpt.c b/ports/sysdeps/arm/feenablxcpt.c index baad4320cc..e2e287b6e5 100644 --- a/ports/sysdeps/arm/feenablxcpt.c +++ b/ports/sysdeps/arm/feenablxcpt.c @@ -39,6 +39,18 @@ feenableexcept (int excepts) _FPU_SETCW(new_exc); + if (excepts != 0) + { + /* VFPv3 and VFPv4 do not support trapping exceptions, so + test whether the relevant bits were set and fail if + not. */ + unsigned int temp; + _FPU_GETCW (temp); + if ((temp & (excepts << FE_EXCEPT_SHIFT)) + != (excepts << FE_EXCEPT_SHIFT)) + return -1; + } + return old_exc; } |