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author | Chris Metcalf <cmetcalf@tilera.com> | 2012-10-11 12:15:45 -0400 |
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committer | Chris Metcalf <cmetcalf@tilera.com> | 2012-10-12 14:26:25 -0400 |
commit | b8d7c0968c095d25fded0e2dfea1a16b1fd42911 (patch) | |
tree | 23fcb29c3e941adaeece6e4375deedcecd7e305a /ports/ChangeLog.tile | |
parent | d394eb742a3565d7fe7a4b02710a60b5f219ee64 (diff) | |
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tilegx: add optimized sched_getcpu() using TILE_COORD SPR
We can discover our x,y coordinate in the core mesh with an
mfspr instruction, multiply y by the core mesh width, and have
the core number without needing to ask the kernel.
Diffstat (limited to 'ports/ChangeLog.tile')
-rw-r--r-- | ports/ChangeLog.tile | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/ports/ChangeLog.tile b/ports/ChangeLog.tile index 2d19358e75..dfe5e9c60f 100644 --- a/ports/ChangeLog.tile +++ b/ports/ChangeLog.tile @@ -1,3 +1,7 @@ +2012-10-11 Chris Metcalf <cmetcalf@tilera.com> + + * sysdeps/unix/sysv/linux/tile/tilegx/sched_getcpu.c: New file. + 2012-10-02 Siddhesh Poyarekar <siddhesh@redhat.com> * sysdeps/unix/sysv/linux/tile/nptl/lowlevellock.h: Fix clone |