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authorNoah Goldstein <goldstein.w.n@gmail.com>2022-06-29 16:11:22 -0700
committerNoah Goldstein <goldstein.w.n@gmail.com>2022-07-05 16:42:42 -0700
commitae308947ff0fa950431d53bcc90c875295d57715 (patch)
treed14ede08a3dae637cdd57410d42e3dcf00624e2c /nptl/tst-thread-affinity-sched.c
parent37ecc657b22c3367a56df5ebd53908e34e65fa16 (diff)
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x86: Add support for building {w}memcmp{eq} with explicit ISA level
1. Refactor files so that all implementations are in the multiarch directory - Moved the implementation portion of memcmp sse2 from memcmp.S to multiarch/memcmp-sse2.S - The non-multiarch file now only includes one of the implementations in the multiarch directory based on the compiled ISA level (only used for non-multiarch builds. Otherwise we go through the ifunc selector). 2. Add ISA level build guards to different implementations. - I.e memcmp-avx2-movsb.S which is ISA level 3 will only build if compiled ISA level <= 3. Otherwise there is no reason to include it as we will always use one of the ISA level 4 implementations (memcmp-evex-movbe.S). 3. Add new multiarch/rtld-{w}memcmp{eq}.S that just include the non-multiarch {w}memcmp{eq}.S which will in turn select the best implementation based on the compiled ISA level. 4. Refactor the ifunc selector and ifunc implementation list to use the ISA level aware wrapper macros that allow functions below the compiled ISA level (with a guranteed replacement) to be skipped. Tested with and without multiarch on x86_64 for ISA levels: {generic, x86-64-v2, x86-64-v3, x86-64-v4} And m32 with and without multiarch.
Diffstat (limited to 'nptl/tst-thread-affinity-sched.c')
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