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| author | Wilco Dijkstra <wdijkstr@arm.com> | 2019-05-17 18:16:20 +0100 |
|---|---|---|
| committer | Wilco Dijkstra <wdijkstr@arm.com> | 2019-05-17 18:16:20 +0100 |
| commit | 1f50f2ad854c84ead522bfc7331b46dbe6057d53 (patch) | |
| tree | a350b22461a9b819877711cf88a53f0191b388b5 /manual | |
| parent | fef7c63cd5a5a3150dc9465687359351afab5010 (diff) | |
| download | glibc-1f50f2ad854c84ead522bfc7331b46dbe6057d53.tar glibc-1f50f2ad854c84ead522bfc7331b46dbe6057d53.tar.gz glibc-1f50f2ad854c84ead522bfc7331b46dbe6057d53.tar.bz2 glibc-1f50f2ad854c84ead522bfc7331b46dbe6057d53.zip | |
Small tcache improvements
Change the tcache->counts[] entries to uint16_t - this removes
the limit set by char and allows a larger tcache. Remove a few
redundant asserts.
bench-malloc-thread with 4 threads is ~15% faster on Cortex-A72.
Reviewed-by: DJ Delorie <dj@redhat.com>
* malloc/malloc.c (MAX_TCACHE_COUNT): Increase to UINT16_MAX.
(tcache_put): Remove redundant assert.
(tcache_get): Remove redundant asserts.
(__libc_malloc): Check tcache count is not zero.
* manual/tunables.texi (glibc.malloc.tcache_count): Update maximum.
Diffstat (limited to 'manual')
| -rw-r--r-- | manual/tunables.texi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/manual/tunables.texi b/manual/tunables.texi index ae638823a2..ee0fdf28d1 100644 --- a/manual/tunables.texi +++ b/manual/tunables.texi @@ -189,7 +189,7 @@ per-thread cache. The default (and maximum) value is 1032 bytes on @deftp Tunable glibc.malloc.tcache_count The maximum number of chunks of each size to cache. The default is 7. -The upper limit is 127. If set to zero, the per-thread cache is effectively +The upper limit is 65535. If set to zero, the per-thread cache is effectively disabled. The approximate maximum overhead of the per-thread cache is thus equal |