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| author | Wilco Dijkstra <wdijkstr@arm.com> | 2019-05-17 18:16:20 +0100 |
|---|---|---|
| committer | Wilco Dijkstra <wdijkstr@arm.com> | 2019-05-17 18:16:20 +0100 |
| commit | 1f50f2ad854c84ead522bfc7331b46dbe6057d53 (patch) | |
| tree | a350b22461a9b819877711cf88a53f0191b388b5 /manual/intro.texi | |
| parent | fef7c63cd5a5a3150dc9465687359351afab5010 (diff) | |
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Small tcache improvements
Change the tcache->counts[] entries to uint16_t - this removes
the limit set by char and allows a larger tcache. Remove a few
redundant asserts.
bench-malloc-thread with 4 threads is ~15% faster on Cortex-A72.
Reviewed-by: DJ Delorie <dj@redhat.com>
* malloc/malloc.c (MAX_TCACHE_COUNT): Increase to UINT16_MAX.
(tcache_put): Remove redundant assert.
(tcache_get): Remove redundant asserts.
(__libc_malloc): Check tcache count is not zero.
* manual/tunables.texi (glibc.malloc.tcache_count): Update maximum.
Diffstat (limited to 'manual/intro.texi')
0 files changed, 0 insertions, 0 deletions