aboutsummaryrefslogtreecommitdiff
path: root/REORG.TODO/sysdeps/powerpc/fpu_control.h
diff options
context:
space:
mode:
authorZack Weinberg <zackw@panix.com>2017-06-08 15:39:03 -0400
committerZack Weinberg <zackw@panix.com>2017-06-08 15:39:03 -0400
commit5046dbb4a7eba5eccfd258f92f4735c9ffc8d069 (patch)
tree4470480d904b65cf14ca524f96f79eca818c3eaf /REORG.TODO/sysdeps/powerpc/fpu_control.h
parent199fc19d3aaaf57944ef036e15904febe877fc93 (diff)
downloadglibc-5046dbb4a7eba5eccfd258f92f4735c9ffc8d069.tar
glibc-5046dbb4a7eba5eccfd258f92f4735c9ffc8d069.tar.gz
glibc-5046dbb4a7eba5eccfd258f92f4735c9ffc8d069.tar.bz2
glibc-5046dbb4a7eba5eccfd258f92f4735c9ffc8d069.zip
Prepare for radical source tree reorganization.zack/build-layout-experiment
All top-level files and directories are moved into a temporary storage directory, REORG.TODO, except for files that will certainly still exist in their current form at top level when we're done (COPYING, COPYING.LIB, LICENSES, NEWS, README), all old ChangeLog files (which are moved to the new directory OldChangeLogs, instead), and the generated file INSTALL (which is just deleted; in the new order, there will be no generated files checked into version control).
Diffstat (limited to 'REORG.TODO/sysdeps/powerpc/fpu_control.h')
-rw-r--r--REORG.TODO/sysdeps/powerpc/fpu_control.h120
1 files changed, 120 insertions, 0 deletions
diff --git a/REORG.TODO/sysdeps/powerpc/fpu_control.h b/REORG.TODO/sysdeps/powerpc/fpu_control.h
new file mode 100644
index 0000000000..842cbfa03f
--- /dev/null
+++ b/REORG.TODO/sysdeps/powerpc/fpu_control.h
@@ -0,0 +1,120 @@
+/* FPU control word definitions. PowerPC version.
+ Copyright (C) 1996-2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#ifndef _FPU_CONTROL_H
+#define _FPU_CONTROL_H
+
+#ifdef _SOFT_FLOAT
+
+# define _FPU_RESERVED 0xffffffff
+# define _FPU_DEFAULT 0x00000000 /* Default value. */
+typedef unsigned int fpu_control_t;
+# define _FPU_GETCW(cw) (cw) = 0
+# define _FPU_SETCW(cw) (void) (cw)
+extern fpu_control_t __fpu_control;
+
+#elif defined __NO_FPRS__ /* e500 */
+
+/* rounding control */
+# define _FPU_RC_NEAREST 0x00 /* RECOMMENDED */
+# define _FPU_RC_DOWN 0x03
+# define _FPU_RC_UP 0x02
+# define _FPU_RC_ZERO 0x01
+
+/* masking of interrupts */
+# define _FPU_MASK_ZM 0x10 /* zero divide */
+# define _FPU_MASK_OM 0x04 /* overflow */
+# define _FPU_MASK_UM 0x08 /* underflow */
+# define _FPU_MASK_XM 0x40 /* inexact */
+# define _FPU_MASK_IM 0x20 /* invalid operation */
+
+# define _FPU_RESERVED 0x00c10080 /* These bits are reserved and not changed. */
+
+/* Correct IEEE semantics require traps to be enabled at the hardware
+ level; the kernel then does the emulation and determines whether
+ generation of signals from those traps was enabled using prctl. */
+# define _FPU_DEFAULT 0x0000003c /* Default value. */
+# define _FPU_IEEE _FPU_DEFAULT
+
+/* Type of the control word. */
+typedef unsigned int fpu_control_t;
+
+/* Macros for accessing the hardware control word. */
+# define _FPU_GETCW(cw) \
+ __asm__ volatile ("mfspefscr %0" : "=r" (cw))
+# define _FPU_SETCW(cw) \
+ __asm__ volatile ("mtspefscr %0" : : "r" (cw))
+
+/* Default control word set at startup. */
+extern fpu_control_t __fpu_control;
+
+#else /* PowerPC 6xx floating-point. */
+
+/* rounding control */
+# define _FPU_RC_NEAREST 0x00 /* RECOMMENDED */
+# define _FPU_RC_DOWN 0x03
+# define _FPU_RC_UP 0x02
+# define _FPU_RC_ZERO 0x01
+
+# define _FPU_MASK_NI 0x04 /* non-ieee mode */
+
+/* masking of interrupts */
+# define _FPU_MASK_ZM 0x10 /* zero divide */
+# define _FPU_MASK_OM 0x40 /* overflow */
+# define _FPU_MASK_UM 0x20 /* underflow */
+# define _FPU_MASK_XM 0x08 /* inexact */
+# define _FPU_MASK_IM 0x80 /* invalid operation */
+
+# define _FPU_RESERVED 0xffffff00 /* These bits are reserved are not changed. */
+
+/* The fdlibm code requires no interrupts for exceptions. */
+# define _FPU_DEFAULT 0x00000000 /* Default value. */
+
+/* IEEE: same as above, but (some) exceptions;
+ we leave the 'inexact' exception off.
+ */
+# define _FPU_IEEE 0x000000f0
+
+/* Type of the control word. */
+typedef unsigned int fpu_control_t;
+
+/* Macros for accessing the hardware control word. */
+# define _FPU_GETCW(cw) \
+ ({union { double __d; unsigned long long __ll; } __u; \
+ register double __fr; \
+ __asm__ ("mffs %0" : "=f" (__fr)); \
+ __u.__d = __fr; \
+ (cw) = (fpu_control_t) __u.__ll; \
+ (fpu_control_t) __u.__ll; \
+ })
+
+# define _FPU_SETCW(cw) \
+ { union { double __d; unsigned long long __ll; } __u; \
+ register double __fr; \
+ __u.__ll = 0xfff80000LL << 32; /* This is a QNaN. */ \
+ __u.__ll |= (cw) & 0xffffffffLL; \
+ __fr = __u.__d; \
+ __asm__ ("mtfsf 255,%0" : : "f" (__fr)); \
+ }
+
+/* Default control word set at startup. */
+extern fpu_control_t __fpu_control;
+
+#endif /* PowerPC 6xx floating-point. */
+
+#endif /* _FPU_CONTROL_H */