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| author | Ian Bolton <ian.bolton@arm.com> | 2014-04-24 07:15:33 +0100 |
|---|---|---|
| committer | Marcus Shawcroft <marcus.shawcroft@linaro.org> | 2014-04-24 07:15:33 +0100 |
| commit | e5e0d9a4f632735cf3bb440eecb5caee5eea44c1 (patch) | |
| tree | 51c5774783bb0479b35a33f9a22b86db00c20cbe /ChangeLog | |
| parent | bacc75f7be11656387c239831f490155f5fb3700 (diff) | |
| download | glibc-e5e0d9a4f632735cf3bb440eecb5caee5eea44c1.tar glibc-e5e0d9a4f632735cf3bb440eecb5caee5eea44c1.tar.gz glibc-e5e0d9a4f632735cf3bb440eecb5caee5eea44c1.tar.bz2 glibc-e5e0d9a4f632735cf3bb440eecb5caee5eea44c1.zip | |
[AArch64] Suppress unnecessary FPSR and FPCR writes.
Diffstat (limited to 'ChangeLog')
| -rw-r--r-- | ChangeLog | 15 |
1 files changed, 15 insertions, 0 deletions
@@ -1,3 +1,18 @@ +2014-04-24 Ian Bolton <ian.bolton@arm.com> + + * sysdeps/aarch64/fpu/fclrexcpt.c (feclearexcept): Don't write to + fpsr if value didn't change. + * sysdeps/aarch64/fpu/fedisblxcpt.c (fedisableexcept): Don't write + to fpcr if value didn't change. + * sysdeps/aarch64/fpu/feenablxcpt.c (feenableexcept): Likewise. + * sysdeps/aarch64/fpu/feholdexcpt.c (feholdexcept): Don't write to + fpsr or fpcr if value didn't change. + * sysdeps/aarch64/fpu/fesetenv.c (fesetenv): Likewise. + * sysdeps/aarch64/fpu/fesetround.c (fesetround): Don't write to + fpcr if value didn't change. + * sysdeps/aarch64/fpu/fsetexcptflg.c (fesetexceptflag): Don't write + to fpsr if value didn't change. + 2014-02-23 Siddhesh Poyarekar <siddhesh@redhat.com> * nptl/tst-sem3.c: Use test-skeleton.c |