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| author | H.J. Lu <hjl.tools@gmail.com> | 2012-05-15 09:58:28 -0700 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2012-05-15 09:58:28 -0700 |
| commit | 9bc0b730a650b333a257777cf7d8e18d5332ee10 (patch) | |
| tree | 42991ce857d24f0ab994ddc1a29dee4ecb010a01 | |
| parent | 6d2850e7f5df4c67ca2ec172a945cbab20d9f050 (diff) | |
| download | glibc-9bc0b730a650b333a257777cf7d8e18d5332ee10.tar glibc-9bc0b730a650b333a257777cf7d8e18d5332ee10.tar.gz glibc-9bc0b730a650b333a257777cf7d8e18d5332ee10.tar.bz2 glibc-9bc0b730a650b333a257777cf7d8e18d5332ee10.zip | |
Load cache sizes into R*_LP in memcpy-ssse3.S
| -rw-r--r-- | ChangeLog | 5 | ||||
| -rw-r--r-- | sysdeps/x86_64/multiarch/memcpy-ssse3.S | 24 |
2 files changed, 17 insertions, 12 deletions
@@ -1,5 +1,10 @@ 2012-05-15 H.J. Lu <hongjiu.lu@intel.com> + * sysdeps/x86_64/multiarch/memcpy-ssse3.S: Load cache sizes + into R*_LP. + +2012-05-15 H.J. Lu <hongjiu.lu@intel.com> + * sysdeps/x86_64/multiarch/memcpy-ssse3-back.S: Load cache sizes into R*_LP. diff --git a/sysdeps/x86_64/multiarch/memcpy-ssse3.S b/sysdeps/x86_64/multiarch/memcpy-ssse3.S index b71ac33df7..3f7d542584 100644 --- a/sysdeps/x86_64/multiarch/memcpy-ssse3.S +++ b/sysdeps/x86_64/multiarch/memcpy-ssse3.S @@ -97,9 +97,9 @@ L(80bytesormore): sub %rcx, %rsi #ifdef SHARED_CACHE_SIZE_HALF - mov $SHARED_CACHE_SIZE_HALF, %rcx + mov $SHARED_CACHE_SIZE_HALF, %RCX_LP #else - mov __x86_64_shared_cache_size_half(%rip), %rcx + mov __x86_64_shared_cache_size_half(%rip), %RCX_LP #endif cmp %rcx, %rdx mov %rsi, %r9 @@ -107,9 +107,9 @@ L(80bytesormore): and $0xf, %r9 jz L(shl_0) #ifdef DATA_CACHE_SIZE_HALF - mov $DATA_CACHE_SIZE_HALF, %rcx + mov $DATA_CACHE_SIZE_HALF, %RCX_LP #else - mov __x86_64_data_cache_size_half(%rip), %rcx + mov __x86_64_data_cache_size_half(%rip), %RCX_LP #endif BRANCH_TO_JMPTBL_ENTRY (L(shl_table), %r9, 4) @@ -127,9 +127,9 @@ L(copy_backward): sub %rcx, %rsi #ifdef SHARED_CACHE_SIZE_HALF - mov $SHARED_CACHE_SIZE_HALF, %rcx + mov $SHARED_CACHE_SIZE_HALF, %RCX_LP #else - mov __x86_64_shared_cache_size_half(%rip), %rcx + mov __x86_64_shared_cache_size_half(%rip), %RCX_LP #endif cmp %rcx, %rdx @@ -138,9 +138,9 @@ L(copy_backward): and $0xf, %r9 jz L(shl_0_bwd) #ifdef DATA_CACHE_SIZE_HALF - mov $DATA_CACHE_SIZE_HALF, %rcx + mov $DATA_CACHE_SIZE_HALF, %RCX_LP #else - mov __x86_64_data_cache_size_half(%rip), %rcx + mov __x86_64_data_cache_size_half(%rip), %RCX_LP #endif BRANCH_TO_JMPTBL_ENTRY (L(shl_table_bwd), %r9, 4) @@ -175,9 +175,9 @@ L(shl_0_less_64bytes): ALIGN (4) L(shl_0_gobble): #ifdef DATA_CACHE_SIZE_HALF - cmp $DATA_CACHE_SIZE_HALF, %rdx + cmp $DATA_CACHE_SIZE_HALF, %RDX_LP #else - cmp __x86_64_data_cache_size_half(%rip), %rdx + cmp __x86_64_data_cache_size_half(%rip), %RDX_LP #endif lea -128(%rdx), %rdx jae L(shl_0_gobble_mem_loop) @@ -316,9 +316,9 @@ L(shl_0_less_64bytes_bwd): ALIGN (4) L(shl_0_gobble_bwd): #ifdef DATA_CACHE_SIZE_HALF - cmp $DATA_CACHE_SIZE_HALF, %rdx + cmp $DATA_CACHE_SIZE_HALF, %RDX_LP #else - cmp __x86_64_data_cache_size_half(%rip), %rdx + cmp __x86_64_data_cache_size_half(%rip), %RDX_LP #endif lea -128(%rdx), %rdx jae L(shl_0_gobble_mem_bwd_loop) |