aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorAurelien Jarno <aurelien@aurel32.net>2016-08-02 09:18:59 +0200
committerAurelien Jarno <aurelien@aurel32.net>2016-08-02 09:18:59 +0200
commit65cc568cf57156e5230db9a061645e54ff028a41 (patch)
tree66df21b88abfc4a29e65af74f4cde03fcec48a9e
parent062e53c195b4a87754632c7d51254867247698b4 (diff)
downloadglibc-65cc568cf57156e5230db9a061645e54ff028a41.tar
glibc-65cc568cf57156e5230db9a061645e54ff028a41.tar.gz
glibc-65cc568cf57156e5230db9a061645e54ff028a41.tar.bz2
glibc-65cc568cf57156e5230db9a061645e54ff028a41.zip
alpha: fix floor on sNaN input
The alpha version of floor wrongly return sNaN for sNaN input. Fix that by checking for NaN and by returning the input value added with itself in that case. Finally remove the code to handle inexact exception, floor should never generate such an exception. Changelog: * sysdeps/alpha/fpu/s_floor.c (__floor): Add argument with itself when it is a NaN. [_IEEE_FP_INEXACT] Remove. * sysdeps/alpha/fpu/s_floorf.c (__floorf): Likewise.
-rw-r--r--ChangeLog4
-rw-r--r--sysdeps/alpha/fpu/s_floor.c7
-rw-r--r--sysdeps/alpha/fpu/s_floorf.c7
3 files changed, 10 insertions, 8 deletions
diff --git a/ChangeLog b/ChangeLog
index 5c43b175b8..d675adc994 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -4,6 +4,10 @@
when it is a NaN.
[_IEEE_FP_INEXACT] Remove.
* sysdeps/alpha/fpu/s_ceilf.c (__ceilf): Likewise.
+ * sysdeps/alpha/fpu/s_floor.c (__floor): Add argument with itself
+ when it is a NaN.
+ [_IEEE_FP_INEXACT] Remove.
+ * sysdeps/alpha/fpu/s_floorf.c (__floorf): Likewise.
2016-08-01 Carlos O'Donell <carlos@redhat.com>
diff --git a/sysdeps/alpha/fpu/s_floor.c b/sysdeps/alpha/fpu/s_floor.c
index 1a6f8c4617..9930f6be42 100644
--- a/sysdeps/alpha/fpu/s_floor.c
+++ b/sysdeps/alpha/fpu/s_floor.c
@@ -27,16 +27,15 @@
double
__floor (double x)
{
+ if (isnan (x))
+ return x + x;
+
if (isless (fabs (x), 9007199254740992.0)) /* 1 << DBL_MANT_DIG */
{
double tmp1, new_x;
__asm (
-#ifdef _IEEE_FP_INEXACT
- "cvttq/svim %2,%1\n\t"
-#else
"cvttq/svm %2,%1\n\t"
-#endif
"cvtqt/m %1,%0\n\t"
: "=f"(new_x), "=&f"(tmp1)
: "f"(x));
diff --git a/sysdeps/alpha/fpu/s_floorf.c b/sysdeps/alpha/fpu/s_floorf.c
index 8cd80e2b42..015c04f40d 100644
--- a/sysdeps/alpha/fpu/s_floorf.c
+++ b/sysdeps/alpha/fpu/s_floorf.c
@@ -26,6 +26,9 @@
float
__floorf (float x)
{
+ if (isnanf (x))
+ return x + x;
+
if (isless (fabsf (x), 16777216.0f)) /* 1 << FLT_MANT_DIG */
{
/* Note that Alpha S_Floating is stored in registers in a
@@ -36,11 +39,7 @@ __floorf (float x)
float tmp1, tmp2, new_x;
__asm ("cvtst/s %3,%2\n\t"
-#ifdef _IEEE_FP_INEXACT
- "cvttq/svim %2,%1\n\t"
-#else
"cvttq/svm %2,%1\n\t"
-#endif
"cvtqt/m %1,%0\n\t"
: "=f"(new_x), "=&f"(tmp1), "=&f"(tmp2)
: "f"(x));