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| author | H.J. Lu <hjl.tools@gmail.com> | 2021-06-30 10:47:06 -0700 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2022-02-01 07:27:53 -0800 |
| commit | 071e2bdd850de9387b22b387f5f42e5c7d6668de (patch) | |
| tree | b6b530de290c1a903898ed115ef861fad18bcf64 | |
| parent | 25ed98a8827c083c8241cf9b5e2d2ec81c9dbe6f (diff) | |
| download | glibc-071e2bdd850de9387b22b387f5f42e5c7d6668de.tar glibc-071e2bdd850de9387b22b387f5f42e5c7d6668de.tar.gz glibc-071e2bdd850de9387b22b387f5f42e5c7d6668de.tar.bz2 glibc-071e2bdd850de9387b22b387f5f42e5c7d6668de.zip | |
x86: Check RTM_ALWAYS_ABORT for RTM [BZ #28033]
From
https://www.intel.com/content/www/us/en/support/articles/000059422/processors.html
* Intel TSX will be disabled by default.
* The processor will force abort all Restricted Transactional Memory (RTM)
transactions by default.
* A new CPUID bit CPUID.07H.0H.EDX[11](RTM_ALWAYS_ABORT) will be enumerated,
which is set to indicate to updated software that the loaded microcode is
forcing RTM abort.
* On processors that enumerate support for RTM, the CPUID enumeration bits
for Intel TSX (CPUID.07H.0H.EBX[11] and CPUID.07H.0H.EBX[4]) continue to
be set by default after microcode update.
* Workloads that were benefited from Intel TSX might experience a change
in performance.
* System software may use a new bit in Model-Specific Register (MSR) 0x10F
TSX_FORCE_ABORT[TSX_CPUID_CLEAR] functionality to clear the Hardware Lock
Elision (HLE) and RTM bits to indicate to software that Intel TSX is
disabled.
1. Add RTM_ALWAYS_ABORT to CPUID features.
2. Set RTM usable only if RTM_ALWAYS_ABORT isn't set. This skips the
string/tst-memchr-rtm etc. testcases on the affected processors, which
always fail after a microcde update.
3. Check RTM feature, instead of usability, against /proc/cpuinfo.
This fixes BZ #28033.
(cherry picked from commit ea8e465a6b8d0f26c72bcbe453a854de3abf68ec)
| -rw-r--r-- | sysdeps/x86/cpu-features.c | 3 | ||||
| -rw-r--r-- | sysdeps/x86/cpu-features.h | 3 | ||||
| -rw-r--r-- | sysdeps/x86/tst-get-cpu-features.c | 1 |
3 files changed, 7 insertions, 0 deletions
diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c index a4d1eacbe7..00ca2fe82d 100644 --- a/sysdeps/x86/cpu-features.c +++ b/sysdeps/x86/cpu-features.c @@ -333,6 +333,9 @@ init_cpu_features (struct cpu_features *cpu_features) get_extended_indices (cpu_features); + if (CPU_FEATURES_CPU_P (cpu_features, RTM_ALWAYS_ABORT)) + cpu_features->cpuid[index_cpu_RTM].reg_RTM &= ~bit_cpu_RTM; + if (family == 0x06) { model += extended_model; diff --git a/sysdeps/x86/cpu-features.h b/sysdeps/x86/cpu-features.h index ca2924bd95..3599dd89d0 100644 --- a/sysdeps/x86/cpu-features.h +++ b/sysdeps/x86/cpu-features.h @@ -499,6 +499,7 @@ extern const struct cpu_features *__get_cpu_features (void) #define bit_cpu_AVX512_4VNNIW (1u << 2) #define bit_cpu_AVX512_4FMAPS (1u << 3) #define bit_cpu_FSRM (1u << 4) +#define bit_cpu_RTM_ALWAYS_ABORT (1u << 11) #define bit_cpu_PCONFIG (1u << 18) #define bit_cpu_IBT (1u << 20) #define bit_cpu_IBRS_IBPB (1u << 26) @@ -667,6 +668,7 @@ extern const struct cpu_features *__get_cpu_features (void) #define index_cpu_AVX512_4VNNIW COMMON_CPUID_INDEX_7 #define index_cpu_AVX512_4FMAPS COMMON_CPUID_INDEX_7 #define index_cpu_FSRM COMMON_CPUID_INDEX_7 +#define index_cpu_RTM_ALWAYS_ABORT COMMON_CPUID_INDEX_7 #define index_cpu_PCONFIG COMMON_CPUID_INDEX_7 #define index_cpu_IBT COMMON_CPUID_INDEX_7 #define index_cpu_IBRS_IBPB COMMON_CPUID_INDEX_7 @@ -835,6 +837,7 @@ extern const struct cpu_features *__get_cpu_features (void) #define reg_AVX512_4VNNIW edx #define reg_AVX512_4FMAPS edx #define reg_FSRM edx +#define reg_RTM_ALWAYS_ABORT edx #define reg_PCONFIG edx #define reg_IBT edx #define reg_IBRS_IBPB edx diff --git a/sysdeps/x86/tst-get-cpu-features.c b/sysdeps/x86/tst-get-cpu-features.c index bf2b9b22e7..08aa421fe9 100644 --- a/sysdeps/x86/tst-get-cpu-features.c +++ b/sysdeps/x86/tst-get-cpu-features.c @@ -176,6 +176,7 @@ do_test (void) CHECK_CPU_FEATURE (AVX512_4VNNIW); CHECK_CPU_FEATURE (AVX512_4FMAPS); CHECK_CPU_FEATURE (FSRM); + CHECK_CPU_FEATURE (RTM_ALWAYS_ABORT); CHECK_CPU_FEATURE (PCONFIG); CHECK_CPU_FEATURE (IBT); CHECK_CPU_FEATURE (IBRS_IBPB); |