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| author | Wilco Dijkstra <Wilco.Dijkstra@arm.com> | 2018-12-19 18:28:24 +0000 |
|---|---|---|
| committer | Wilco Dijkstra <wdijkstr@arm.com> | 2019-09-06 18:58:34 +0100 |
| commit | d6613ad24f708706c24bffa38351e26e1dd5b5d1 (patch) | |
| tree | 2fe98d347a0827a5eb1806d644a506f227a841bd | |
| parent | ad64510e5c74729108a02a6c22f03aa8ee07a8d3 (diff) | |
| download | glibc-d6613ad24f708706c24bffa38351e26e1dd5b5d1.tar glibc-d6613ad24f708706c24bffa38351e26e1dd5b5d1.tar.gz glibc-d6613ad24f708706c24bffa38351e26e1dd5b5d1.tar.bz2 glibc-d6613ad24f708706c24bffa38351e26e1dd5b5d1.zip | |
[AArch64] Add ifunc support for Ares
Add Ares to the midr_el0 list and support ifunc dispatch. Since Ares
supports 2 128-bit loads/stores, use Neon registers for memcpy by
selecting __memcpy_falkor by default (we should rename this to
__memcpy_simd or similar).
* manual/tunables.texi (glibc.cpu.name): Add ares tunable.
* sysdeps/aarch64/multiarch/memcpy.c (__libc_memcpy): Use
__memcpy_falkor for ares.
* sysdeps/unix/sysv/linux/aarch64/cpu-features.h (IS_ARES):
Add new define.
* sysdeps/unix/sysv/linux/aarch64/cpu-features.c (cpu_list):
Add ares cpu.
(cherry picked from commit 02f440c1ef5d5d79552a524065aa3e2fabe469b9)
| -rw-r--r-- | ChangeLog | 10 | ||||
| -rw-r--r-- | manual/tunables.texi | 2 | ||||
| -rw-r--r-- | sysdeps/aarch64/multiarch/memcpy.c | 2 | ||||
| -rw-r--r-- | sysdeps/unix/sysv/linux/aarch64/cpu-features.c | 1 | ||||
| -rw-r--r-- | sysdeps/unix/sysv/linux/aarch64/cpu-features.h | 3 |
5 files changed, 16 insertions, 2 deletions
@@ -1,3 +1,13 @@ +2019-01-09 Wilco Dijkstra <wdijkstr@arm.com> + + * manual/tunables.texi (glibc.cpu.name): Add ares tunable. + * sysdeps/aarch64/multiarch/memcpy.c (__libc_memcpy): Use + __memcpy_falkor for ares. + * sysdeps/unix/sysv/linux/aarch64/cpu-features.h (IS_ARES): + Add new define. + * sysdeps/unix/sysv/linux/aarch64/cpu-features.c (cpu_list): + Add ares cpu. + 2019-09-06 Siddhesh Poyarekar <siddhesh@sourceware.org> * sysdeps/aarch64/multiarch/memcpy_falkor.S (__memcpy_falkor): diff --git a/manual/tunables.texi b/manual/tunables.texi index a23c8d076a..b230cde556 100644 --- a/manual/tunables.texi +++ b/manual/tunables.texi @@ -253,7 +253,7 @@ This tunable is specific to i386 and x86-64. @deftp Tunable glibc.tune.cpu The @code{glibc.tune.cpu=xxx} tunable allows the user to tell @theglibc{} to assume that the CPU is @code{xxx} where xxx may have one of these values: -@code{generic}, @code{falkor}, @code{thunderxt88}. +@code{generic}, @code{falkor}, @code{thunderxt88}, @code{ares}. This tunable is specific to aarch64. @end deftp diff --git a/sysdeps/aarch64/multiarch/memcpy.c b/sysdeps/aarch64/multiarch/memcpy.c index b395df1c63..ee4d78ea1d 100644 --- a/sysdeps/aarch64/multiarch/memcpy.c +++ b/sysdeps/aarch64/multiarch/memcpy.c @@ -35,7 +35,7 @@ extern __typeof (__redirect_memcpy) __memcpy_falkor attribute_hidden; libc_ifunc (__libc_memcpy, (IS_THUNDERX (midr) ? __memcpy_thunderx - : (IS_FALKOR (midr) + : (IS_FALKOR (midr) || IS_ARES (midr) ? __memcpy_falkor : __memcpy_generic))); diff --git a/sysdeps/unix/sysv/linux/aarch64/cpu-features.c b/sysdeps/unix/sysv/linux/aarch64/cpu-features.c index 0c7e13f4fa..50297bc409 100644 --- a/sysdeps/unix/sysv/linux/aarch64/cpu-features.c +++ b/sysdeps/unix/sysv/linux/aarch64/cpu-features.c @@ -30,6 +30,7 @@ struct cpu_list static struct cpu_list cpu_list[] = { {"falkor", 0x510FC000}, {"thunderxt88", 0x430F0A10}, + {"ares", 0x411FD0C0}, {"generic", 0x0} }; diff --git a/sysdeps/unix/sysv/linux/aarch64/cpu-features.h b/sysdeps/unix/sysv/linux/aarch64/cpu-features.h index 73cb53da9a..d2ad5c63b9 100644 --- a/sysdeps/unix/sysv/linux/aarch64/cpu-features.h +++ b/sysdeps/unix/sysv/linux/aarch64/cpu-features.h @@ -44,6 +44,9 @@ #define IS_FALKOR(midr) (MIDR_IMPLEMENTOR(midr) == 'Q' \ && MIDR_PARTNUM(midr) == 0xc00) +#define IS_ARES(midr) (MIDR_IMPLEMENTOR(midr) == 'A' \ + && MIDR_PARTNUM(midr) == 0xd0c) + struct cpu_features { uint64_t midr_el1; |