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| author | H.J. Lu <hjl.tools@gmail.com> | 2016-05-19 10:02:36 -0700 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2016-06-06 13:34:18 -0700 |
| commit | 756fa392db3930cec9330169aef2c647df365432 (patch) | |
| tree | a1c3c9e5ff161d5ab6def0f5c2c84a5f335ae629 | |
| parent | 4c197f7a6b4ae1d57d1ad154ddae9db95b0abe86 (diff) | |
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Correct Intel processor level type mask from CPUID
Intel CPUID with EAX == 11 returns:
ECX Bits 07 - 00: Level number. Same value in ECX input.
Bits 15 - 08: Level type.
^^^^^^^^^^^^^^^^^^^^^^^^ This is level type.
Bits 31 - 16: Reserved.
Intel processor level type mask should be 0xff00, not 0xff0.
[BZ #20119]
* sysdeps/x86/cacheinfo.c (init_cacheinfo): Correct Intel
processor level type mask for CPUID with EAX == 11.
| -rw-r--r-- | sysdeps/x86/cacheinfo.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/sysdeps/x86/cacheinfo.c b/sysdeps/x86/cacheinfo.c index 1f46d9de20..020d3fd397 100644 --- a/sysdeps/x86/cacheinfo.c +++ b/sysdeps/x86/cacheinfo.c @@ -552,7 +552,7 @@ init_cacheinfo (void) __cpuid_count (11, i++, eax, ebx, ecx, edx); int shipped = ebx & 0xff; - int type = ecx & 0xff0; + int type = ecx & 0xff00; if (shipped == 0 || type == 0) break; else if (type == 0x200) |