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| author | H.J. Lu <hjl.tools@gmail.com> | 2016-03-28 19:22:59 -0700 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2016-03-28 19:23:31 -0700 |
| commit | 0791f91dff9a77263fa8173b143d854cad902c6d (patch) | |
| tree | 72a8411f6e8a1f8e6edfcdc93ed79789000c71a2 | |
| parent | 9ff9351d028d43af1cc2eaf432004ada0996bbf0 (diff) | |
| download | glibc-0791f91dff9a77263fa8173b143d854cad902c6d.tar glibc-0791f91dff9a77263fa8173b143d854cad902c6d.tar.gz glibc-0791f91dff9a77263fa8173b143d854cad902c6d.tar.bz2 glibc-0791f91dff9a77263fa8173b143d854cad902c6d.zip | |
Initial Enhanced REP MOVSB/STOSB (ERMS) support
The newer Intel processors support Enhanced REP MOVSB/STOSB (ERMS) which
has a feature bit in CPUID. This patch adds the Enhanced REP MOVSB/STOSB
(ERMS) bit to x86 cpu-features.
* sysdeps/x86/cpu-features.h (bit_cpu_ERMS): New.
(index_cpu_ERMS): Likewise.
(reg_ERMS): Likewise.
| -rw-r--r-- | ChangeLog | 6 | ||||
| -rw-r--r-- | sysdeps/x86/cpu-features.h | 4 |
2 files changed, 10 insertions, 0 deletions
@@ -1,3 +1,9 @@ +2016-03-28 H.J. Lu <hongjiu.lu@intel.com> + + * sysdeps/x86/cpu-features.h (bit_cpu_ERMS): New. + (index_cpu_ERMS): Likewise. + (reg_ERMS): Likewise. + 2016-03-28 Aurelien Jarno <aurelien@aurel32.net> * sysdeps/unix/sysv/linux/sys/personality.h (UNAME26, FDPIC_FUNCPTRS, diff --git a/sysdeps/x86/cpu-features.h b/sysdeps/x86/cpu-features.h index bfe1f4c68d..8f946c4f6f 100644 --- a/sysdeps/x86/cpu-features.h +++ b/sysdeps/x86/cpu-features.h @@ -53,6 +53,7 @@ #define bit_cpu_FMA4 (1 << 16) /* COMMON_CPUID_INDEX_7. */ +#define bit_cpu_ERMS (1 << 9) #define bit_cpu_RTM (1 << 11) #define bit_cpu_AVX2 (1 << 5) #define bit_cpu_AVX512F (1 << 16) @@ -84,6 +85,7 @@ # define index_cpu_SSE4_2 COMMON_CPUID_INDEX_1*CPUID_SIZE+CPUID_ECX_OFFSET # define index_cpu_AVX COMMON_CPUID_INDEX_1*CPUID_SIZE+CPUID_ECX_OFFSET # define index_cpu_AVX2 COMMON_CPUID_INDEX_7*CPUID_SIZE+CPUID_EBX_OFFSET +# define index_cpu_ERMS COMMON_CPUID_INDEX_7*CPUID_SIZE+CPUID_EBX_OFFSET # define index_arch_Fast_Rep_String FEATURE_INDEX_1*FEATURE_SIZE # define index_arch_Fast_Copy_Backward FEATURE_INDEX_1*FEATURE_SIZE @@ -228,6 +230,7 @@ extern const struct cpu_features *__get_cpu_features (void) # define index_cpu_AVX2 COMMON_CPUID_INDEX_7 # define index_cpu_AVX512F COMMON_CPUID_INDEX_7 # define index_cpu_AVX512DQ COMMON_CPUID_INDEX_7 +# define index_cpu_ERMS COMMON_CPUID_INDEX_7 # define index_cpu_RTM COMMON_CPUID_INDEX_7 # define index_cpu_FMA COMMON_CPUID_INDEX_1 # define index_cpu_FMA4 COMMON_CPUID_INDEX_80000001 @@ -244,6 +247,7 @@ extern const struct cpu_features *__get_cpu_features (void) # define reg_AVX2 ebx # define reg_AVX512F ebx # define reg_AVX512DQ ebx +# define reg_ERMS ebx # define reg_RTM ebx # define reg_FMA ecx # define reg_FMA4 ecx |