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authorDavid S. Miller <davem@davemloft.net>2013-11-06 13:01:36 -0800
committerDavid S. Miller <davem@davemloft.net>2013-11-06 13:23:36 -0800
commit8d6bb57c44557c344d56653c3380885bf1dcabd7 (patch)
tree09711b8cd8fbab03c0cb6224b54ce497b3ace0f0
parente256c4214c9484873921d4bdb723b842b5627e42 (diff)
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Fix build on pre-v9 32-bit Sparc.
We cannot use fnegd in this code, as fnegd was added in v9. Only fnegs exists in v8 and earlier. [BZ #15985] * sysdeps/sparc/sparc32/fpu/s_fdim.S (__fdim): Do not use fnegd on pre-v9 cpus, use a fnegs+fmovs sequence instead.
-rw-r--r--ChangeLog6
-rw-r--r--NEWS4
-rw-r--r--sysdeps/sparc/sparc32/fpu/s_fdim.S3
3 files changed, 10 insertions, 3 deletions
diff --git a/ChangeLog b/ChangeLog
index 1165247ed2..3b65d5a7b9 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,9 @@
+2013-11-06 David S. Miller <davem@davemloft.net>
+
+ [BZ #15985]
+ * sysdeps/sparc/sparc32/fpu/s_fdim.S (__fdim): Do not use fnegd
+ on pre-v9 cpus, use a fnegs+fmovs sequence instead.
+
2013-11-06 Will Newton <will.newton@linaro.org>
* manual/memory.texi (Malloc Examples): Remove register
diff --git a/NEWS b/NEWS
index 38ed4404ba..bb1db5b0a9 100644
--- a/NEWS
+++ b/NEWS
@@ -16,8 +16,8 @@ Version 2.19
15748, 15749, 15754, 15760, 15763, 15764, 15797, 15799, 15825, 15844,
15847, 15849, 15855, 15856, 15857, 15859, 15867, 15886, 15887, 15890,
15892, 15893, 15895, 15897, 15905, 15909, 15917, 15919, 15921, 15923,
- 15939, 15948, 15963, 15966, 15988, 16032, 16034, 16036, 16037, 16041,
- 16071, 16072, 16074, 16078, 16112.
+ 15939, 15948, 15963, 15966, 15985, 15988, 16032, 16034, 16036, 16037,
+ 16041, 16071, 16072, 16074, 16078, 16112.
* CVE-2012-4412 The strcoll implementation caches indices and rules for
large collation sequences to optimize multiple passes. This cache
diff --git a/sysdeps/sparc/sparc32/fpu/s_fdim.S b/sysdeps/sparc/sparc32/fpu/s_fdim.S
index 2f0c5ce583..22f69ce519 100644
--- a/sysdeps/sparc/sparc32/fpu/s_fdim.S
+++ b/sysdeps/sparc/sparc32/fpu/s_fdim.S
@@ -30,7 +30,8 @@ ENTRY(__fdim)
fbug 1f
st %g0, [%sp + 76]
ldd [%sp + 72], %f0
- fnegd %f0, %f2
+ fnegs %f0, %f2
+ fmovs %f1, %f3
1: retl
fsubd %f0, %f2, %f0
END(__fdim)