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authorAndreas Jaeger <aj@suse.de>2002-07-08 07:42:03 +0000
committerAndreas Jaeger <aj@suse.de>2002-07-08 07:42:03 +0000
commit9dda82d049a3c4ffd68ae547ac0780a9caf51af2 (patch)
tree87538c1bcb0cba20623d818d677a3b2576b44482
parent9359218f0fa991ee10df00cfdc4fc1822c9d9597 (diff)
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Update.
2002-07-08 Andreas Jaeger <aj@suse.de> * sysdeps/x86_64/fpu/s_fdiml.S: Fix wrong register name.
-rw-r--r--ChangeLog4
-rw-r--r--sysdeps/x86_64/fpu/s_fdiml.S4
2 files changed, 6 insertions, 2 deletions
diff --git a/ChangeLog b/ChangeLog
index f916d3f356..338fe59e58 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,7 @@
+2002-07-08 Andreas Jaeger <aj@suse.de>
+
+ * sysdeps/x86_64/fpu/s_fdiml.S: Fix wrong register name.
+
2002-07-06 Andreas Jaeger <aj@suse.de>
* sysdeps/x86_64/fpu/bits/mathinline.h: New.
diff --git a/sysdeps/x86_64/fpu/s_fdiml.S b/sysdeps/x86_64/fpu/s_fdiml.S
index 3789d14bb0..3460b0f979 100644
--- a/sysdeps/x86_64/fpu/s_fdiml.S
+++ b/sysdeps/x86_64/fpu/s_fdiml.S
@@ -22,8 +22,8 @@
.text
ENTRY(__fdiml)
- fldt 8(%esp) // x
- fldt 24(%esp) // x : y
+ fldt 8(%rsp) // x
+ fldt 24(%rsp) // x : y
fucomi %st(1), %st
jp 1f